def construct( s ):
STATE_IDLE = Bits2(0)
STATE_WORK = Bits2(1)
s.out = [ OutPort( Bits2 ) for _ in range(5) ]
@s.update
def upblk1():
s.out[0] = STATE_IDLE
@s.update
def upblk2():
s.out[1] = STATE_WORK
def upblk():
s.out = Bits1(0) <= Bits2(1) <= Bits2(2)
def up_wr_At():
s.A[5:7] @= Bits2(2)
def up_wr_As():
s.A[1:3] @= Bits2(2)
def up_wr_At():
s.A[2:4] @= Bits2(2)