def monitor_existing(self):
'''
Find an FPGA running this project that is not already monitored, and start
monitoring it.
Returns a (t, conn) tuple where:
`t`: is the `Task` wrapping the Vivado process monitoring the FPGA, and
`conn`: is the `Connection` with which this python process can
communicate the monitor.
'''
hwcode = redis_utils.get_unmonitored_projdir_hwcode(self.directory)
if hwcode is None:
raise Exception('No free hardware running this project found.')
hwtarget, jtagfreq = config.hwtargets[hwcode]
description = 'Monitor Redis connection and pass command to FPGA.'
t = vivado_task.VivadoTask.create(
collection=self.tasks_collection,
command_text='::pyvivado::monitor_redis {} {} {:0} 0'.format(
hwcode, hwtarget, int(jtagfreq)),
description=description,
)
t.run()
self.wait_for_monitor(hwcode=hwcode, monitor_task=t)
conn = connection.Connection(hwcode)
return t, conn
def send_to_fpga_and_monitor(self, fake=False):
'''
Send the bitstream of this project to an FPGA and start
monitoring that FPGA.
Returns a (t, conn) tuple where:
`t`: is the `Task` wrapping the Vivado process monitoring the FPGA, and
`conn`: is the `Connection` with which this python process can
communicate the monitor.
'''
if fake:
# First kill any monitors connected to this project.
connection.kill_free_monitors(self.directory)
fake_int = 1
description = 'Faking sending the project to fpga and monitoring.'
else:
fake_int = 0
description = 'Sending project to fpga and monitoring.'
# Get the hardware code for an unmonitored FPGA.
self.params = self.read_params()
hwcode = redis_utils.get_free_hwcode(
self.params['board_params']['name'])
if hwcode is None:
raise Exception('No free hardware found.')
hwtarget, jtagfreq = config.hwtargets[hwcode]
logger.info('Using hardware: {}'.format(hwcode))
# Spawn a Vivado process to deploy the bitstream and
# start monitoring.
t = task.VivadoTask.create(
parent_directory=self.directory,
command_text=
'::pyvivado::send_to_fpga_and_monitor {{{}}} {} {} {} {}'.format(
self.directory, hwcode, hwtarget, int(jtagfreq), fake_int),
description=description,
tasks_collection=self.tasks_collection,
)
t.run()
# Wait for the task to start monitoring and get the
# hardware code of the free fpga.
self.wait_for_monitor(hwcode=hwcode, monitor_task=t)
# Create a Connection object for communication with the FPGA/
conn = connection.Connection(hwcode)
return t, conn
