def test_float_load_zero(self):
with lltype.scoped_alloc(DOUBLE_ARRAY_PTR.TO, 16) as mem:
with ActivationRecordCtx(self):
with LiteralPoolCtx(self) as pool:
pool.addr(mem)
self.mc.LZDR(r.f0)
self.mc.LG(r.r11, loc.addr(0, r.r13))
self.mc.STD(r.f0, loc.addr(0, r.r11))
run_asm(self.a)
assert isclose(mem[0], 0.0)
def test_float_load_zero(self):
with lltype.scoped_alloc(DOUBLE_ARRAY_PTR.TO, 16) as mem:
with ActivationRecordCtx(self):
with LiteralPoolCtx(self) as pool:
pool.addr(mem)
self.mc.LZDR(r.f0)
self.mc.LG(r.r11, loc.addr(0, r.r13))
self.mc.STD(r.f0, loc.addr(0, r.r11))
run_asm(self.a)
assert isclose(mem[0], 0.0)
def test_facility(self):
adr = self.a.datablockwrapper.malloc_aligned(16, 16)
self.a.mc.load_imm(r.r2, adr)
self.a.mc.STFLE(loc.addr(0,r.r2))
self.a.mc.BCR(con.ANY, r.r14)
run_asm(self.a)
fac_data = rffi.cast(rffi.CArrayPtr(rffi.ULONG), adr)
f64 = bin(fac_data[0])[2:]
s64 = bin(fac_data[1])[2:]
print(f64)
print(s64)
assert f64[18] == '1' # long displacement facility
def test_facility(self):
adr = self.a.datablockwrapper.malloc_aligned(16, 16)
self.a.mc.load_imm(r.r2, adr)
self.a.mc.STFLE(loc.addr(0, r.r2))
self.a.mc.BCR(con.ANY, r.r14)
run_asm(self.a)
fac_data = rffi.cast(rffi.CArrayPtr(rffi.ULONG), adr)
f64 = bin(fac_data[0])[2:]
s64 = bin(fac_data[1])[2:]
print(f64)
print(s64)
assert f64[18] == '1' # long displacement facility
def test_cast_int64_to_float(self):
with lltype.scoped_alloc(DOUBLE_ARRAY_PTR.TO, 16) as mem:
with ActivationRecordCtx(self):
with LiteralPoolCtx(self) as pool:
pool.int64(12345)
pool.addr(mem)
self.mc.LG(r.r12, loc.addr(0, r.r13))
# cast int to float!
self.mc.CDGBR(r.f0, r.r12)
self.mc.LG(r.r11, loc.addr(8, r.r13))
self.mc.STD(r.f0, loc.addr(0, r.r11))
run_asm(self.a)
assert isclose(mem[0], 12345.0)
def test_cast_single_float_to_float(self):
with lltype.scoped_alloc(DOUBLE_ARRAY_PTR.TO, 16) as mem:
with ActivationRecordCtx(self):
with LiteralPoolCtx(self) as pool:
pool.single_float(6.66)
pool.addr(mem)
self.mc.LEY(r.f1, loc.addr(0, r.r13))
## cast short to long!
self.mc.LDEBR(r.f0, r.f1)
self.mc.LG(r.r11, loc.addr(4, r.r13))
self.mc.STD(r.f0, loc.addr(0, r.r11))
run_asm(self.a)
assert isclose(mem[0], 6.66, abs_tol=0.05)
def test_cast_int64_to_float(self):
with lltype.scoped_alloc(DOUBLE_ARRAY_PTR.TO, 16) as mem:
with ActivationRecordCtx(self):
with LiteralPoolCtx(self) as pool:
pool.int64(12345)
pool.addr(mem)
self.mc.LG(r.r12, loc.addr(0, r.r13))
# cast int to float!
self.mc.CDGBR(r.f0, r.r12)
self.mc.LG(r.r11, loc.addr(8, r.r13))
self.mc.STD(r.f0, loc.addr(0, r.r11))
run_asm(self.a)
assert isclose(mem[0], 12345.0)
def test_cast_single_float_to_float(self):
with lltype.scoped_alloc(DOUBLE_ARRAY_PTR.TO, 16) as mem:
with ActivationRecordCtx(self):
with LiteralPoolCtx(self) as pool:
pool.single_float(6.66)
pool.addr(mem)
self.mc.LEY(r.f1, loc.addr(0, r.r13))
## cast short to long!
self.mc.LDEBR(r.f0, r.f1)
self.mc.LG(r.r11, loc.addr(4, r.r13))
self.mc.STD(r.f0, loc.addr(0, r.r11))
run_asm(self.a)
assert isclose(mem[0], 6.66, abs_tol=0.05)
def test_float_mul_to_memory(self, v1, v2, res):
with lltype.scoped_alloc(DOUBLE_ARRAY_PTR.TO, 16) as mem:
with ActivationRecordCtx(self):
with LiteralPoolCtx(self) as pool:
pool.float(v1)
pool.float(v2)
pool.addr(mem)
self.mc.LD(r.f0, loc.addr(0, r.r13))
self.mc.MDB(r.f0, loc.addr(8, r.r13))
self.mc.LG(r.r11, loc.addr(16, r.r13))
self.mc.STD(r.f0, loc.addr(0, r.r11))
self.a.jmpto(r.r14)
run_asm(self.a)
assert isclose(mem[0], res)
def test_float_mul_to_memory(self, v1, v2, res):
with lltype.scoped_alloc(DOUBLE_ARRAY_PTR.TO, 16) as mem:
with ActivationRecordCtx(self):
with LiteralPoolCtx(self) as pool:
pool.float(v1)
pool.float(v2)
pool.addr(mem)
self.mc.LD(r.f0, loc.addr(0, r.r13))
self.mc.MDB(r.f0, loc.addr(8, r.r13))
self.mc.LG(r.r11, loc.addr(16, r.r13))
self.mc.STD(r.f0, loc.addr(0, r.r11))
self.a.jmpto(r.r14)
run_asm(self.a)
assert isclose(mem[0],res)
def test_or_imm(self):
self.a.mc.OIHH(r.r2, loc.imm(0xffff))
self.a.mc.OIHL(r.r2, loc.imm(0xffff))
self.a.mc.OILL(r.r2, loc.imm(0xffff))
self.a.mc.OILH(r.r2, loc.imm(0xffff))
self.a.jmpto(r.r14)
assert run_asm(self.a) == -1
def test_and_imm(self):
self.a.mc.NIHH(r.r2, loc.imm(0))
self.a.mc.NIHL(r.r2, loc.imm(0))
self.a.mc.NILL(r.r2, loc.imm(0))
self.a.mc.NILH(r.r2, loc.imm(0))
self.a.jmpto(r.r14)
assert run_asm(self.a) == 0
def test_risbgn(self):
n = 16
l = loc
self.a.mc.load_imm(r.r2, 0xffFFffFF)
self.a.mc.RISBG(r.r2, r.r2, l.imm(60), l.imm(0x80 | 63), l.imm(64-n))
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == 15
def test_and_7_with_risbgn(self):
n = 13
l = loc
self.a.mc.load_imm(r.r2, 7<<n)
self.a.mc.RISBG(r.r2, r.r2, l.imm(61), l.imm(0x80 | 63), l.imm(64-n))
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == 7
def test_complement(self):
self.a.mc.load_imm(r.r2, 0)
#self.a.mc.LCGR(r.r2, r.r2)
self.a.mc.XIHF(r.r2, loc.imm(0xffffFFFF))
self.a.mc.XILF(r.r2, loc.imm(0xffffFFFF))
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == -1
def test_literal_pool(self):
gen_func_prolog(self.a.mc)
self.a.mc.BRAS(r.r13, loc.imm(8 + self.mc.BRAS_byte_count))
self.a.mc.write('\x08\x07\x06\x05\x04\x03\x02\x01')
self.a.mc.LG(r.r2, loc.addr(0, r.r13))
gen_func_epilog(self.a.mc)
assert run_asm(self.a) == 0x0807060504030201
def test_and_7_with_risbgn(self):
n = 13
l = loc
self.a.mc.load_imm(r.r2, 7 << n)
self.a.mc.RISBG(r.r2, r.r2, l.imm(61), l.imm(0x80 | 63), l.imm(64 - n))
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == 7
def test_align(self, p, v):
WORD = 8
self.a.mc.load_imm(r.r2, p)
self.a.mc.LGHI(r.r0, loc.imm(~(WORD-1)))
self.a.mc.NGR(r.r2, r.r0)
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == v
def test_or_imm(self):
self.a.mc.OIHH(r.r2, loc.imm(0xffff))
self.a.mc.OIHL(r.r2, loc.imm(0xffff))
self.a.mc.OILL(r.r2, loc.imm(0xffff))
self.a.mc.OILH(r.r2, loc.imm(0xffff))
self.a.jmpto(r.r14)
assert run_asm(self.a) == -1
def test_and_imm(self):
self.a.mc.NIHH(r.r2, loc.imm(0))
self.a.mc.NIHL(r.r2, loc.imm(0))
self.a.mc.NILL(r.r2, loc.imm(0))
self.a.mc.NILH(r.r2, loc.imm(0))
self.a.jmpto(r.r14)
assert run_asm(self.a) == 0
def test_literal_pool(self):
gen_func_prolog(self.a.mc)
self.a.mc.BRAS(r.r13, loc.imm(8 + self.mc.BRAS_byte_count))
self.a.mc.write('\x08\x07\x06\x05\x04\x03\x02\x01')
self.a.mc.LG(r.r2, loc.addr(0, r.r13))
gen_func_epilog(self.a.mc)
assert run_asm(self.a) == 0x0807060504030201
def test_risbgn(self):
n = 16
l = loc
self.a.mc.load_imm(r.r2, 0xffFFffFF)
self.a.mc.RISBG(r.r2, r.r2, l.imm(60), l.imm(0x80 | 63), l.imm(64 - n))
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == 15
def test_complement(self):
self.a.mc.load_imm(r.r2, 0)
#self.a.mc.LCGR(r.r2, r.r2)
self.a.mc.XIHF(r.r2, loc.imm(0xffffFFFF))
self.a.mc.XILF(r.r2, loc.imm(0xffffFFFF))
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == -1
def test_align(self, p, v):
WORD = 8
self.a.mc.load_imm(r.r2, p)
self.a.mc.LGHI(r.r0, loc.imm(~(WORD - 1)))
self.a.mc.NGR(r.r2, r.r0)
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == v
def test_nill(self):
self.a.mc.load_imm(r.r2, 1)
self.a.mc.load_imm(r.r3, 0x010001)
self.a.mc.NILL(r.r3, loc.imm(0xFFFF))
self.a.mc.BCR(con.EQ, r.r14) # should not branch
self.a.mc.load_imm(r.r2, 0) # should return here
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == 0
def test_load_byte_zero_extend(self):
adr = self.a.datablockwrapper.malloc_aligned(16, 16)
data = rffi.cast(rffi.CArrayPtr(rffi.ULONG), adr)
data[0] = rffi.cast(rffi.ULONG, intmask(0xffffFFFFffffFF02))
self.a.mc.load_imm(r.r3, adr+7)
self.a.mc.LLGC(r.r2, loc.addr(0,r.r3))
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == 2
def test_float_to_memory(self, v1, v2, res):
with lltype.scoped_alloc(DOUBLE_ARRAY_PTR.TO, 16) as mem:
with ActivationRecordCtx(self):
with self.label('lit'):
self.mc.BRAS(r.r13, loc.imm(0))
self.mc.write(BFL(v1))
self.mc.write(BFL(v2))
self.mc.write(ADDR(mem))
self.jump_here(self.mc.BRAS, 'lit')
self.mc.LD(r.f0, loc.addr(0, r.r13))
self.mc.LD(r.f1, loc.addr(8, r.r13))
self.mc.ADBR(r.f0, r.f1)
self.mc.LG(r.r11, loc.addr(16, r.r13))
self.mc.STD(r.f0, loc.addr(0, r.r11))
self.a.jmpto(r.r14)
run_asm(self.a)
assert isclose(mem[0],res)
def test_nill(self):
self.a.mc.load_imm(r.r2, 1)
self.a.mc.load_imm(r.r3, 0x010001)
self.a.mc.NILL(r.r3, loc.imm(0xFFFF))
self.a.mc.BCR(con.EQ, r.r14) # should not branch
self.a.mc.load_imm(r.r2, 0) # should return here
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == 0
def test_float_to_memory(self, v1, v2, res):
with lltype.scoped_alloc(DOUBLE_ARRAY_PTR.TO, 16) as mem:
with ActivationRecordCtx(self):
with self.label('lit'):
self.mc.BRAS(r.r13, loc.imm(0))
self.mc.write(BFL(v1))
self.mc.write(BFL(v2))
self.mc.write(ADDR(mem))
self.jump_here(self.mc.BRAS, 'lit')
self.mc.LD(r.f0, loc.addr(0, r.r13))
self.mc.LD(r.f1, loc.addr(8, r.r13))
self.mc.ADBR(r.f0, r.f1)
self.mc.LG(r.r11, loc.addr(16, r.r13))
self.mc.STD(r.f0, loc.addr(0, r.r11))
self.a.jmpto(r.r14)
run_asm(self.a)
assert isclose(mem[0], res)
def test_load_byte_zero_extend(self):
adr = self.a.datablockwrapper.malloc_aligned(16, 16)
data = rffi.cast(rffi.CArrayPtr(rffi.ULONG), adr)
data[0] = rffi.cast(rffi.ULONG, intmask(0xffffFFFFffffFF02))
self.a.mc.load_imm(r.r3, adr + 7)
self.a.mc.LLGC(r.r2, loc.addr(0, r.r3))
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == 2
def test_or_bitpos_0to15(self):
self.a.mc.XGR(r.r2, r.r2)
self.a.mc.OIHH(r.r2, loc.imm(0x0000))
self.a.mc.OIHL(r.r2, loc.imm(0x0000))
self.a.mc.OILL(r.r2, loc.imm(0x0000))
self.a.mc.OILH(r.r2, loc.imm(0x300c))
self.a.jmpto(r.r14)
res = run_asm(self.a)
assert res == 0x00000000300c0000
def test_or_bitpos_0to15(self):
self.a.mc.XGR(r.r2, r.r2)
self.a.mc.OIHH(r.r2, loc.imm(0x0000))
self.a.mc.OIHL(r.r2, loc.imm(0x0000))
self.a.mc.OILL(r.r2, loc.imm(0x0000))
self.a.mc.OILH(r.r2, loc.imm(0x300c))
self.a.jmpto(r.r14)
res = run_asm(self.a)
assert res == 0x00000000300c0000
def test_uint_rshift(self):
self.a.mc.XGR(r.r4, r.r4)
self.a.mc.LGFI(r.r5, loc.imm(63))
self.a.mc.NGR(r.r4, r.r5)
self.a.mc.LGFI(r.r3, loc.imm(18))
self.a.mc.LGFI(r.r2, loc.imm(-1))
self.a.mc.SRLG(r.r2, r.r3, loc.addr(18))
self.a.jmpto(r.r14)
assert run_asm(self.a) == 0
def test_uint_rshift(self):
self.a.mc.XGR(r.r4, r.r4)
self.a.mc.LGFI(r.r5, loc.imm(63))
self.a.mc.NGR(r.r4, r.r5)
self.a.mc.LGFI(r.r3, loc.imm(18))
self.a.mc.LGFI(r.r2, loc.imm(-1))
self.a.mc.SRLG(r.r2, r.r3, loc.addr(18))
self.a.jmpto(r.r14)
assert run_asm(self.a) == 0
def test_simple_loop(self):
self.a.mc.LGHI(r.r3, loc.imm(2**15-1))
self.a.mc.LGHI(r.r4, loc.imm(1))
L1 = self.a.mc.get_relative_pos()
self.a.mc.SGR(r.r3, r.r4)
LJ = self.a.mc.get_relative_pos()
self.a.mc.BRCL(con.GT, loc.imm(L1-LJ))
self.a.mc.LGR(r.r2, r.r3)
self.a.jmpto(r.r14)
assert run_asm(self.a) == 0
def test_float(self):
with ActivationRecordCtx(self):
with self.label('lit'):
self.mc.BRAS(r.r13, loc.imm(0))
self.mc.write(BFL(-15.0))
self.jump_here(self.mc.BRAS, 'lit')
self.mc.LD(r.f0, loc.addr(0, r.r13))
self.mc.CGDBR(r.r2, msk.RND_CURMODE, r.f0)
self.a.jmpto(r.r14)
assert run_asm(self.a) == -15
def test_ag_overflow(self):
self.a.mc.BRC(con.ANY, loc.imm(4+8+8))
self.a.mc.write('\x7f' + '\xff' * 7)
self.a.mc.write('\x7f' + '\xff' * 7)
self.a.mc.LARL(r.r5, loc.imm(-8))
self.a.mc.LG(r.r4, loc.addr(8,r.r5))
self.a.mc.AG(r.r4, loc.addr(0,r.r5))
self.a.mc.LGR(r.r2, r.r4)
self.a.jmpto(r.r14)
assert run_asm(self.a) == -2
def test_load_byte_and_imm(self):
adr = self.a.datablockwrapper.malloc_aligned(16, 16)
data = rffi.cast(rffi.CArrayPtr(rffi.ULONG), adr)
data[0] = rffi.cast(rffi.ULONG, intmask(0xffffFFFFffff0001))
self.a.mc.load_imm(r.r3, adr)
self.a.mc.LG(r.r2, loc.addr(0, r.r3))
self.a.mc.LLGC(r.r2, loc.addr(7, r.r3))
self.a.mc.NILL(r.r2, loc.imm(0x0))
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == 0
def test_load_byte_and_imm(self):
adr = self.a.datablockwrapper.malloc_aligned(16, 16)
data = rffi.cast(rffi.CArrayPtr(rffi.ULONG), adr)
data[0] = rffi.cast(rffi.ULONG, intmask(0xffffFFFFffff0001))
self.a.mc.load_imm(r.r3, adr)
self.a.mc.LG(r.r2, loc.addr(0,r.r3))
self.a.mc.LLGC(r.r2, loc.addr(7,r.r3))
self.a.mc.NILL(r.r2, loc.imm(0x0))
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == 0
def test_simple_loop(self):
self.a.mc.LGHI(r.r3, loc.imm(2**15 - 1))
self.a.mc.LGHI(r.r4, loc.imm(1))
L1 = self.a.mc.get_relative_pos()
self.a.mc.SGR(r.r3, r.r4)
LJ = self.a.mc.get_relative_pos()
self.a.mc.BRCL(con.GT, loc.imm(L1 - LJ))
self.a.mc.LGR(r.r2, r.r3)
self.a.jmpto(r.r14)
assert run_asm(self.a) == 0
def test_ag_overflow(self):
self.a.mc.BRC(con.ANY, loc.imm(4 + 8 + 8))
self.a.mc.write('\x7f' + '\xff' * 7)
self.a.mc.write('\x7f' + '\xff' * 7)
self.a.mc.LARL(r.r5, loc.imm(-8))
self.a.mc.LG(r.r4, loc.addr(8, r.r5))
self.a.mc.AG(r.r4, loc.addr(0, r.r5))
self.a.mc.LGR(r.r2, r.r4)
self.a.jmpto(r.r14)
assert run_asm(self.a) == -2
def test_float(self):
with ActivationRecordCtx(self):
with self.label('lit'):
self.mc.BRAS(r.r13, loc.imm(0))
self.mc.write(BFL(-15.0))
self.jump_here(self.mc.BRAS, 'lit')
self.mc.LD(r.f0, loc.addr(0, r.r13))
self.mc.CGDBR(r.r2, msk.RND_CURMODE, r.f0)
self.a.jmpto(r.r14)
assert run_asm(self.a) == -15
def test_facility(self):
adr = self.a.datablockwrapper.malloc_aligned(16, 16)
self.a.mc.load_imm(r.r2, adr)
self.a.mc.STFLE(loc.addr(0,r.r2))
self.a.mc.BCR(con.ANY, r.r14)
run_asm(self.a)
fac_data = rffi.cast(rffi.CArrayPtr(rffi.ULONG), adr)
f64 = bin(fac_data[0])[2:]
s64 = bin(fac_data[1])[2:]
print(f64)
print(s64)
for i,c in enumerate(f64):
print('index: %d is set? %s' % (i,c))
assert f64[1] == '1' # The z/Architecture architectural mode is installed.
assert f64[2] == '1' # The z/Architecture architectural mode is active.
assert f64[18] == '1' # long displacement facility
assert f64[21] == '1' # extended immediate facility
assert f64[34] == '1' # general instruction facility
assert f64[41] == '1' # floating-point-support-enhancement
def test_facility(self):
adr = self.a.datablockwrapper.malloc_aligned(16, 16)
self.a.mc.load_imm(r.r2, adr)
self.a.mc.STFLE(loc.addr(0,r.r2))
self.a.mc.BCR(con.ANY, r.r14)
run_asm(self.a)
fac_data = rffi.cast(rffi.CArrayPtr(rffi.ULONG), adr)
f64 = bin(fac_data[0])[2:]
s64 = bin(fac_data[1])[2:]
print(f64)
print(s64)
for i,c in enumerate(f64):
print('index: %d is set? %s' % (i,c))
assert f64[1] == '1' # The z/Architecture architectural mode is installed.
assert f64[2] == '1' # The z/Architecture architectural mode is active.
assert f64[18] == '1' # long displacement facility
assert f64[21] == '1' # extended immediate facility
assert f64[34] == '1' # general instruction facility
assert f64[41] == '1' # floating-point-support-enhancement
def test_float_cmp(self):
with ActivationRecordCtx(self):
with LiteralPoolCtx(self) as pool:
pool.float(1.0)
pool.float(2.0)
self.mc.LD(r.f0, loc.addr(0, r.r13))
self.mc.LD(r.f1, loc.addr(8, r.r13))
self.mc.CDBR(r.f0, r.f1)
self.mc.LGHI(r.r2, loc.imm(0))
self.mc.BCR(con.EQ, r.r14) # must not branch
self.mc.LGHI(r.r2, loc.imm(1))
self.a.jmpto(r.r14)
assert run_asm(self.a) == 1
def test_float_cmp(self):
with ActivationRecordCtx(self):
with LiteralPoolCtx(self) as pool:
pool.float(1.0)
pool.float(2.0)
self.mc.LD(r.f0, loc.addr(0, r.r13))
self.mc.LD(r.f1, loc.addr(8, r.r13))
self.mc.CDBR(r.f0, r.f1)
self.mc.LGHI(r.r2, loc.imm(0))
self.mc.BCR(con.EQ, r.r14) # must not branch
self.mc.LGHI(r.r2, loc.imm(1))
self.a.jmpto(r.r14)
assert run_asm(self.a) == 1
def test_printf(self):
with ActivationRecordCtx(self):
with self.label('lit'):
self.mc.BRAS(r.r13, loc.imm(0))
for c in "hello syscall\n":
self.mc.writechar(c)
self.jump_here(self.mc.BRAS, 'lit')
self.mc.LGHI(r.r2, loc.imm(1)) # stderr
self.mc.LA(r.r3, loc.addr(0, r.r13)) # char*
self.mc.LGHI(r.r4, loc.imm(14)) # length
# write sys call
self.mc.SVC(loc.imm(4))
self.a.jmpto(r.r14)
assert run_asm(self.a) == 14
def test_printf(self):
with ActivationRecordCtx(self):
with self.label('lit'):
self.mc.BRAS(r.r13, loc.imm(0))
for c in "hello syscall\n":
self.mc.writechar(c)
self.jump_here(self.mc.BRAS, 'lit')
self.mc.LGHI(r.r2, loc.imm(1)) # stderr
self.mc.LA(r.r3, loc.addr(0, r.r13)) # char*
self.mc.LGHI(r.r4, loc.imm(14)) # length
# write sys call
self.mc.SVC(loc.imm(4))
self.a.jmpto(r.r14)
assert run_asm(self.a) == 14
def test_simple_func(self):
# enter
self.a.mc.STMG(r.r11, r.r15, loc.addr(-96, r.SP))
self.a.mc.AHI(r.SP, loc.imm(-96))
# from the start of BRASL to end of jmpto there are 8+6 bytes
self.a.mc.BRASL(r.r14, loc.imm(8 + 6))
self.a.mc.LMG(r.r11, r.r15, loc.addr(0, r.SP))
self.a.jmpto(r.r14)
addr = self.a.mc.get_relative_pos()
assert addr & 0x1 == 0
gen_func_prolog(self.a.mc)
self.a.mc.LGHI(r.r2, loc.imm(321))
gen_func_epilog(self.a.mc)
assert run_asm(self.a) == 321
def test_simple_func(self):
# enter
self.a.mc.STMG(r.r11, r.r15, loc.addr(-96, r.SP))
self.a.mc.AHI(r.SP, loc.imm(-96))
# from the start of BRASL to end of jmpto there are 8+6 bytes
self.a.mc.BRASL(r.r14, loc.imm(8+6))
self.a.mc.LMG(r.r11, r.r15, loc.addr(0, r.SP))
self.a.jmpto(r.r14)
addr = self.a.mc.get_relative_pos()
assert addr & 0x1 == 0
gen_func_prolog(self.a.mc)
self.a.mc.LGHI(r.r2, loc.imm(321))
gen_func_epilog(self.a.mc)
assert run_asm(self.a) == 321
def test_recursion(self):
with ActivationRecordCtx(self):
with self.label('lit'):
self.mc.BRAS(r.r13, loc.imm(0))
self.mc.write('\x00\x00\x00\x00\x00\x00\x00\x00')
self.jump_here(self.mc.BRAS, 'lit')
# recurse X times
self.mc.XGR(r.r2, r.r2)
self.mc.LGHI(r.r9, loc.imm(15))
with self.label('L1'):
self.mc.BRAS(r.r14, loc.imm(0))
with ActivationRecordCtx(self, 'rec'):
self.mc.AGR(r.r2, r.r9)
self.mc.AHI(r.r9, loc.imm(-1))
# if not entered recursion, return from activation record
# implicitly generated here by with statement
self.mc.BRC(con.GT, loc.imm(self.pos('rec') - self.cur()))
self.jump_here(self.mc.BRAS, 'L1')
# call rec... recursivly
self.jump_to(r.r14, 'rec')
self.a.jmpto(r.r14)
assert run_asm(self.a) == 120
def test_recursion(self):
with ActivationRecordCtx(self):
with self.label('lit'):
self.mc.BRAS(r.r13, loc.imm(0))
self.mc.write('\x00\x00\x00\x00\x00\x00\x00\x00')
self.jump_here(self.mc.BRAS, 'lit')
# recurse X times
self.mc.XGR(r.r2, r.r2)
self.mc.LGHI(r.r9, loc.imm(15))
with self.label('L1'):
self.mc.BRAS(r.r14, loc.imm(0))
with ActivationRecordCtx(self, 'rec'):
self.mc.AGR(r.r2, r.r9)
self.mc.AHI(r.r9, loc.imm(-1))
# if not entered recursion, return from activation record
# implicitly generated here by with statement
self.mc.BRC(con.GT, loc.imm(self.pos('rec') - self.cur()))
self.jump_here(self.mc.BRAS, 'L1')
# call rec... recursivly
self.jump_to(r.r14, 'rec')
self.a.jmpto(r.r14)
assert run_asm(self.a) == 120
def test_stmg(self):
self.mc.LGR(r.r2, r.r15)
self.a.jmpto(r.r14)
print hex(run_asm(self.a))
def test_generate_max_integral_64bit(self):
self.a.mc.LGHI(r.r2, loc.imm(-1))
self.a.mc.RISBG(r.r2, r.r2, loc.imm(1), loc.imm(0x80 | 63), loc.imm(0))
self.a.jmpto(r.r14)
assert run_asm(self.a) == 2**63-1
def test_generate_sign_bit(self):
self.a.mc.LGHI(r.r2, loc.imm(-1))
self.a.mc.RISBG(r.r2, r.r2, loc.imm(0), loc.imm(0x80 | 0), loc.imm(0))
self.a.jmpto(r.r14)
assert run_asm(self.a) == -2**63
def test_xor(self):
self.a.mc.XGR(r.r2, r.r2)
self.a.jmpto(r.r14)
assert run_asm(self.a) == 0
def test_generate_max_integral_64bit(self):
self.a.mc.LGHI(r.r2, loc.imm(-1))
self.a.mc.RISBG(r.r2, r.r2, loc.imm(1), loc.imm(0x80 | 63), loc.imm(0))
self.a.jmpto(r.r14)
assert run_asm(self.a) == 2**63 - 1
def test_generate_sign_bit(self):
self.a.mc.LGHI(r.r2, loc.imm(-1))
self.a.mc.RISBG(r.r2, r.r2, loc.imm(0), loc.imm(0x80 | 0), loc.imm(0))
self.a.jmpto(r.r14)
assert run_asm(self.a) == -2**63
def test_stmg(self):
self.mc.LGR(r.r2, r.r15)
self.a.jmpto(r.r14)
print hex(run_asm(self.a))
def test_xor(self):
self.a.mc.XGR(r.r2, r.r2)
self.a.jmpto(r.r14)
assert run_asm(self.a) == 0
