def PartCached(library, symbol, footprint, dest):
#kicad_lib = SchLib(library, tool=KICAD) # Open a KiCad library.
sklib = 'templates/' + library + '_' + symbol
template = None
if isfile('%s_sklib.py' % sklib):
skidl_lib = SchLib(
sklib,
tool=SKIDL) # Create a SKiDL library object from the new file.
template = Part(
skidl_lib, symbol, footprint=footprint, dest=dest
) # Instantiate a diode from the SKiDL library. if dest == TEMPLATE:
else:
template = Part(
library, symbol, dest=dest
) # Instantiate a diode from the SKiDL library. if dest == TEMPLATE:
template_lib = SchLib(tool=SKIDL).add_parts(*[template])
template_lib.export('templates/' + library + '_' + symbol)
template = Part(
library, symbol, footprint=footprint, dest=dest
) # Instantiate a diode from the SKiDL library. if dest == TEMPLATE:
template.lib = library
return template
def generate_esp():
"""Generate ESP-module code to circuit"""
subcircuit_label('esp')
global U1
U1 = Part('RF_Module', 'ESP-12E', footprint='RF_Module:ESP-12E')
U1['VCC'] += Net.fetch('+3V3')
U1['GND'] += Net.fetch('GND')
U1['EN'] & R('10k') & Net.fetch('+3V3')
U1['GPIO15'] & R('4k7') & Net.fetch('GND')
@subcircuit
def generate_power_led():
"""Generate led connected to ESP GPI0 that is on after boot"""
subcircuit_label('power_led')
led = Part('Device', 'LED', footprint='LED_SMD:LED_1206_3216Metric')
U1['GPIO0'] & (R('1k') & led & Net.fetch('+3V3'))
generate_power_led()
# Generate button for pulling ESP RST pin to low (e.g. reset)
sw_reset = Part('Switch',
'SW_Push',
footprint="Button_Switch_SMD:SW_SPST_B3U-1000P")
sw_reset[1] += Net.fetch('RST')
sw_reset[2] += Net.fetch('GND')
# Generate ESP serial networks
U1['TX'] += Net.fetch('tx')
U1['RX'] += Net.fetch('rx')
def cad(self) -> Subcircuit:
"""
Generate a physical circuit for use in a CAD netlist.
:returns: Subcircuit instance with pins [vin, vout, gnd]
"""
self.r = Part(
"Device",
"R",
value="{}".format(self.rval),
footprint=resistor_footprint(self.rval),
)
self.c = Part(
"Device",
"C",
value="{}".format(self.cval),
footprint=capacitor_footprint(self.cval),
)
self.rbase = Part("device",
"R",
value="100",
footprint=resistor_footprint(100))
self.d = Part("Diode", "1N4001")
# TODO should use a more "intelligent" selection process
self.npn = Part("Transistor_BJT", "2STN1550")
self._connect_components()
return Subcircuit(pins=[self.r[1], self.transistor[3], self.c[2]])
def spice(self, use_parasitics: bool = True) -> Subcircuit:
"""
Generate a spice netlist for simulation.
:param use_parasitics: Use non-ideal, parasitic models for
resistors and capacitors.
:returns: [in1, in2, out, gnd]
"""
self.low_threshold = self.vdd / 2 - 0.5
self.high_threshold = self.vdd / 2 + 0.5
if use_parasitics:
self.r = resistor_equiv(value=self.rval)
self.c = capacitor_equiv(value=self.cval)
else:
self.r = Part("pyspice", "R", value=self.rval)
self.c = Part("pyspice", "C", value=self.cval)
self.adc_model = XspiceModel(
"adc",
"adc_bridge",
in_low=self.low_threshold,
in_high=self.high_threshold,
rise_delay=1e-12,
fall_delay=1e-12,
)
self.adc = Part("pyspice",
"A",
io=["anlg_in[]", "dig_out[]"],
model=self.adc_model)
self.dac = Part(
"pyspice",
"A",
io=["dig_in[]", "anlg_out[]"],
model=XspiceModel("dac",
"dac_bridge",
out_low=0.0,
out_high=self.vdd),
)
self.xor = Part(
"pyspice",
"A",
io=["in[]", "out"],
model=XspiceModel(
"xor",
"d_xor",
rise_delay=1e-12,
fall_delay=1e-12,
input_load=1e-12,
),
)
self._connect_components()
return Subcircuit(pins=[
self.adc["anlg_in"][0],
self.adc["anlg_in"][1],
self.c[1],
self.c[2],
])
def generate_mcp73831():
"""Generate MCP73831 battery management IC"""
subcircuit_label('mcp73831')
BATTERYMANAGER = Part('Battery_Management',
'MCP73831-2-OT',
footprint='Package_TO_SOT_SMD:SOT-23-5')
BM_LED = Part('Device', 'LED', footprint='LED_SMD:LED_1206_3216Metric')
BATTERYMANAGER['STAT'] & R('1k') & BM_LED & Net.fetch('+VBus')
BATTERYMANAGER['VSS'] += Net.fetch('GND')
Net.fetch('GND') & R('2k') & BATTERYMANAGER['PROG']
Net.fetch('+VLipo') & C('10uF') & Net.fetch('GND')
def spice(self) -> Subcircuit:
"""
:returns: [in, out, vp, vm, gnd]
"""
self.amp = Part(self.amp_name, self.amp_name)
self.r1 = Part("pyspice", "R", value=self.r1_val)
self.r2 = Part("pyspice", "R", value=self.r2_val)
self._connect_components()
return Subcircuit(pins=[
self.r1["p"],
self.r2["p"],
self.amp["3"],
self.amp["4"],
self.amp["1"],
])
def subcircuit_label(name):
"""Creates subcircuit label footprint"""
Part('./library/Skimibowi.lib',
'Label',
ref=" ",
value=name,
footprint=f"Skimibowi:label{len(name)}")
def generate_cp2104():
"""Generate CP2104 usb uart circuitry"""
subcircuit_label('cp2104')
cp2104 = Part(
'Interface_USB',
'CP2104',
footprint="Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm")
cp2104['VIO'] += Net.fetch('+3V3')
cp2104['VDD'] += Net.fetch('+3V3')
cp2104['REGIN'] += Net.fetch('+3V3')
Net.fetch('GND') & C('10uF') & (cp2104['VIO'] | cp2104['VDD']
| cp2104['REGIN'])
cp2104['GND'] += Net.fetch('GND')
cp2104['VBUS'] += Net.fetch('+VBus')
cp2104['D+'] += Net.fetch('USBD+')
cp2104['D-'] += Net.fetch('USBD-')
cp2104['TXD'] & R('470') & Net.fetch('rx')
cp2104['RXD'] & R('470') & Net.fetch('tx')
cp2104['DTR'] += Net.fetch('DTR')
cp2104['RTS'] += Net.fetch('RTS')
# Support ROM programming
cp2104['VPP'] & C('4.7uF') & Net.fetch('GND')
# Optional, improves stability
cp2104['RST'] & R('4k7') & Net.fetch('+3V3')
def generate_esp_uart_reset():
"""Generate reset circuitry for ESP"""
subcircuit_label('esp_uart_reset')
Q1 = Part('Device',
'Q_NPN_BEC',
value='mmbt2222',
footprint='Package_TO_SOT_SMD:SOT-23')
Q2 = Part('Device',
'Q_NPN_BEC',
value='mmbt2222',
footprint='Package_TO_SOT_SMD:SOT-23')
Net.fetch('DTR') & R('10k') & Q1['B']
Net.fetch('RTS') & R('10k') & Q2['B']
Net.fetch('DTR') & Q2['E']
Net.fetch('RTS') & Q1['E']
Q1['C'] & Net.fetch('RST')
Q2['C'] & Net.fetch('GPIO0')
def generate_wemos_d1_mini():
"""Generate Wemos D1 footprint"""
subcircuit_label('wemos_d1_mini')
global U1
U1 = Part('MCU_Module',
'WeMOs_D1_mini',
footprint='Module:WEMOS_D1_mini_light')
U1['5V'] += Net.fetch('+VBatt')
U1['GND'] += Net.fetch('GND')
def part_template(self):
part = Part('Switch',
'SW_DPST',
footprint=self.footprint,
dest=TEMPLATE)
part.set_pin_alias('ip', 1)
part.set_pin_alias('in', 3)
part.set_pin_alias('op', 2)
part.set_pin_alias('on', 4)
return part
def construct(
self,
n1: Net = None,
n2: Net = None,
):
"""
:param n1: Net tied to node 1 of the resistor. If left as
None, this will have to be set later.
:param n2: Net tied to node 2 of the resistor. If left as
None, this will have to be set later.
"""
self.cad = Part("Device", "R", footprint=self.footprint.to_skidl())
def capacitor_equiv(
value: float,
rp: float = 500e6,
rs: float = 50e-3,
l: float = None,
srf: float = 100e6,
) -> Subcircuit:
"""
Non-ideal capacitor equivalent circuit for use in a SPICE
simulation.
Args:
value: capacitance value (farads)
rp: parallel (insulation) resistance (ohms)
rs: ESR (ohms)
l: series inductance (henrys)
Returns:
Subcircuit consisting of attachment pins.
"""
if l is None:
if srf is None:
raise ValueError(
"Must either specify inductance or self-resonant frequency "
"for parasitic capacitor.")
l = 1 / (((2 * np.pi * srf)**2) * value)
# ============================= parts ============================
rseries = Part("pyspice", "R", value=rs)
rparallel = Part("pyspice", "R", value=rp)
lseries = Part("pyspice", "L", value=l)
cseries = Part("pyspice", "C", value=value)
# ========================== connections =========================
rseries[1] += rparallel[1]
rseries[2] += lseries[1]
lseries[2] += cseries[1]
cseries[2] += rparallel[2]
return Subcircuit(pins=[rseries[1], cseries[2]])
def spice(self, use_parasitics: bool = True) -> Subcircuit:
"""
Generate a spice netlist for simulation.
:param use_parasitics: Use non-ideal, parasitic models for
resistors and capacitors.
"""
if use_parasitics:
self.r = resistor_equiv(value=self.rval)
self.c = capacitor_equiv(value=self.cval)
# self.rbase = resistor_equiv(value=100)
else:
self.r = Part("pyspice", "R", value=self.rval)
self.c = Part("pyspice", "C", value=self.cval)
self.rbase = Part("pyspice", "R", value=100)
self.d = Part("pyspice", "D", model="1N4001")
lib_search_paths[SPICE].append("/home/matt/src/spicelib")
# self.transistor = Part("FQD13N06", "FQD13N06")
self.transistor = Part("pyspice", "Q", model="2N2222A")
self._connect_components()
return Subcircuit(pins=[self.r[1], self.transistor[3], self.c[2]])
def resistor_equiv(value: float,
c: float = 0.4e-12,
l: float = 2e-9) -> Subcircuit:
"""
Non-ideal resistor equivalent circuit for use in a SPICE
simulation.
Args:
value: resistance (ohms)
c: parallel capacitance (farads)
l: series inductance (henrys)
Returns:
Subcircuit consisting of attachment pins.
"""
# ============================= parts ============================
rseries = Part("pyspice", "R", value=value)
cparallel = Part("pyspice", "C", value=c)
lseries = Part("pyspice", "L", value=l)
# ========================== connections =========================
rseries[1] += cparallel[1], lseries[2]
rseries[2] += cparallel[2]
return Subcircuit(pins=[lseries[1], rseries[2]])
def generate_esp():
"""Generate ESP-module code to circuit"""
global U1
U1 = Part('RF_Module', 'ESP-12E', footprint='RF_Module:ESP-12E')
U1['VCC'] += Net.fetch('+VBatt')
U1['GND'] += Net.fetch('GND')
U1['EN'] & R('10k') & Net.fetch('+VBatt')
U1['GPIO15'] & R('4k7') & Net.fetch('GND')
U1['RST'] += Net.fetch('RST')
U1['GPIO16'] += Net.fetch('RST')
@subcircuit
def generate_power_led():
"""Generate led connected to ESP GPI0 that is on after boot"""
led = Part('Device', 'LED', footprint='LED_SMD:LED_1206_3216Metric')
U1['GPIO0'] & (R('1k') & led & Net.fetch('+VBatt'))
generate_power_led()
# Generate button for pulling ESP RST pin to low (e.g. reset)
sw_reset = Part('Switch',
'SW_Push',
footprint="Button_Switch_SMD:SW_SPST_B3U-1000P")
sw_reset[1] += Net.fetch('RST')
sw_reset[2] += Net.fetch('GND')
# Generate button for pulling pulling ESP GPIO0 low (e.g. flash mode when booting)
sw_flash = Part('Switch',
'SW_Push',
footprint="Button_Switch_SMD:SW_SPST_B3U-1000P")
sw_flash[1] += U1['GPIO0']
sw_flash[2] += Net.fetch('GND')
def generate_esp():
"""Generate ESP-module code to circuit"""
global U1
U1 = Part('RF_Module', 'ESP-12E', footprint='RF_Module:ESP-12E')
U1['VCC'] += Net.fetch('+VBatt')
U1['GND'] += Net.fetch('GND')
U1['EN'] & R('10k') & Net.fetch('+VBatt')
U1['GPIO15'] & R('4k7') & Net.fetch('GND')
@subcircuit
def generate_power_led():
"""Generate led connected to ESP GPI0 that is on after boot"""
led = Part('Device', 'LED', footprint='LED_SMD:LED_1206_3216Metric')
U1['GPIO0'] & (R('1k') & led & Net.fetch('+VBatt'))
generate_power_led()
def R(value):
"""Creates default resistor footprint"""
return Part('Device',
'R',
value=value,
footprint='Resistor_SMD:R_1206_3216Metric')
from skidl import SKIDL, TEMPLATE, Part, Pin, SchLib
SKIDL_lib_version = '0.0.1'
pspice = SchLib(tool=SKIDL).add_parts(*[
Part(name='0', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='CAP', dest=TEMPLATE, tool=SKIDL, do_erc=True, aliases=['C']),
Part(name='DIODE', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='INDUCTOR', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='ISOURCE', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='QNPN', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='QPNP', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='R',
dest=TEMPLATE,
tool=SKIDL,
keywords='R DEV',
description='Resistance',
ref_prefix='R',
num_units=1,
do_erc=True,
pins=[
Pin(num='1', name='~', func=Pin.PASSIVE, do_erc=True),
Pin(num='2', name='~', func=Pin.PASSIVE, do_erc=True)
]),
Part(name='VSOURCE', dest=TEMPLATE, tool=SKIDL, do_erc=True)
])
Part(name='AK5392VS',
dest=TEMPLATE,
tool=SKIDL,
keywords='24bit Sigma Delta Audio ADC 2ch',
description=
'AK5392-VS, Enhanced Audio ADC, 2 channels Sigma Delta, 24bit, SO28',
ref_prefix='U',
num_units=1,
fplist=['SO*'],
do_erc=True,
pins=[
Pin(num='1', name='VREFL', func=Pin.OUTPUT, do_erc=True),
Pin(num='2', name='GNDL', func=Pin.PWRIN, do_erc=True),
Pin(num='3', name='VCOML', func=Pin.OUTPUT, do_erc=True),
Pin(num='4', name='AINL+', do_erc=True),
Pin(num='5', name='AINL-', do_erc=True),
Pin(num='6', name='ZCAL', do_erc=True),
Pin(num='7', name='VD', func=Pin.PWRIN, do_erc=True),
Pin(num='8', name='DGND', func=Pin.PWRIN, do_erc=True),
Pin(num='9', name='CAL', func=Pin.OUTPUT, do_erc=True),
Pin(num='10', name='~RST~', do_erc=True),
Pin(num='20', name='TEST', do_erc=True),
Pin(num='11', name='SMODE2', do_erc=True),
Pin(num='21', name='BGND', func=Pin.PWRIN, do_erc=True),
Pin(num='12', name='SMODE1', do_erc=True),
Pin(num='22', name='AGND', func=Pin.PWRIN, do_erc=True),
Pin(num='13', name='LRCK', func=Pin.BIDIR, do_erc=True),
Pin(num='23', name='VA', func=Pin.PWRIN, do_erc=True),
Pin(num='14', name='SCLK', func=Pin.BIDIR, do_erc=True),
Pin(num='24', name='AINR-', do_erc=True),
Pin(num='15', name='SDATA', func=Pin.OUTPUT, do_erc=True),
Pin(num='25', name='AINR+', do_erc=True),
Pin(num='16', name='FSYNC', func=Pin.BIDIR, do_erc=True),
Pin(num='26', name='VCOMR', func=Pin.OUTPUT, do_erc=True),
Pin(num='17', name='CLK', do_erc=True),
Pin(num='27', name='GNDR', func=Pin.OUTPUT, do_erc=True),
Pin(num='18', name='CMODE', do_erc=True),
Pin(num='28', name='VREFR', func=Pin.OUTPUT, do_erc=True),
Pin(num='19', name='HPFE', do_erc=True)
]),
Part(name='DSP96002',dest=TEMPLATE,tool=SKIDL,keywords='DSP 32bit Dual Port Processor',description='32-bit General Purpose Floating-point DSP, Dual Port, PGA-223',ref_prefix='U',num_units=1,fplist=['PGA-223*'],do_erc=True,pins=[
Pin(num='A1',name='B.A23',func=Pin.TRISTATE,do_erc=True),
Pin(num='B1',name='B.A20',func=Pin.TRISTATE,do_erc=True),
Pin(num='C1',name='B.A17',func=Pin.TRISTATE,do_erc=True),
Pin(num='D1',name='B.A15',func=Pin.TRISTATE,do_erc=True),
Pin(num='E1',name='B.A13',func=Pin.TRISTATE,do_erc=True),
Pin(num='F1',name='B.A12',func=Pin.TRISTATE,do_erc=True),
Pin(num='G1',name='B.A9',func=Pin.TRISTATE,do_erc=True),
Pin(num='H1',name='B.A8',func=Pin.TRISTATE,do_erc=True),
Pin(num='J1',name='A.TACK',do_erc=True),
Pin(num='K1',name='B.A4',func=Pin.TRISTATE,do_erc=True),
Pin(num='L1',name='B.A3',func=Pin.TRISTATE,do_erc=True),
Pin(num='M1',name='B.A0',func=Pin.TRISTATE,do_erc=True),
Pin(num='N1',name='B.AENB',do_erc=True),
Pin(num='P1',name='B.R/W',func=Pin.TRISTATE,do_erc=True),
Pin(num='R1',name='B.BUS_STR',func=Pin.OUTPUT,do_erc=True),
Pin(num='T1',name='B.BG',do_erc=True),
Pin(num='U1',name='B.HOSTREQ',func=Pin.OUTPUT,do_erc=True),
Pin(num='V1',name='DSO',func=Pin.OUTPUT,do_erc=True),
Pin(num='A2',name='B.A27',func=Pin.TRISTATE,do_erc=True),
Pin(num='B2',name='B.A25',func=Pin.TRISTATE,do_erc=True),
Pin(num='C2',name='B.A21',func=Pin.TRISTATE,do_erc=True),
Pin(num='D2',name='B.A18',func=Pin.TRISTATE,do_erc=True),
Pin(num='E2',name='B.A16',func=Pin.TRISTATE,do_erc=True),
Pin(num='F2',name='B.A14',func=Pin.TRISTATE,do_erc=True),
Pin(num='G2',name='B.A10',func=Pin.TRISTATE,do_erc=True),
Pin(num='H2',name='CLK',do_erc=True),
Pin(num='J2',name='B.TACK',do_erc=True),
Pin(num='K2',name='B.A5',func=Pin.TRISTATE,do_erc=True),
Pin(num='L2',name='B.A1',func=Pin.TRISTATE,do_erc=True),
Pin(num='M2',name='B.S1',func=Pin.TRISTATE,do_erc=True),
Pin(num='P2',name='B.T_STROBE',func=Pin.TRISTATE,do_erc=True),
Pin(num='R2',name='B.BR',func=Pin.OUTPUT,do_erc=True),
Pin(num='T2',name='B.BA',func=Pin.OPENCOLL,do_erc=True),
Pin(num='U2',name='DSCK/OS1',func=Pin.BIDIR,do_erc=True),
Pin(num='V2',name='DSI/OS0',func=Pin.BIDIR,do_erc=True),
Pin(num='A3',name='B.A29',func=Pin.TRISTATE,do_erc=True),
Pin(num='B3',name='B.A28',func=Pin.TRISTATE,do_erc=True),
Pin(num='C3',name='B.A26',func=Pin.TRISTATE,do_erc=True),
Pin(num='D3',name='B.A24',func=Pin.TRISTATE,do_erc=True),
Pin(num='E3',name='B.A22',func=Pin.TRISTATE,do_erc=True),
Pin(num='F3',name='B.A19',func=Pin.TRISTATE,do_erc=True),
Pin(num='G3',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='H3',name='B.A11',func=Pin.TRISTATE,do_erc=True),
Pin(num='J3',name='B.A7',func=Pin.TRISTATE,do_erc=True),
Pin(num='K3',name='B.A6',func=Pin.TRISTATE,do_erc=True),
Pin(num='L3',name='B.A2',func=Pin.TRISTATE,do_erc=True),
Pin(num='M3',name='B.S0',func=Pin.TRISTATE,do_erc=True),
Pin(num='P3',name='B.BUS_LOCK',func=Pin.OUTPUT,do_erc=True),
Pin(num='R3',name='B.BB',do_erc=True),
Pin(num='T3',name='A.HOSTREQ',func=Pin.OUTPUT,do_erc=True),
Pin(num='V3',name='B.HOSTACK',do_erc=True),
Pin(num='A4',name='B.A31',func=Pin.TRISTATE,do_erc=True),
Pin(num='B4',name='B.A30',func=Pin.TRISTATE,do_erc=True),
Pin(num='C4',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='E4',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='F4',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='G4',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='H4',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='J4',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='K4',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='L4',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='M4',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='N4',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='P4',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='R4',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='T4',name='DEBUGREQ',do_erc=True),
Pin(num='U4',name='A.HOSTACK',do_erc=True),
Pin(num='V4',name='B.HOSTSEL',do_erc=True),
Pin(num='A5',name='MODA/IRQA',do_erc=True),
Pin(num='B5',name='MODB/IRQB',do_erc=True),
Pin(num='C5',name='MODC/IRQC',do_erc=True),
Pin(num='D5',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='R5',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='T5',name='A.HOSTSEL',do_erc=True),
Pin(num='U5',name='B.DENB',do_erc=True),
Pin(num='V5',name='B.D30',func=Pin.TRISTATE,do_erc=True),
Pin(num='A6',name='A.BB',do_erc=True),
Pin(num='B6',name='A.BG',do_erc=True),
Pin(num='C6',name='RESET',do_erc=True),
Pin(num='D6',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='R6',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='T6',name='B.D31',func=Pin.TRISTATE,do_erc=True),
Pin(num='U6',name='B.D29',func=Pin.TRISTATE,do_erc=True),
Pin(num='V6',name='B.D28',func=Pin.TRISTATE,do_erc=True),
Pin(num='A7',name='A.BR',func=Pin.OUTPUT,do_erc=True),
Pin(num='B7',name='A.BA',func=Pin.OPENCOLL,do_erc=True),
Pin(num='C7',name='A.BUS_LOCK',func=Pin.OUTPUT,do_erc=True),
Pin(num='D7',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='R7',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='T7',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='U7',name='B.D27',func=Pin.TRISTATE,do_erc=True),
Pin(num='V7',name='B.D25',func=Pin.TRISTATE,do_erc=True),
Pin(num='B8',name='B.T_TYPE',func=Pin.OUTPUT,do_erc=True),
Pin(num='C8',name='A.T_TYPE',func=Pin.OUTPUT,do_erc=True),
Pin(num='D8',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='R8',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='T8',name='B.D26',func=Pin.TRISTATE,do_erc=True),
Pin(num='U8',name='B.D24',func=Pin.TRISTATE,do_erc=True),
Pin(num='V8',name='B.D23',func=Pin.TRISTATE,do_erc=True),
Pin(num='A9',name='A.R/W',func=Pin.TRISTATE,do_erc=True),
Pin(num='B9',name='A.S1',func=Pin.TRISTATE,do_erc=True),
Pin(num='D9',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='R9',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='T9',name='B.D22',func=Pin.TRISTATE,do_erc=True),
Pin(num='U9',name='B.D21',func=Pin.TRISTATE,do_erc=True),
Pin(num='V9',name='B.D20',func=Pin.TRISTATE,do_erc=True),
Pin(num='A10',name='A.S0',func=Pin.TRISTATE,do_erc=True),
Pin(num='B10',name='A.BUS_STR',func=Pin.OUTPUT,do_erc=True),
Pin(num='C10',name='A.A1',func=Pin.TRISTATE,do_erc=True),
Pin(num='D10',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='R10',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='T10',name='B.D17',func=Pin.TRISTATE,do_erc=True),
Pin(num='U10',name='B.D18',func=Pin.TRISTATE,do_erc=True),
Pin(num='V10',name='B.D19',func=Pin.TRISTATE,do_erc=True),
Pin(num='A11',name='A.T_STROBE',func=Pin.TRISTATE,do_erc=True),
Pin(num='B11',name='A.A0',func=Pin.TRISTATE,do_erc=True),
Pin(num='C11',name='A.A5',func=Pin.TRISTATE,do_erc=True),
Pin(num='D11',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='R11',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='T11',name='B.D14',func=Pin.TRISTATE,do_erc=True),
Pin(num='U11',name='B.D15',func=Pin.TRISTATE,do_erc=True),
Pin(num='V11',name='B.D16',func=Pin.TRISTATE,do_erc=True),
Pin(num='A12',name='A.AENB',do_erc=True),
Pin(num='B12',name='A.A3',func=Pin.TRISTATE,do_erc=True),
Pin(num='C12',name='A.A8',func=Pin.TRISTATE,do_erc=True),
Pin(num='D12',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='R12',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='T12',name='B.D11',func=Pin.TRISTATE,do_erc=True),
Pin(num='U12',name='B.D12',func=Pin.TRISTATE,do_erc=True),
Pin(num='V12',name='B.D13',func=Pin.TRISTATE,do_erc=True),
Pin(num='A13',name='A.A2',func=Pin.TRISTATE,do_erc=True),
Pin(num='B13',name='A.A6',func=Pin.TRISTATE,do_erc=True),
Pin(num='C13',name='A.A12',func=Pin.TRISTATE,do_erc=True),
Pin(num='D13',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='R13',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='T13',name='B.D7',func=Pin.TRISTATE,do_erc=True),
Pin(num='U13',name='B.D9',func=Pin.TRISTATE,do_erc=True),
Pin(num='V13',name='B.D10',func=Pin.TRISTATE,do_erc=True),
Pin(num='A14',name='A.A4',func=Pin.TRISTATE,do_erc=True),
Pin(num='B14',name='A.A9',func=Pin.TRISTATE,do_erc=True),
Pin(num='C14',name='A.A15',func=Pin.TRISTATE,do_erc=True),
Pin(num='D14',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='R14',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='T14',name='B.D4',func=Pin.TRISTATE,do_erc=True),
Pin(num='U14',name='B.D6',func=Pin.TRISTATE,do_erc=True),
Pin(num='V14',name='B.D8',func=Pin.TRISTATE,do_erc=True),
Pin(num='A15',name='A.A7',func=Pin.TRISTATE,do_erc=True),
Pin(num='B15',name='A.A11',func=Pin.TRISTATE,do_erc=True),
Pin(num='C15',name='A.A17',func=Pin.TRISTATE,do_erc=True),
Pin(num='D15',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='E15',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='F15',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='G15',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='H15',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='J15',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='K15',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='L15',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='M15',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='N15',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='P15',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='R15',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='T15',name='B.D1',func=Pin.TRISTATE,do_erc=True),
Pin(num='U15',name='B.D3',func=Pin.TRISTATE,do_erc=True),
Pin(num='V15',name='B.D5',func=Pin.TRISTATE,do_erc=True),
Pin(num='A16',name='A.A10',func=Pin.TRISTATE,do_erc=True),
Pin(num='B16',name='A.A14',func=Pin.TRISTATE,do_erc=True),
Pin(num='C16',name='A.A19',func=Pin.TRISTATE,do_erc=True),
Pin(num='D16',name='A.A22',func=Pin.TRISTATE,do_erc=True),
Pin(num='E16',name='A.A24',func=Pin.TRISTATE,do_erc=True),
Pin(num='F16',name='A.A27',func=Pin.TRISTATE,do_erc=True),
Pin(num='G16',name='A.A31',func=Pin.TRISTATE,do_erc=True),
Pin(num='H16',name='A.D28',func=Pin.TRISTATE,do_erc=True),
Pin(num='J16',name='A.D24',func=Pin.TRISTATE,do_erc=True),
Pin(num='K16',name='A.D20',func=Pin.TRISTATE,do_erc=True),
Pin(num='L16',name='A.D16',func=Pin.TRISTATE,do_erc=True),
Pin(num='M16',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='N16',name='A.D11',func=Pin.TRISTATE,do_erc=True),
Pin(num='P16',name='A.D7',func=Pin.TRISTATE,do_erc=True),
Pin(num='R16',name='A.D5',func=Pin.TRISTATE,do_erc=True),
Pin(num='T16',name='A.D2',func=Pin.TRISTATE,do_erc=True),
Pin(num='U16',name='B.D0',func=Pin.TRISTATE,do_erc=True),
Pin(num='V16',name='B.D2',func=Pin.TRISTATE,do_erc=True),
Pin(num='A17',name='A.A13',func=Pin.TRISTATE,do_erc=True),
Pin(num='B17',name='A.A18',func=Pin.TRISTATE,do_erc=True),
Pin(num='C17',name='A.A21',func=Pin.TRISTATE,do_erc=True),
Pin(num='D17',name='A.A25',func=Pin.TRISTATE,do_erc=True),
Pin(num='E17',name='A.A28',func=Pin.TRISTATE,do_erc=True),
Pin(num='F17',name='A.A30',func=Pin.TRISTATE,do_erc=True),
Pin(num='G17',name='A.D30',func=Pin.TRISTATE,do_erc=True),
Pin(num='H17',name='A.D27',func=Pin.TRISTATE,do_erc=True),
Pin(num='J17',name='A.D25',func=Pin.TRISTATE,do_erc=True),
Pin(num='K17',name='A.D21',func=Pin.TRISTATE,do_erc=True),
Pin(num='L17',name='A.D18',func=Pin.TRISTATE,do_erc=True),
Pin(num='M17',name='A.DENB',do_erc=True),
Pin(num='N17',name='A.D14',func=Pin.TRISTATE,do_erc=True),
Pin(num='P17',name='A.D12',func=Pin.TRISTATE,do_erc=True),
Pin(num='R17',name='A.D9',func=Pin.TRISTATE,do_erc=True),
Pin(num='T17',name='A.D6',func=Pin.TRISTATE,do_erc=True),
Pin(num='U17',name='A.D3',func=Pin.TRISTATE,do_erc=True),
Pin(num='V17',name='A.D0',func=Pin.TRISTATE,do_erc=True),
Pin(num='A18',name='A.A16',func=Pin.TRISTATE,do_erc=True),
Pin(num='B18',name='A.A20',func=Pin.TRISTATE,do_erc=True),
Pin(num='C18',name='A.A23',func=Pin.TRISTATE,do_erc=True),
Pin(num='D18',name='A.A26',func=Pin.TRISTATE,do_erc=True),
Pin(num='E18',name='A.A29',func=Pin.TRISTATE,do_erc=True),
Pin(num='F18',name='A.D31',func=Pin.TRISTATE,do_erc=True),
Pin(num='G18',name='A.D29',func=Pin.TRISTATE,do_erc=True),
Pin(num='H18',name='A.D26',func=Pin.TRISTATE,do_erc=True),
Pin(num='J18',name='A.D23',func=Pin.TRISTATE,do_erc=True),
Pin(num='K18',name='A.D22',func=Pin.TRISTATE,do_erc=True),
Pin(num='L18',name='A.D19',func=Pin.TRISTATE,do_erc=True),
Pin(num='M18',name='A.D17',func=Pin.TRISTATE,do_erc=True),
Pin(num='N18',name='A.D15',func=Pin.TRISTATE,do_erc=True),
Pin(num='P18',name='A.D13',func=Pin.TRISTATE,do_erc=True),
Pin(num='R18',name='A.D10',func=Pin.TRISTATE,do_erc=True),
Pin(num='T18',name='A.D8',func=Pin.TRISTATE,do_erc=True),
Pin(num='U18',name='A.D4',func=Pin.TRISTATE,do_erc=True),
Pin(num='V18',name='A.D1',func=Pin.TRISTATE,do_erc=True)]),
from skidl import SKIDL, TEMPLATE, Part, Pin, SchLib
SKIDL_lib_version = '0.0.1'
Lattice = SchLib(tool=SKIDL).add_parts(*[
Part(name='GAL16V8',dest=TEMPLATE,tool=SKIDL,keywords='GAL PLD 16V8',description='Programmable Logic Array, DIP-20/SOIC-20/PLCC-20',ref_prefix='U',num_units=1,fplist=['DIP*', 'PDIP*', 'SOIC*', 'SO*', 'PLCC*'],do_erc=True,pins=[
Pin(num='10',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='20',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='1',name='I1/CLK',do_erc=True),
Pin(num='2',name='I2',do_erc=True),
Pin(num='3',name='I3',do_erc=True),
Pin(num='4',name='I4',do_erc=True),
Pin(num='5',name='I5',do_erc=True),
Pin(num='6',name='I6',do_erc=True),
Pin(num='7',name='I7',do_erc=True),
Pin(num='8',name='I8',do_erc=True),
Pin(num='9',name='I9',do_erc=True),
Pin(num='11',name='I10/~OE~',do_erc=True),
Pin(num='12',name='IO8',func=Pin.TRISTATE,do_erc=True),
Pin(num='13',name='IO7',func=Pin.TRISTATE,do_erc=True),
Pin(num='14',name='IO6',func=Pin.TRISTATE,do_erc=True),
Pin(num='15',name='IO5',func=Pin.TRISTATE,do_erc=True),
Pin(num='16',name='IO4',func=Pin.TRISTATE,do_erc=True),
Pin(num='17',name='I03',func=Pin.TRISTATE,do_erc=True),
Pin(num='18',name='IO2',func=Pin.TRISTATE,do_erc=True),
Pin(num='19',name='IO1',func=Pin.TRISTATE,do_erc=True)]),
Part(name='PAL16L8',dest=TEMPLATE,tool=SKIDL,keywords='PAL PLD 16L8',description='Programmable Logic Array, DIP-20',ref_prefix='U',num_units=1,fplist=['DIP*', 'PDIP*'],do_erc=True,pins=[
Pin(num='10',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='20',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='1',name='I1',do_erc=True),
Pin(num='2',name='I2',do_erc=True),
from skidl import Pin, Part, SchLib, SKIDL, TEMPLATE
SKIDL_lib_version = '0.0.1'
motors = SchLib(tool=SKIDL).add_parts(*[
Part(name='Fan',
dest=TEMPLATE,
tool=SKIDL,
keywords='Fan Motor',
description='Fan',
ref_prefix='M',
num_units=1,
fplist=[
'Pin_Headers:Pin_Header_Straight_1x02', 'Connect:bornier2',
'TerminalBlock*2pol'
],
do_erc=True,
pins=[
Pin(num='1', name='+', func=Pin.PASSIVE, do_erc=True),
Pin(num='2', name='-', func=Pin.PASSIVE, do_erc=True)
]),
Part(name='Fan_ALT',
dest=TEMPLATE,
tool=SKIDL,
keywords='Fan Motor',
description='Fan without PWM or tach, alternative symbol',
ref_prefix='M',
num_units=1,
fplist=[
'Pin_Headers:Pin_Header_Straight_1x02', 'Connect:bornier2',
'TerminalBlock*2pol'
from skidl import SKIDL, TEMPLATE, Part, Pin, SchLib
SKIDL_lib_version = '0.0.1'
cmos_ieee = SchLib(tool=SKIDL).add_parts(*[
Part(name='4001', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4002', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4006', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4008', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4009', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4010', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='40104', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(
name='40106', dest=TEMPLATE, tool=SKIDL, do_erc=True, aliases=['4584'
]),
Part(name='4011', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='40110', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4012', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4013', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4014', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4015', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4016', dest=TEMPLATE, tool=SKIDL, do_erc=True, aliases=['4066'
]),
Part(name='4017', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='40174', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='40175', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4018', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='4019', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='40192', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='40193', dest=TEMPLATE, tool=SKIDL, do_erc=True),
Part(name='40194', dest=TEMPLATE, tool=SKIDL, do_erc=True),
SKIDL_lib_version = '0.0.1'
powerint = SchLib(tool=SKIDL).add_parts(*[
Part(name='CAP002DG',
dest=TEMPLATE,
tool=SKIDL,
keywords='CapZero Automatic Capacitor Discarger 1000V 5000nF',
description=
'CapZero Automatic Capacitor Discarger, Vdss 1000V, Cmax 5000nF, SO8',
ref_prefix='U',
num_units=1,
fplist=['SO-8*'],
do_erc=True,
aliases=[
'CAP003DG', 'CAP004DG', 'CAP005DG', 'CAP006DG', 'CAP007DG',
'CAP008DG', 'CAP009DG', 'CAP012DG', 'CAP013DG', 'CAP014DG',
'CAP015DG', 'CAP016DG', 'CAP017DG', 'CAP018DG', 'CAP019DG'
],
pins=[
Pin(num='1', name='~', func=Pin.PASSIVE, do_erc=True),
Pin(num='2', name='~', func=Pin.PASSIVE, do_erc=True),
Pin(num='3', name='~', func=Pin.PASSIVE, do_erc=True),
Pin(num='4', name='~', func=Pin.PASSIVE, do_erc=True),
Pin(num='5', name='~', func=Pin.PASSIVE, do_erc=True),
Pin(num='6', name='~', func=Pin.PASSIVE, do_erc=True),
Pin(num='7', name='~', func=Pin.PASSIVE, do_erc=True),
Pin(num='8', name='~', func=Pin.PASSIVE, do_erc=True)
]),
Part(name='LNK302D',
dest=TEMPLATE,
tool=SKIDL,
from skidl import SKIDL, TEMPLATE, Part, Pin, SchLib
SKIDL_lib_version = '0.0.1'
diode = SchLib(tool=SKIDL).add_parts(*[
Part(name='1N4001',
dest=TEMPLATE,
tool=SKIDL,
keywords='diode',
description='1000V 1A Fast recovery Rectifier Diode, DO-41',
ref_prefix='D',
num_units=1,
fplist=['D*DO?41*', 'D*DO?204AL*', 'D*SOD81*'],
do_erc=True,
aliases=[
'1N4002', '1N4003', '1N4004', '1N4005', '1N4006', '1N4007',
'BA157', 'BA158', 'BA159'
],
pins=[
Pin(num='1', name='K', func=Pin.PASSIVE, do_erc=True),
Pin(num='2', name='A', func=Pin.PASSIVE, do_erc=True)
]),
Part(name='1N4148',
dest=TEMPLATE,
tool=SKIDL,
keywords='diode',
description='20V 0.115A Very Fast Switching Diode, DO-35',
ref_prefix='D',
num_units=1,
fplist=['D*DO?35*', 'D*SOD27*'],
do_erc=True,
from skidl import Pin, Part, SchLib, SKIDL, TEMPLATE
SKIDL_lib_version = '0.0.1'
zetex = SchLib(tool=SKIDL).add_parts(*[
Part(name='ZXGD3001E6',
dest=TEMPLATE,
tool=SKIDL,
keywords='gate driver',
description='8A (peak) Gate driver, 40V, 1ns delay',
ref_prefix='U',
num_units=1,
fplist=['SOT?23-*'],
do_erc=True,
aliases=['ZXGD3004E6', 'ZXGD3002E6', 'ZXGD3003E6'],
pins=[
Pin(num='1', name='VCC', func=Pin.PWRIN, do_erc=True),
Pin(num='2', name='IN1', do_erc=True),
Pin(num='3', name='GND', func=Pin.PWRIN, do_erc=True),
Pin(num='4', name='SINK', func=Pin.OPENCOLL, do_erc=True),
Pin(num='5', name='IN2', do_erc=True),
Pin(num='6', name='SOURCE', func=Pin.OPENEMIT, do_erc=True)
])
])
def generate_power_led():
"""Generate led connected to ESP GPI0 that is on after boot"""
led = Part('Device', 'LED', footprint='LED_SMD:LED_1206_3216Metric')
U1['GPIO0'] & (R('1k') & led & Net.fetch('+VBatt'))
from skidl import Pin, Part, SchLib, SKIDL, TEMPLATE
SKIDL_lib_version = '0.0.1'
Power_Management = SchLib(tool=SKIDL).add_parts(*[
Part(name='FAN7842',
dest=TEMPLATE,
tool=SKIDL,
keywords='gate driver',
description='High and Low Side Gate Driver',
ref_prefix='U',
num_units=1,
fplist=['SOIC*3.9x4.9mm*Pitch1.27mm*'],
do_erc=True,
pins=[
Pin(num='1', name='VCC', func=Pin.PWRIN, do_erc=True),
Pin(num='2', name='HIN', do_erc=True),
Pin(num='3', name='LIN', do_erc=True),
Pin(num='4', name='COM', func=Pin.PWRIN, do_erc=True),
Pin(num='5', name='LO', func=Pin.OUTPUT, do_erc=True),
Pin(num='6', name='VS', func=Pin.OUTPUT, do_erc=True),
Pin(num='7', name='HO', func=Pin.OUTPUT, do_erc=True),
Pin(num='8', name='VB', func=Pin.PWRIN, do_erc=True)
]),
Part(name='LM5051',
dest=TEMPLATE,
tool=SKIDL,
keywords='negative low-side or-ing ideal-diode',
description='Low side OR-ing FET controller, -6V to -100V operation',
ref_prefix='U',
num_units=1,
from skidl import SKIDL, TEMPLATE, Part, Pin, SchLib
SKIDL_lib_version = '0.0.1'
microchip_pic12mcu = SchLib(tool=SKIDL).add_parts(*[
Part(name='PIC12(L)F1501-I/P',dest=TEMPLATE,tool=SKIDL,do_erc=True,aliases=['PIC12(L)F1501-I/SN', 'PIC12(L)F1501-I/MS', 'PIC12(L)F1501-I/MC']),
Part(name='PIC12(L)F1822-I/P',dest=TEMPLATE,tool=SKIDL,do_erc=True,aliases=['PIC12(L)F1822-I/SN', 'PIC12(L)F1822-I/MC']),
Part(name='PIC12(L)F1840-I/P',dest=TEMPLATE,tool=SKIDL,do_erc=True,aliases=['PIC12(L)F1840-I/SN', 'PIC12(L)F1840-I/MC']),
Part(name='PIC12C508-I/P',dest=TEMPLATE,tool=SKIDL,keywords='8-Bit CMOS Microcontroller',description='PIC12C508, 512W EPROM, 25B SRAM, SO8 Wide',ref_prefix='U',num_units=1,do_erc=True,aliases=['PIC12C508-I/SM', 'PIC12C508-I/JW'],pins=[
Pin(num='1',name='VDD',func=Pin.PWRIN,do_erc=True),
Pin(num='2',name='CLKIN/OSC1/GP5',func=Pin.BIDIR,do_erc=True),
Pin(num='3',name='OSC2/GP4',func=Pin.BIDIR,do_erc=True),
Pin(num='4',name='Vpp/~MCLR~/GP3',do_erc=True),
Pin(num='5',name='T0CKI/GP2',func=Pin.BIDIR,do_erc=True),
Pin(num='6',name='ICSPCLK/GP1',func=Pin.BIDIR,do_erc=True),
Pin(num='7',name='ICSPDAT/GP0',func=Pin.BIDIR,do_erc=True),
Pin(num='8',name='VSS',func=Pin.PWRIN,do_erc=True)]),
Part(name='PIC12C508A-I/P',dest=TEMPLATE,tool=SKIDL,keywords='8-Bit CMOS Microcontroller',description='PIC12C508A, 512W EPROM, 25B SRAM, SO8',ref_prefix='U',num_units=1,do_erc=True,aliases=['PIC12C508A-I/SN', 'PIC12C508A-I/SM', 'PIC12C508A-I/JW'],pins=[
Pin(num='1',name='VDD',func=Pin.PWRIN,do_erc=True),
Pin(num='2',name='CLKIN/OSC1/GP5',func=Pin.BIDIR,do_erc=True),
Pin(num='3',name='OSC2/GP4',func=Pin.BIDIR,do_erc=True),
Pin(num='4',name='Vpp/~MCLR~/GP3',do_erc=True),
Pin(num='5',name='T0CKI/GP2',func=Pin.BIDIR,do_erc=True),
Pin(num='6',name='ICSPCLK/GP1',func=Pin.BIDIR,do_erc=True),
Pin(num='7',name='ICSPDAT/GP0',func=Pin.BIDIR,do_erc=True),
Pin(num='8',name='VSS',func=Pin.PWRIN,do_erc=True)]),
Part(name='PIC12C509-I/P',dest=TEMPLATE,tool=SKIDL,keywords='8-Bit CMOS Microcontroller',description='PIC12C509, 1024W EPROM, 41B SRAM, SO8 Wide',ref_prefix='U',num_units=1,do_erc=True,aliases=['PIC12C509-I/SM', 'PIC12C509-I/JW'],pins=[
Pin(num='1',name='VDD',func=Pin.PWRIN,do_erc=True),
Pin(num='2',name='CLKIN/OSC1/GP5',func=Pin.BIDIR,do_erc=True),
Pin(num='3',name='OSC2/GP4',func=Pin.BIDIR,do_erc=True),
Pin(num='4',name='Vpp/~MCLR~/GP3',do_erc=True),
