def test_register():
parent_reg = RegsRegister(TEST_REG_NAME, TEST_REG_OFFSET, TEST_REG_WIDTH,
TEST_REG_DESCR, TEST_REG_REV, TEST_REG_ACCESS)
bitfield = RegsBitField(parent_reg, TEST_BITFIELD_NAME,
TEST_BITFILED_OFFSET, TEST_BITFILED_WIDTH,
TEST_BITFIELD_DESCR, TEST_BITFIELD_RESET_VAL,
TEST_BITFIELD_ACCESS)
enum = RegsEnum(TEST_ENUM_NAME, 0, TEST_ENUM_DESCR)
bitfield.add_enum(enum)
parent_reg.add_bitfield(bitfield)
printed_str = str(parent_reg)
assert "Name:" in printed_str
assert TEST_REG_NAME in printed_str
assert TEST_REG_DESCR in printed_str
assert "Width:" in printed_str
assert "Access:" in printed_str
assert "Bitfield" in printed_str
assert TEST_BITFIELD_NAME in printed_str
assert TEST_BITFIELD_DESCR in printed_str
assert TEST_ENUM_NAME in printed_str
assert TEST_ENUM_DESCR in printed_str
def test_bitfield_enums_invalid_name():
"""Test bitfield enums with invalid enum name."""
parent_reg = RegsRegister(
TEST_REG_NAME,
TEST_REG_OFFSET,
TEST_REG_WIDTH,
TEST_REG_DESCR,
TEST_REG_REV,
TEST_REG_ACCESS,
)
bitfield = RegsBitField(
parent_reg,
TEST_BITFIELD_NAME,
TEST_BITFIELD_OFFSET,
TEST_BITFIELD_WIDTH,
TEST_BITFIELD_DESCR,
TEST_BITFIELD_RESET_VAL,
TEST_BITFIELD_ACCESS,
)
parent_reg.add_bitfield(bitfield)
bitfield.add_enum(
RegsEnum(f"{TEST_ENUM_NAME}", 0, f"{TEST_ENUM_DESCR}",
TEST_BITFIELD_WIDTH))
with pytest.raises(SPSDKError):
bitfield.set_enum_value(f"Invalid Enum name")
def test_bitfield_has_enums():
"""Test bitfield has enums function."""
parent_reg = RegsRegister(
TEST_REG_NAME,
TEST_REG_OFFSET,
TEST_REG_WIDTH,
TEST_REG_DESCR,
TEST_REG_REV,
TEST_REG_ACCESS,
)
bitfield = RegsBitField(
parent_reg,
TEST_BITFIELD_NAME,
TEST_BITFIELD_OFFSET,
TEST_BITFIELD_WIDTH,
TEST_BITFIELD_DESCR,
TEST_BITFIELD_RESET_VAL,
TEST_BITFIELD_ACCESS,
)
parent_reg.add_bitfield(bitfield)
assert bitfield.has_enums() is False
enum = RegsEnum(TEST_ENUM_NAME, 0, TEST_ENUM_DESCR)
bitfield.add_enum(enum)
assert bitfield.has_enums() is True
assert enum in bitfield.get_enums()
def test_bitfield_find():
"""Test bitfield find function."""
parent_reg = RegsRegister(
TEST_REG_NAME,
TEST_REG_OFFSET,
TEST_REG_WIDTH,
TEST_REG_DESCR,
TEST_REG_REV,
TEST_REG_ACCESS,
)
bitfield = RegsBitField(
parent_reg,
TEST_BITFIELD_NAME,
TEST_BITFIELD_OFFSET,
TEST_BITFIELD_WIDTH,
TEST_BITFIELD_DESCR,
TEST_BITFIELD_RESET_VAL,
TEST_BITFIELD_ACCESS,
)
enum = RegsEnum(TEST_ENUM_NAME, 0, TEST_ENUM_DESCR)
bitfield.add_enum(enum)
parent_reg.add_bitfield(bitfield)
assert bitfield == parent_reg.find_bitfield(TEST_BITFIELD_NAME)
with pytest.raises(SPSDKRegsErrorBitfieldNotFound):
parent_reg.find_bitfield("Invalid Name")
def test_bitfield():
"""Basic bitfield test."""
parent_reg = RegsRegister(
TEST_REG_NAME,
TEST_REG_OFFSET,
TEST_REG_WIDTH,
TEST_REG_DESCR,
TEST_REG_REV,
TEST_REG_ACCESS,
)
bitfield = RegsBitField(
parent_reg,
TEST_BITFIELD_NAME,
TEST_BITFIELD_OFFSET,
TEST_BITFIELD_WIDTH,
TEST_BITFIELD_DESCR,
TEST_BITFIELD_RESET_VAL,
TEST_BITFIELD_ACCESS,
)
enum = RegsEnum(TEST_ENUM_NAME, 0, TEST_ENUM_DESCR)
bitfield.add_enum(enum)
parent_reg.add_bitfield(bitfield)
printed_str = str(bitfield)
assert "Name:" in printed_str
assert "Offset:" in printed_str
assert "Width:" in printed_str
assert "Access:" in printed_str
assert "Reset val:" in printed_str
assert "Description:" in printed_str
assert "Enum" in printed_str
def _get_registers(self) -> None:
# Start line in excel style 2 is 3!
reg_base = 0
try:
for r in range(3, self.ws.max_row + 1):
new_reg_base = self._get_regbase(r)
if new_reg_base == -1:
break
if new_reg_base != reg_base:
# This is new register, just create it
reg_base = new_reg_base
reg_name = f"REG_0x{reg_base:04X}"
reg_offset = 0x400 - reg_base
reg_width = 32 # TODO solve that fields
reg_dscr = f"This is description string of {reg_name} register"
reg_reverse = False
reg_access = "RW"
reg = RegsRegister(reg_name, reg_offset, reg_width, reg_dscr, reg_reverse, reg_access)
self.registers.add_register(reg)
# we have added register, so this is about a adding of bitfield
bitfield_name = self._get_fusename(r)
bitfield_offset, bitfield_width = self._get_fuse_bitfield_info(r)
bitfield_descr = self._get_fusedescription(r)
bitfield_rv = self._get_fuse_resetvalue(r)
bitf = RegsBitField(reg,
bitfield_name,
bitfield_offset,
bitfield_width,
bitfield_descr,
reset_val=bitfield_rv)
reg.add_bitfield(bitf)
except Exception as exc:
print(f"Unwanted exception during getting registers({str(exc)})")
def test_bitfield_enums():
"""Test bitfield enums."""
parent_reg = RegsRegister(
TEST_REG_NAME,
TEST_REG_OFFSET,
TEST_REG_WIDTH,
TEST_REG_DESCR,
TEST_REG_REV,
TEST_REG_ACCESS,
)
bitfield = RegsBitField(
parent_reg,
TEST_BITFIELD_NAME,
TEST_BITFIELD_OFFSET,
TEST_BITFIELD_WIDTH,
TEST_BITFIELD_DESCR,
TEST_BITFIELD_RESET_VAL,
TEST_BITFIELD_ACCESS,
)
parent_reg.add_bitfield(bitfield)
enums = []
for index in range((1 << TEST_BITFIELD_WIDTH) - 1):
enum = RegsEnum(f"{TEST_ENUM_NAME}{index}", index,
f"{TEST_ENUM_DESCR}{index}", TEST_BITFIELD_WIDTH)
enums.append(enum)
bitfield.add_enum(enum)
enum_names = bitfield.get_enum_names()
for index in range((1 << TEST_BITFIELD_WIDTH) - 1):
assert index == bitfield.get_enum_constant(f"{TEST_ENUM_NAME}{index}")
assert enums[index].name in enum_names
for index in range((1 << TEST_BITFIELD_WIDTH)):
bitfield.set_value(index)
if index < (1 << TEST_BITFIELD_WIDTH) - 1:
assert f"{TEST_ENUM_NAME}{index}" == bitfield.get_enum_value()
else:
assert index == bitfield.get_enum_value()
for index in range((1 << TEST_BITFIELD_WIDTH) - 1):
bitfield.set_enum_value(f"{TEST_ENUM_NAME}{index}")
assert index == bitfield.get_value()
for index in range((1 << TEST_BITFIELD_WIDTH) - 1):
bitfield.set_enum_value(f"{index}")
assert index == bitfield.get_value()
with pytest.raises(SPSDKRegsErrorEnumNotFound):
bitfield.get_enum_constant("Invalid name")
def create_simple_regs():
"""Create siple reg structure with basic cases."""
regs = Registers(TEST_DEVICE_NAME)
reg1 = RegsRegister(
TEST_REG_NAME,
TEST_REG_OFFSET,
TEST_REG_WIDTH,
TEST_REG_DESCR,
TEST_REG_REV,
TEST_REG_ACCESS,
)
reg2 = RegsRegister(
TEST_REG_NAME + "_2",
TEST_REG_OFFSET + 4,
TEST_REG_WIDTH,
TEST_REG_DESCR + "_2",
TEST_REG_REV,
TEST_REG_ACCESS,
)
bitfield1 = RegsBitField(
reg2,
TEST_BITFIELD_NAME,
TEST_BITFIELD_OFFSET,
TEST_BITFIELD_WIDTH,
TEST_BITFIELD_DESCR,
TEST_BITFIELD_RESET_VAL,
TEST_BITFIELD_ACCESS,
)
bitfield2 = RegsBitField(
reg2,
TEST_BITFIELD_NAME + "_2",
TEST_BITFIELD_OFFSET + TEST_BITFIELD_WIDTH,
1,
".",
0,
TEST_BITFIELD_ACCESS,
)
enum1 = RegsEnum(TEST_ENUM_NAME, 0, TEST_ENUM_DESCR, 1)
enum2 = RegsEnum(TEST_ENUM_NAME + "_2", 0, TEST_ENUM_DESCR + "_2", 1)
bitfield2.add_enum(enum1)
bitfield2.add_enum(enum2)
reg2.add_bitfield(bitfield1)
reg2.add_bitfield(bitfield2)
regs.add_register(reg1)
regs.add_register(reg2)
return regs
def test_bitfields_names():
"""Test bitfield get names function."""
parent_reg = RegsRegister(
TEST_REG_NAME,
TEST_REG_OFFSET,
TEST_REG_WIDTH,
TEST_REG_DESCR,
TEST_REG_REV,
TEST_REG_ACCESS,
)
bitfield = RegsBitField(
parent_reg,
TEST_BITFIELD_NAME,
TEST_BITFIELD_OFFSET,
TEST_BITFIELD_WIDTH,
TEST_BITFIELD_DESCR,
TEST_BITFIELD_RESET_VAL,
TEST_BITFIELD_ACCESS,
)
bitfield1 = RegsBitField(
parent_reg,
TEST_BITFIELD_NAME + "1",
TEST_BITFIELD_OFFSET,
TEST_BITFIELD_WIDTH,
TEST_BITFIELD_DESCR,
TEST_BITFIELD_RESET_VAL,
TEST_BITFIELD_ACCESS,
)
assert parent_reg.get_bitfield_names() == []
parent_reg.add_bitfield(bitfield)
parent_reg.add_bitfield(bitfield1)
assert len(parent_reg.get_bitfield_names()) == 2
names = parent_reg.get_bitfield_names()
assert len(names) == 2
assert TEST_BITFIELD_NAME in names
assert TEST_BITFIELD_NAME + "1" in names
ex_names = parent_reg.get_bitfield_names([TEST_BITFIELD_NAME + "1"])
assert len(ex_names) == 1
assert TEST_BITFIELD_NAME in ex_names
ex_names1 = parent_reg.get_bitfield_names([TEST_BITFIELD_NAME])
assert len(ex_names1) == 0
def test_bitfield_enums():
parent_reg = RegsRegister(TEST_REG_NAME, TEST_REG_OFFSET, TEST_REG_WIDTH,
TEST_REG_DESCR, TEST_REG_REV, TEST_REG_ACCESS)
bitfield = RegsBitField(parent_reg, TEST_BITFIELD_NAME,
TEST_BITFILED_OFFSET, TEST_BITFILED_WIDTH,
TEST_BITFIELD_DESCR, TEST_BITFIELD_RESET_VAL,
TEST_BITFIELD_ACCESS)
parent_reg.add_bitfield(bitfield)
enums = []
for n in range((1 << TEST_BITFILED_WIDTH) - 1):
enum = RegsEnum(f"{TEST_ENUM_NAME}{n}", n, f"{TEST_ENUM_DESCR}{n}",
TEST_BITFILED_WIDTH)
enums.append(enum)
bitfield.add_enum(enum)
enum_names = bitfield.get_enum_names()
for n in range((1 << TEST_BITFILED_WIDTH) - 1):
assert n == bitfield.get_enum_constant(f"{TEST_ENUM_NAME}{n}")
assert enums[n].name in enum_names
for n in range((1 << TEST_BITFILED_WIDTH)):
bitfield.set_value(n)
if n < (1 << TEST_BITFILED_WIDTH) - 1:
assert f"{TEST_ENUM_NAME}{n}" == bitfield.get_enum_value()
else:
assert n == bitfield.get_enum_value()
for n in range((1 << TEST_BITFILED_WIDTH) - 1):
bitfield.set_enum_value(f"{TEST_ENUM_NAME}{n}")
assert n == bitfield.get_value()
with pytest.raises(EnumNotFound):
bitfield.get_enum_constant("Invalid name")
regs = Registers(TEST_DEVICE_NAME)
regs.add_register(parent_reg)
def _get_registers(self) -> None:
"""Return all registers from XLS file."""
assert self.worksheet
# Start line in excel style 2 is 3!
reg_base = 0
try:
for row in range(3, self.worksheet.max_row + 1):
new_reg_base = self._get_regbase(row)
if new_reg_base != reg_base:
# This is new register, just create it
reg_base = new_reg_base
reg_name = f"REG_0x{reg_base:04X}"
reg_offset = 0x400 - reg_base
reg_width = 32 # TODO solve that fields
reg_description = f"This is description string of {reg_name} register"
reg_reverse = False
reg_access = "RW"
reg = RegsRegister(reg_name, reg_offset, reg_width,
reg_description, reg_reverse,
reg_access)
self.registers.add_register(reg)
# we have added register, so this is about a adding of bitfield
bitfield_name = self._get_fusename(row)
bitfield_offset, bitfield_width = self._get_fuse_bitfield_info(
row)
bitfield_descr = self._get_fusedescription(row)
bitfield_rv = self._get_fuse_resetvalue(row)
bitfield = RegsBitField(
reg,
bitfield_name,
bitfield_offset,
bitfield_width,
bitfield_descr,
reset_val=bitfield_rv,
)
reg.add_bitfield(bitfield)
except Exception as exc: # pylint: disable=broad-except
click.echo(
f"Unwanted exception during getting registers({str(exc)})")
