def check_gpe_config():
pwrmBase = get_pwrm_base()
print('pwrmBase: %x' % (pwrmBase))
hw = TSSAbaseaccess.hwapi.HWAPI()
ba = TSSAbaseaccess.baseaccess()
gpio_cfg = ba.mem(pwrmBase + R_PCH_PWRM_GPIO_CFG)
print('-' * 75)
print('GPIO_CFG: %x' %(gpio_cfg))
# decoding gpio_cfg
gpe_dw0 = gpio_cfg & 0x07
gpe_dw1 = (gpio_cfg >> 4) & 0x07
gpe_dw2 = (gpio_cfg >> 8) & 0x07
print('gpe_dw0: %x(%c) gpe_dw1: %x(%c) gpe_dw2: %x(%c)' % (gpe_dw0, chr(ord('A')+gpe_dw0), gpe_dw1, chr(ord('A')+gpe_dw1), gpe_dw2, chr(ord('A')+gpe_dw2)))
print('-' * 75)
grpInfo = GetGpioGroupInfo()
grpIdx = 0
for grp in grpInfo:
portId = grp.Community
misccfg_pcr_base = get_pcr_reg(portId, R_PCH_PCR_GPIO_MISCCFG)
misccfg = ba.mem(misccfg_pcr_base)
print('misccfg_%c: %x @ %x' % (chr(ord('A')+grpIdx), misccfg, misccfg_pcr_base))
gpe_dw0 = (misccfg >> 8) & 0x07
gpe_dw1 = (misccfg >> 12) & 0x07
gpe_dw2 = (misccfg >> 16) & 0x07
print('gpe_dw0: %x(%c) gpe_dw1: %x(%c) gpe_dw2: %x(%c)' % (gpe_dw0, chr(ord('A')+gpe_dw0), gpe_dw1, chr(ord('A')+gpe_dw1), gpe_dw2, chr(ord('A')+gpe_dw2)))
grpIdx += 1
print('-' * 75)
def get_pwrm_base():
# PWRM base = PMC_BASE config space + 48h
hw = TSSAbaseaccess.hwapi.HWAPI()
ba = TSSAbaseaccess.baseaccess()
pwrm_base = ba.pcicfg(DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_PMC, PCI_FUNCTION_NUMBER_PCH_PMC, R_PCH_PMC_PWRM_BASE)
del hw
del ba
return pwrm_base
def test2 ():
## res = acpitablelib.get_acpi_table('DSDT')
## print('%r' % res)
hw = TSSAbaseaccess.hwapi.HWAPI()
## hw.HWAPIInitialize()
ba = TSSAbaseaccess.baseaccess()
data32 = ba.pcicfg(0,0,0,0)
print('data32: %x' % data32)
def check_gpio_status ():
hw = TSSAbaseaccess.hwapi.HWAPI()
ba = TSSAbaseaccess.baseaccess()
grpInfo = GetGpioGroupInfo()
gpi_status_res = []
gpe_status_res = []
grpIdx = 0;
for grp in grpInfo:
portId = grp.Community
gpiIsOffset_pcr_base = get_pcr_reg(portId, grp.GpiIsOffset)
gpiGpeStsOffset_pcr_base = get_pcr_reg(portId, grp.GpiGpeStsOffset)
for num in range(0, int(ceil(float(grp.PadPerGroup)/32))):
addr_gpi_sts = gpiIsOffset_pcr_base + num * 4
gpi_sts = ba.mem(addr_gpi_sts)
gpi_status_res += list(readBitGroup(gpi_sts, 1, grp.PadPerGroup))
addr_gpe_sts = gpiGpeStsOffset_pcr_base + num * 4
gpe_sts = ba.mem(addr_gpe_sts)
gpe_status_res += list(readBitGroup(gpe_sts, 1, grp.PadPerGroup))
print('%s gpi_status: %x @%x' % (get_grp_name(grpIdx), gpi_sts, addr_gpi_sts))
print('%s gpe_status: %x @%x' % (get_grp_name(grpIdx), gpe_sts, addr_gpe_sts))
grpIdx += 1
def check_gpio_config():
hw = TSSAbaseaccess.hwapi.HWAPI()
ba = TSSAbaseaccess.baseaccess()
grpInfo = GetGpioGroupInfo()
grpIdx = 0;
settingResult = []
for grp in grpInfo:
portId = grp.Community
padOwnerResult = []
padHostSwOwnerResult = []
gpiIeResult = []
gpeEnResult = []
smiEnResult = []
nmiEnResult = []
# gpio ownership (HOST / ME / ISH )
padOwner_pcr_base = get_pcr_reg(portId, grp.PadOwnOffset)
for num in range(0, int(ceil(float(grp.PadPerGroup)/8))):
addr = padOwner_pcr_base + num * 4
val = ba.mem(addr)
print('padowner_%c_%02d : %x @ %x' % (chr(ord('A')+grpIdx), num, val, addr))
padOwnerResult += list(readBitGroup(val, 4, 8))
print ('padOwnerResult: %r' % (padOwnerResult))
# gpio host sw ownership (ACPI / GPIO)
padHostSwOwner_pcr_base = get_pcr_reg(portId, grp.HostOwnOffset)
for num in range(0, int(ceil(float(grp.PadPerGroup)/32))):
addr = padHostSwOwner_pcr_base + num * 4
val = ba.mem(addr)
print('padHostSwOwner_%c_%02d : %x @ %x' % (chr(ord('A')+grpIdx), num, val, addr))
padHostSwOwnerResult += list(readBitGroup(val, 1, grp.PadPerGroup))
print ('padHostSwOwnerResult: %r' % (padHostSwOwnerResult))
# GPI interrupt enable
gpi_ie_pcr_base = get_pcr_reg(portId, grp.GpiIeOffset)
for num in range(0, int(ceil(float(grp.PadPerGroup)/32))):
addr = gpi_ie_pcr_base + num * 4
val = ba.mem(addr)
print('gpi_ie_%c_%02d : %x @ %x' % (chr(ord('A')+grpIdx), num, val, addr))
gpiIeResult += list(readBitGroup(val, 1, grp.PadPerGroup))
# GPE interrupt enable
gpe_en_pcr_base = get_pcr_reg(portId, grp.GpiGpeEnOffset)
for num in range(0, int(ceil(float(grp.PadPerGroup)/32))):
addr = gpe_en_pcr_base + num * 4
print('gpe_en_%c_%02d : %x @ %x' % (chr(ord('A')+grpIdx), num, 0, addr))
gpeEnResult += list(readBitGroup(val, 1, grp.PadPerGroup))
# SMI interrupt enable
smi_en_pcr_base = get_pcr_reg(portId, grp.SmiEnOffset)
for num in range(0, int(ceil(float(grp.PadPerGroup)/32))):
addr = smi_en_pcr_base + num * 4
val = ba.mem(addr)
print('smi_en_%c_%02d : %x @ %x' % (chr(ord('A')+grpIdx), num, val, addr))
smiEnResult += list(readBitGroup(val, 1, grp.PadPerGroup))
# NMI interrupt enable
nmi_en_pcr_base = get_pcr_reg(portId, grp.NmiEnOffset)
for num in range(0, int(ceil(float(grp.PadPerGroup)/32))):
addr = nmi_en_pcr_base + num * 4;
val = ba.mem(addr)
print('nmi_en_%c_%02d : %x @ %x' % (chr(ord('A')+grpIdx), num, val, addr))
nmiEnResult += list(readBitGroup(val, 1, grp.PadPerGroup))
# pad config dw0/dw1
padcfg_pcr_base = get_pcr_reg(portId, grp.PadCfgOffset)
for gpioNum in range(0, grp.PadPerGroup):
addr = padcfg_pcr_base + gpioNum * 8
padName = get_pad_name(grpIdx, gpioNum)
dw0 = ba.mem(addr)
print('padcfg_dw0_%s : %x @ %x' % (padName, dw0, addr))
addr = padcfg_pcr_base + gpioNum * 8 + 4
dw1 = ba.mem(addr)
print('padcfg_dw1_%s : %x @ %x' % (padName, dw1, addr))
res = decode_gpio_setting(padName, gpioNum, padHostSwOwnerResult, padOwnerResult, gpiIeResult, gpeEnResult, smiEnResult, nmiEnResult, dw0, dw1)
settingResult.append(padName)
settingResult.append(',{')
settingResult.append(res)
settingResult.append('}\n')
grpIdx += 1
print('-'*75)
res = ''.join(settingResult)
for line in res.split('\n'):
print(line)
from ssa.bios import acpitablelib
from ssa import BasicStructs
from ssa import hwapi
from ssa import TSSAbaseaccess
from ssa import cpuid
from gpio import *
from modphy import *
from math import ceil
hw = TSSAbaseaccess.hwapi.HWAPI()
ba = TSSAbaseaccess.baseaccess()
def test2 ():
## res = acpitablelib.get_acpi_table('DSDT')
## print('%r' % res)
hw = TSSAbaseaccess.hwapi.HWAPI()
## hw.HWAPIInitialize()
ba = TSSAbaseaccess.baseaccess()
data32 = ba.pcicfg(0,0,0,0)
print('data32: %x' % data32)
def get_pwrm_base():
# PWRM base = PMC_BASE config space + 48h
hw = TSSAbaseaccess.hwapi.HWAPI()
ba = TSSAbaseaccess.baseaccess()
pwrm_base = ba.pcicfg(DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_PMC, PCI_FUNCTION_NUMBER_PCH_PMC, R_PCH_PMC_PWRM_BASE)
del hw
del ba
return pwrm_base
def get_pcr_reg(portId, offset):
