def __init__(
self,
*,
code_area_size=DEFAULT_CODE_AREA_SIZE,
data_area_size=DEFAULT_DATA_AREA_SIZE,
):
self.code_area_size = code_area_size
self.data_area_size = data_area_size
total_size = self.code_area_size + self.data_area_size
self.code_area_base = 0
self.data_area_base = self.code_area_base + self.code_area_size
self.code_pos = self.code_area_base
self.data_pos = self.data_area_base
self.drm = None
self.memory = None
self.bo_handles = None
try:
self.drm = DRM_V3D()
self.memory = Memory(self.drm, total_size)
self.bo_handles = np.array([self.memory.handle], dtype=np.uint32)
except Exception as e:
self.close()
raise e
def test_get_param():
print()
with DRM_V3D() as drm:
uifcfg = drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_UIFCFG)
hub_ident1 = drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_HUB_IDENT1)
hub_ident2 = drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_HUB_IDENT2)
hub_ident3 = drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_HUB_IDENT3)
core0_ident0 = drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_CORE0_IDENT0)
core0_ident1 = drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_CORE0_IDENT1)
core0_ident2 = drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_CORE0_IDENT2)
supports_tfu = drm.v3d_get_param(DRM_V3D.V3D_PARAM_SUPPORTS_TFU)
supports_csd = drm.v3d_get_param(DRM_V3D.V3D_PARAM_SUPPORTS_CSD)
print(f'uifcfg: {uifcfg:#010x}')
print(f'hub_ident1: {hub_ident1:#010x}')
print(f'hub_ident2: {hub_ident2:#010x}')
print(f'hub_ident3: {hub_ident3:#010x}')
print(f'core0_ident0: {core0_ident0:#010x}')
print(f'core0_ident1: {core0_ident1:#010x}')
print(f'core0_ident2: {core0_ident2:#010x}')
print(f'supports_tfu: {supports_tfu:#010x}')
print(f'supports_csd: {supports_csd:#010x}')
print('Consult /sys/kernel/debug/dri/0/v3d_regs for more information')
def test_v3d_regs():
with DRM_V3D() as drm:
try:
with RegisterMapping() as regmap:
assert regmap[HUB_UIFCFG] \
== drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_UIFCFG)
assert regmap[HUB_IDENT1] \
== drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_HUB_IDENT1)
assert regmap[HUB_IDENT2] \
== drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_HUB_IDENT2)
assert regmap[HUB_IDENT3] \
== drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_HUB_IDENT3)
assert regmap[CORE_IDENT0, 0] \
== drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_CORE0_IDENT0)
assert regmap[CORE_IDENT1, 0] \
== drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_CORE0_IDENT1)
assert regmap[CORE_IDENT2, 0] \
== drm.v3d_get_param(DRM_V3D.V3D_PARAM_V3D_CORE0_IDENT2)
except PermissionError:
print('Skipping tests because of a lack of root privilege')
def test_alloc():
print()
size = pow(2, 24)
with DRM_V3D() as drm:
handle, phyaddr = drm.v3d_create_bo(size)
offset = drm.v3d_mmap_bo(handle)
print(f'size = {size:#010x}')
print(f'handle = {handle:#010x}')
print(f'phyaddr = {phyaddr:#010x}')
print(f'offset = {offset:#010x}')