def test_ADD():
cpu = uProc(["ADD #$0F", "ADD #$FF", "ADD #$7F"])
cpu.A = 0x0F
cpu.step()
assert cpu.A == 0x1E, "ADD instruction did not set A correctly. Should have been 30, was " + repr(cpu.A)
assert cpu.C == False, "C was set inappropriately."
assert cpu.V == False, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == False, "N was set inappopriately."
assert cpu.Z == False, "Z was set inappropriately."
cpu.A = 0x01
cpu.step()
assert cpu.A == 0x00, "ADD instruction did not set A correctly. Should have been 0, was " + repr(cpu.A)
assert cpu.C == True, "C was set inappropriately."
assert cpu.V == False, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == False, "N was set inappopriately."
assert cpu.Z == True, "Z was set inappropriately."
cpu.A = 0x7F
cpu.step()
assert cpu.A == 0xFE, "ADD instruction did not set A correctly. Should have been 254, was " + repr(cpu.A)
assert cpu.C == False, "C was set inappropriately."
assert cpu.V == True, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == True, "N was set inappopriately."
assert cpu.Z == False, "Z was set inappropriately."
def test_AIS():
cpu = uProc("AIS #$01")
cpu.SP = 0x00
cpu.step()
assert cpu.SP == 0x01, "AIS instruction did not set S correctly. Should have been 1, was " + repr(
cpu.A)
def test_BHI():
cpu = uProc(["BHI 5"])
cpu.Z = 0
cpu.C = 0
cpu.step()
massassert(cpu, PC=0xF007)
cpu.PC = 0xF000
cpu.Z = 1
cpu.C = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.PC = 0xF000
cpu.Z = 0
cpu.C = 1
cpu.step()
massassert(cpu, PC=0xF002)
cpu.PC = 0xF000
cpu.Z = 1
cpu.C = 1
cpu.step()
massassert(cpu, PC=0xF002)
def test_ADD():
cpu = uProc(["ADD #$0F", "ADD #$FF", "ADD #$7F"])
cpu.A = 0x0F
cpu.step()
assert cpu.A == 0x1E, "ADD instruction did not set A correctly. Should have been 30, was " + repr(
cpu.A)
assert cpu.C == False, "C was set inappropriately."
assert cpu.V == False, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == False, "N was set inappopriately."
assert cpu.Z == False, "Z was set inappropriately."
cpu.A = 0x01
cpu.step()
assert cpu.A == 0x00, "ADD instruction did not set A correctly. Should have been 0, was " + repr(
cpu.A)
assert cpu.C == True, "C was set inappropriately."
assert cpu.V == False, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == False, "N was set inappopriately."
assert cpu.Z == True, "Z was set inappropriately."
cpu.A = 0x7F
cpu.step()
assert cpu.A == 0xFE, "ADD instruction did not set A correctly. Should have been 254, was " + repr(
cpu.A)
assert cpu.C == False, "C was set inappropriately."
assert cpu.V == True, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == True, "N was set inappopriately."
assert cpu.Z == False, "Z was set inappropriately."
def test_BHI():
cpu = uProc(["BHI 5"])
cpu.Z = 0
cpu.C = 0
cpu.step()
massassert(cpu, PC=0xF007)
cpu.PC = 0xF000
cpu.Z = 1
cpu.C = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.PC = 0xF000
cpu.Z = 0
cpu.C = 1
cpu.step()
massassert(cpu, PC=0xF002)
cpu.PC = 0xF000
cpu.Z = 1
cpu.C = 1
cpu.step()
massassert(cpu, PC=0xF002)
def test_BCLR():
cpu = uProc(["BCLR 0,5"])
cpu.ram[0x05] = 0xFF
cpu.step()
assert cpu.ram[
0x05] == 0xFE, "Incorrect RAM value- should have been $FE, was " + repr(
cpu.ram[0x05])
def automultitest(code, *saps):
cpu = uProc(code)
for sets, asserts in saps:
set_by_dict(cpu, sets)
cpu.step()
assert_by_dict(cpu, asserts)
def automultitest(code, *saps):
cpu = uProc(code)
for sets, asserts in saps:
set_by_dict(cpu, sets)
cpu.step()
assert_by_dict(cpu, asserts)
def test_ADC():
# ***Step 1: Create a new CPU, preloaded with your program.
cpu = uProc(["ADC #$0F", "ADC #$FF", "ADC #$01", "ADC #$7F"])
# ***Step 2: Set up the CPU however you'd like. Some notes that may help:
#
# -You can access registers and flags directly ("cpu.A = 12", "cpu.C = True")
# -The ram is a dictionary ("associative array" or set of name/value pairs) which maps an address to a value.
# You can access address $FF via cpu.ram[0xFF], like so "cpu.ram[0xFF] = 13".
# -The flash is organized the same way, but is called cpu.flash.
#
# For more information, view the contents of HCS08.py.
cpu.A = 0x0F
cpu.C = True
# ***Step 3: Run the instruction (or instructions). In this case, we'll single step, executing the first instruction specified.
cpu.step()
# ***Step 4: Verify that the instruction acted as expected.
assert cpu.A == 0x1F, "ADC instruction did not set A correctly. Should have been 31, was " + repr(cpu.A)
assert cpu.C == False, "C was set inappropriately."
assert cpu.V == False, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == False, "N was set inappopriately."
assert cpu.Z == False, "Z was set inappropriately."
cpu.A = 0x01
cpu.C = False
cpu.step()
assert cpu.A == 0x00, "ADC instruction did not set A correctly. Should have been 0, was " + repr(cpu.A)
assert cpu.C == True, "C was set inappropriately."
assert cpu.V == False, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == False, "N was set inappopriately."
assert cpu.Z == True, "Z was set inappropriately."
cpu.A = 0x01
cpu.C = True
cpu.step()
assert cpu.A == 0x03, "ADC instruction did not set A correctly. Should have been 3, was " + repr(cpu.A)
assert cpu.C == False, "C was set inappropriately."
assert cpu.V == False, "V was set inappropriately."
assert cpu.HC == False, "H was set inappropriately."
assert cpu.N == False, "N was set inappopriately."
assert cpu.Z == False, "Z was set inappropriately."
cpu.A = 0x7F
cpu.C = True
cpu.step()
assert cpu.A == 0xFF, "ADC instruction did not set A correctly. Should have been 255, was " + repr(cpu.A)
assert cpu.C == False, "C was set inappropriately."
assert cpu.V == True, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == True, "N was set inappopriately."
assert cpu.Z == False, "Z was set inappropriately."
def test_BEQ():
cpu = uProc(["BEQ 5", "BEQ 5"])
cpu.Z = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.Z = 1
cpu.step()
massassert(cpu, PC=0xF009)
def test_BMS():
cpu = uProc(["BMS 5", "BMS 5"])
cpu.I = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.I = 1
cpu.step()
massassert(cpu, PC=0xF009)
def test_BHCS():
cpu = uProc(["BHCS 5", "BHCS 5"])
cpu.HC = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.HC = 1
cpu.step()
massassert(cpu, PC=0xF009)
def test_BLO():
cpu = uProc(["BLO 5", "BLO 5"])
cpu.C = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.C = 1
cpu.step()
massassert(cpu, PC=0xF009)
def test_BLO():
cpu = uProc(["BLO 5", "BLO 5"])
cpu.C = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.C = 1
cpu.step()
massassert(cpu, PC=0xF009)
def test_BMS():
cpu = uProc(["BMS 5", "BMS 5"])
cpu.I = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.I = 1
cpu.step()
massassert(cpu, PC=0xF009)
def test_BHCS():
cpu = uProc(["BHCS 5", "BHCS 5"])
cpu.HC = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.HC = 1
cpu.step()
massassert(cpu, PC=0xF009)
def test_BEQ():
cpu = uProc(["BEQ 5", "BEQ 5"])
cpu.Z = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.Z = 1
cpu.step()
massassert(cpu, PC=0xF009)
def test_BIT():
cpu = uProc(["BIT #$0F", "BIT #$FF", "BIT #$00"])
cpu.A = 0xF0
cpu.step()
massassert(cpu, A=0xF0, N=0, Z=1)
cpu.step()
massassert(cpu, A=0xF0, N=1, Z=0)
cpu.step()
massassert(cpu, A=0xF0, N=0, Z=1)
def test_BGE():
cpu = uProc(["BGE 5", "BGE 5"])
cpu.N = 1
cpu.V = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.N = 0
cpu.V = 0
cpu.step()
massassert(cpu, PC=0xF009)
def test_BIT():
cpu = uProc(["BIT #$0F", "BIT #$FF", "BIT #$00"])
cpu.A = 0xF0
cpu.step()
massassert(cpu, A=0xF0, N=0, Z=1)
cpu.step()
massassert(cpu, A=0xF0, N=1, Z=0)
cpu.step()
massassert(cpu, A=0xF0, N=0, Z=1)
def test_BGE():
cpu = uProc(["BGE 5", "BGE 5"])
cpu.N = 1
cpu.V = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.N = 0
cpu.V = 0
cpu.step()
massassert(cpu, PC=0xF009)
def test_AIX():
cpu = uProc(["AIX #$01", "AIX #$FF"])
cpu.H = 0x00
cpu.X = 0x00
cpu.step()
assert cpu.H == 0x00, "AIX instruction did not set H correctly. Should have been 0, was " + repr(cpu.A)
assert cpu.X == 0x01, "AIX instruction did not set X correctly. Should have been 1, was " + repr(cpu.A)
cpu.H = 0x00
cpu.X = 0x01
cpu.step()
assert cpu.H == 0x01, "AIX instruction did not set H correctly. Should have been 1, was " + repr(cpu.A)
assert cpu.X == 0x00, "AIX instruction did not set X correctly. Should have been 0, was " + repr(cpu.A)
def autotest(code, sets, asserts):
"""
Runs a single common test case automatically.
"""
#create a new CPU
cpu = uProc(code)
#perform set-up
set_by_dict(cpu, sets)
#run the instruction
cpu.step()
#and then test the assumptions
assert_by_dict(cpu, asserts)
def autotest(code, sets, asserts):
"""
Runs a single common test case automatically.
"""
#create a new CPU
cpu = uProc(code)
#perform set-up
set_by_dict(cpu, sets)
#run the instruction
cpu.step()
#and then test the assumptions
assert_by_dict(cpu, asserts)
def test_ASR():
cpu = uProc(["ASRA", "ASRA", "ASRA", "ASRA"])
cpu.A = 0x01
cpu.step()
massassert(cpu, A=0, C=1, N=0, Z=1, V=1)
cpu.A = 0x1E
cpu.step()
massassert(cpu, A=0x0F, C=0, N=0, Z=0, V=0)
cpu.A = 0x80
cpu.step()
massassert(cpu, A=0xC0, C=0, N=1, Z=0, V=1)
cpu.A = 0xF1
cpu.step()
massassert(cpu, A=0xF8, C=1, N=1, Z=0, V=0)
def test_LSL():
cpu = uProc(["LSLA", "LSLA", "LSLA", "LSLA"])
cpu.A = 0x01
cpu.step()
massassert(cpu, A=2, C=0, N=0, Z=0, V=0)
cpu.A = 0x78
cpu.step()
massassert(cpu, A=0xF0, C=0, N=1, Z=0, V=1)
cpu.A = 0x00
cpu.step()
massassert(cpu, A=0, C=0, N=0, Z=1, V=0)
cpu.A = 0xF0
cpu.step()
massassert(cpu, A=0xE0, C=1, N=1, Z=0, V=0)
def test_LSR():
cpu = uProc(["LSRA", "LSRA", "LSRA", "LSRA"])
cpu.A = 0x01
cpu.step()
massassert(cpu, A=0, C=1, N=0, Z=1, V=1)
cpu.A = 0x1E
cpu.step()
massassert(cpu, A=0x0F, C=0, N=0, Z=0, V=0)
cpu.A = 0x80
cpu.step()
massassert(cpu, A=0x40, C=0, N=0, Z=0, V=0)
cpu.A = 0xF1
cpu.step()
massassert(cpu, A=0x78, C=1, N=0, Z=0, V=1)
def test_LSL():
cpu = uProc(["LSLA", "LSLA", "LSLA", "LSLA"])
cpu.A = 0x01
cpu.step()
massassert(cpu, A=2, C=0, N=0, Z=0, V=0)
cpu.A = 0x78
cpu.step()
massassert(cpu, A=0xF0, C=0, N=1, Z=0, V=1)
cpu.A = 0x00
cpu.step()
massassert(cpu, A=0, C=0, N=0, Z=1, V=0)
cpu.A = 0xF0
cpu.step()
massassert(cpu, A=0xE0, C=1, N=1, Z=0, V=0)
def test_LSR():
cpu = uProc(["LSRA", "LSRA", "LSRA", "LSRA"])
cpu.A = 0x01
cpu.step()
massassert(cpu, A=0, C=1, N=0, Z=1, V=1)
cpu.A = 0x1E
cpu.step()
massassert(cpu, A=0x0F, C=0, N=0, Z=0, V=0)
cpu.A = 0x80
cpu.step()
massassert(cpu, A=0x40, C=0, N=0, Z=0, V=0)
cpu.A = 0xF1
cpu.step()
massassert(cpu, A=0x78, C=1, N=0, Z=0, V=1)
def test_ASR():
cpu = uProc(["ASRA", "ASRA", "ASRA", "ASRA"])
cpu.A = 0x01
cpu.step()
massassert(cpu, A=0, C=1, N=0, Z=1, V=1)
cpu.A = 0x1E
cpu.step()
massassert(cpu, A=0x0F, C=0, N=0, Z=0, V=0)
cpu.A = 0x80
cpu.step()
massassert(cpu, A=0xC0, C=0, N=1, Z=0, V=1)
cpu.A = 0xF1
cpu.step()
massassert(cpu, A=0xF8, C=1, N=1, Z=0, V=0)
def test_AIX():
cpu = uProc(["AIX #$01", "AIX #$FF"])
cpu.H = 0x00
cpu.X = 0x00
cpu.step()
assert cpu.H == 0x00, "AIX instruction did not set H correctly. Should have been 0, was " + repr(
cpu.A)
assert cpu.X == 0x01, "AIX instruction did not set X correctly. Should have been 1, was " + repr(
cpu.A)
cpu.H = 0x00
cpu.X = 0x01
cpu.step()
assert cpu.H == 0x01, "AIX instruction did not set H correctly. Should have been 1, was " + repr(
cpu.A)
assert cpu.X == 0x00, "AIX instruction did not set X correctly. Should have been 0, was " + repr(
cpu.A)
def test_BLS():
cpu = uProc(["BLS 5", "BLS 5"])
cpu.Z = 0
cpu.C = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.Z = 0
cpu.C = 1
massset(cpu, Z=0, C=1)
cpu.step()
massassert(cpu, PC=0xF009)
cpu.PC = 0xF002
cpu.Z = 1
cpu.C = 0
cpu.step()
massassert(cpu, PC=0xF009)
def test_AND():
cpu = uProc(["AND #$0F", "AND #$FF", "AND #$00"])
cpu.A = 0xF7
cpu.step()
assert cpu.A == 0x07, "AND instruction did not set A correctly. Should have been 7, was " + repr(cpu.A)
assert cpu.N == False, "N was set inappropriately."
assert cpu.Z == False, "Z was set inappropriately."
cpu.A = 0xF7
cpu.step()
assert cpu.A == 0xF7, "AND instruction did not set A correctly. Should have been 247, was " + repr(cpu.A)
assert cpu.N == True, "N was set inappropriately."
assert cpu.Z == False, "Z was set inappropriately."
cpu.A = 0xF7
cpu.step()
assert cpu.A == 0x00, "AND instruction did not set A correctly. Should have been 0, was " + repr(cpu.A)
assert cpu.N == False, "N was set inappropriately."
assert cpu.Z == True, "Z was set inappropriately."
def test_BLS():
cpu = uProc(["BLS 5", "BLS 5"])
cpu.Z = 0
cpu.C = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.Z = 0
cpu.C = 1
massset(cpu, Z=0, C=1)
cpu.step()
massassert(cpu, PC=0xF009)
cpu.PC = 0xF002
cpu.Z = 1
cpu.C = 0
cpu.step()
massassert(cpu, PC=0xF009)
def test_BLE():
cpu = uProc(["BLE 4", "BLE 4", "BLE 4"])
cpu.N = 1
cpu.V = 1
cpu.Z = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.N = 0
cpu.V = 0
cpu.Z = 1
cpu.step()
massassert(cpu, PC=0xF008)
cpu.PC = 0xF000
cpu.N = 1
cpu.V = 0
cpu.Z = 0
cpu.step()
massassert(cpu, PC=0xF006)
def test_BLE():
cpu = uProc(["BLE 4", "BLE 4", "BLE 4"])
cpu.N = 1
cpu.V = 1
cpu.Z = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.N = 0
cpu.V = 0
cpu.Z = 1
cpu.step()
massassert(cpu, PC=0xF008)
cpu.PC = 0xF000
cpu.N = 1
cpu.V = 0
cpu.Z = 0
cpu.step()
massassert(cpu, PC=0xF006)
def test_AND():
cpu = uProc(["AND #$0F", "AND #$FF", "AND #$00"])
cpu.A = 0xF7
cpu.step()
assert cpu.A == 0x07, "AND instruction did not set A correctly. Should have been 7, was " + repr(
cpu.A)
assert cpu.N == False, "N was set inappropriately."
assert cpu.Z == False, "Z was set inappropriately."
cpu.A = 0xF7
cpu.step()
assert cpu.A == 0xF7, "AND instruction did not set A correctly. Should have been 247, was " + repr(
cpu.A)
assert cpu.N == True, "N was set inappropriately."
assert cpu.Z == False, "Z was set inappropriately."
cpu.A = 0xF7
cpu.step()
assert cpu.A == 0x00, "AND instruction did not set A correctly. Should have been 0, was " + repr(
cpu.A)
assert cpu.N == False, "N was set inappropriately."
assert cpu.Z == True, "Z was set inappropriately."
def test_BLT():
cpu = uProc(["BLT 5", "BLT 5"])
cpu.N = 0
cpu.V = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.N = 0
cpu.V = 1
cpu.step()
massassert(cpu, PC=0xF009)
cpu.PC = 0xF002
cpu.N = 1
cpu.V = 0
cpu.step()
massassert(cpu, PC=0xF009)
cpu.PC = 0xF002
cpu.N = 1
cpu.V = 1
cpu.step()
massassert(cpu, PC=0xF004)
def test_BLT():
cpu = uProc(["BLT 5", "BLT 5"])
cpu.N = 0
cpu.V = 0
cpu.step()
massassert(cpu, PC=0xF002)
cpu.N = 0
cpu.V = 1
cpu.step()
massassert(cpu, PC=0xF009)
cpu.PC = 0xF002
cpu.N = 1
cpu.V = 0
cpu.step()
massassert(cpu, PC=0xF009)
cpu.PC = 0xF002
cpu.N = 1
cpu.V = 1
cpu.step()
massassert(cpu, PC=0xF004)
def test_AIS():
cpu = uProc("AIS #$01")
cpu.SP = 0x00
cpu.step()
assert cpu.SP == 0x01, "AIS instruction did not set S correctly. Should have been 1, was " + repr(cpu.A)
def test_BCLR():
cpu = uProc(["BCLR 0,5"])
cpu.ram[0x05] = 0xFF
cpu.step()
assert cpu.ram[0x05] == 0xFE, "Incorrect RAM value- should have been $FE, was " + repr(cpu.ram[0x05])
def test_BSET():
cpu = uProc(["BSET 0,5"])
cpu.ram[0x05] = 0x00
cpu.step()
assert_by_dict(cpu, {0x05: 0x01})
def test_BSET():
cpu = uProc(["BSET 0,5"])
cpu.ram[0x05] = 0x00
cpu.step()
assert_by_dict(cpu, {0x05:0x01})
def test_ADC():
# ***Step 1: Create a new CPU, preloaded with your program.
cpu = uProc(["ADC #$0F", "ADC #$FF", "ADC #$01", "ADC #$7F"])
# ***Step 2: Set up the CPU however you'd like. Some notes that may help:
#
# -You can access registers and flags directly ("cpu.A = 12", "cpu.C = True")
# -The ram is a dictionary ("associative array" or set of name/value pairs) which maps an address to a value.
# You can access address $FF via cpu.ram[0xFF], like so "cpu.ram[0xFF] = 13".
# -The flash is organized the same way, but is called cpu.flash.
#
# For more information, view the contents of HCS08.py.
cpu.A = 0x0F
cpu.C = True
# ***Step 3: Run the instruction (or instructions). In this case, we'll single step, executing the first instruction specified.
cpu.step()
# ***Step 4: Verify that the instruction acted as expected.
assert cpu.A == 0x1F, "ADC instruction did not set A correctly. Should have been 31, was " + repr(
cpu.A)
assert cpu.C == False, "C was set inappropriately."
assert cpu.V == False, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == False, "N was set inappopriately."
assert cpu.Z == False, "Z was set inappropriately."
cpu.A = 0x01
cpu.C = False
cpu.step()
assert cpu.A == 0x00, "ADC instruction did not set A correctly. Should have been 0, was " + repr(
cpu.A)
assert cpu.C == True, "C was set inappropriately."
assert cpu.V == False, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == False, "N was set inappopriately."
assert cpu.Z == True, "Z was set inappropriately."
cpu.A = 0x01
cpu.C = True
cpu.step()
assert cpu.A == 0x03, "ADC instruction did not set A correctly. Should have been 3, was " + repr(
cpu.A)
assert cpu.C == False, "C was set inappropriately."
assert cpu.V == False, "V was set inappropriately."
assert cpu.HC == False, "H was set inappropriately."
assert cpu.N == False, "N was set inappopriately."
assert cpu.Z == False, "Z was set inappropriately."
cpu.A = 0x7F
cpu.C = True
cpu.step()
assert cpu.A == 0xFF, "ADC instruction did not set A correctly. Should have been 255, was " + repr(
cpu.A)
assert cpu.C == False, "C was set inappropriately."
assert cpu.V == True, "V was set inappropriately."
assert cpu.HC == True, "H was set inappropriately."
assert cpu.N == True, "N was set inappopriately."
assert cpu.Z == False, "Z was set inappropriately."
