示例#1
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class MdioAccess(portColossus.MdioAccess):
    """
    Proteus Mdio implementation
    """
    def __init__(self, port, bar=0):
        self.mdio = Mdio(port, bar, portColossus.MDIO_CMD_REG, portColossus.MDIO_DATA_REG)

    def gearbox_read(self, device, regAddr):
        return self.mdio.read(GEARBOX_PORT_ADDR, device, regAddr)

    def gearbox_write(self, device, regAddr, data):
        self.mdio.write(GEARBOX_PORT_ADDR, device, regAddr, data)
示例#2
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 def __init__(self, port, bar=0):
     self.mdio = Mdio(port, bar, portColossus.MDIO_CMD_REG, portColossus.MDIO_DATA_REG)
示例#3
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 def __init__(self, port, bar=0):
     """
     initialize MDIO Bar0 Class
     """
     # MDIO for Colossus on BAR0
     self.mdio = Mdio(port, bar, MDIO_CMD_REG, MDIO_DATA_REG)
示例#4
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class MdioAccess():
    """
    Mdio Access Class
    """
    def __init__(self, port, bar=0):
        """
        initialize MDIO Bar0 Class
        """
        # MDIO for Colossus on BAR0
        self.mdio = Mdio(port, bar, MDIO_CMD_REG, MDIO_DATA_REG)

    def read(self, devAddr, portAddr, regAddr):
        return self.mdio.read(devAddr, portAddr, regAddr)

    def write(self, devAddr, portAddr, regAddr, data):
        self.mdio.write(devAddr, portAddr, regAddr, data)

    def cfp_read(self, devAddr, regAddr):
        return self.mdio.read(CFP_PORT_ADDR, devAddr, regAddr)

    def cfp_write(self, devAddr, regAddr, data):
        self.mdio.write(CFP_PORT_ADDR, devAddr, regAddr, data)

    def gearbox_read(self, regAddr):
        return self.mdio.read(GEARBOX_PORT_ADDR, DEVICE_1, regAddr)

    def gearbox_write(self, regAddr, data):
        self.mdio.write(GEARBOX_PORT_ADDR, DEVICE_1, regAddr, data)

    def cfp_adaptor_read(self, devAddr, regAddr):
        return self.mdio.read(CFP_ADAPTOR_PORT_ADDR, devAddr, regAddr)

    def cfp_adaptor_write(self, devAddr, regAddr, data):
        self.mdio.write(CFP_ADAPTOR_PORT_ADDR, devAddr, regAddr, data)

    def writeSelectedBits(self, devAddr, portAddr, regAddr, mask, data):
        mdio_data = self.read(devAddr, portAddr, regAddr)
        mdio_data &= invert(mask)
        mdio_data |= data
        # mdio data is only 16 bits in width
        mdio_data &= 0xffff
        self.write(devAddr, portAddr, regAddr, mdio_data)