def execute(self, processor): if processor.condition_passed(): rotated = ror(processor.registers.get(self.m), 32, self.rotation) temp_rd = set_substring( 0, 15, 0, sign_extend(substring(rotated, 7, 0), 8, 16)) temp_rd = set_substring( temp_rd, 31, 16, sign_extend(substring(rotated, 23, 16), 8, 16)) processor.registers.set(self.d, temp_rd)
def execute(self, processor): if processor.condition_passed(): rotated = ror(processor.registers.get(self.m), 32, self.rotation) n = processor.registers.get(self.n) lower_half = add(substring(n, 15, 0), sign_extend(substring(rotated, 7, 0), 8, 16), 16) temp_rd = set_substring(0, 15, 0, lower_half) upper_half = add(substring(n, 31, 16), sign_extend(substring(rotated, 23, 16), 8, 16), 16) temp_rd = set_substring(temp_rd, 31, 16, upper_half) processor.registers.set(self.d, temp_rd)
def execute(self, processor): if processor.condition_passed(): if processor.registers.current_mode_is_hyp(): print "unpredictable" else: try: processor.null_check_if_thumbee(self.n) except EndOfInstruction: pass else: offset = processor.registers.get( self.m) if self.register_form else self.imm32 offset_addr = bits_add(processor.registers.get( self.n), offset, 32) if self.add else bits_sub( processor.registers.get(self.n), offset, 32) address = processor.registers.get( self.n) if self.post_index else offset_addr data = processor.mem_u_unpriv_get(address, 2) if self.post_index: processor.registers.set(self.n, offset_addr) if processor.unaligned_support() or not address[31]: processor.registers.set(self.t, sign_extend(data, 32)) else: processor.registers.set(self.t, BitArray(length=32)) # unknown
def from_bitarray(instr, processor): imm11 = substring(instr, 10, 0) imm32 = sign_extend(imm11 * 2, 12, 32) if processor.in_it_block() and not processor.last_in_it_block(): print('unpredictable') else: return BT2(instr, imm32=imm32)
def execute(self, processor): if processor.condition_passed(): rotated = ror(processor.registers.get(self.m), 32, self.rotation) processor.registers.set( self.d, add(processor.registers.get(self.n), sign_extend(lower_chunk(rotated, 8), 8, 32), 32) )
def from_bitarray(instr, processor): imm24 = substring(instr, 23, 0) h = bit_at(instr, 24) imm32 = sign_extend(chain(imm24, h, 1) << 1, 26, 32) target_instrset = InstrSet.THUMB return BlBlxImmediateA2(instr, target_instr_set=target_instrset, imm32=imm32)
def execute(self, processor): if processor.condition_passed(): msbit = self.lsbit + self.widthminus1 if msbit <= 31: processor.registers.set( self.d, sign_extend( processor.registers.get(self.n)[31 - msbit:32 - self.lsbit], 32)) else: print "unpredictable"
def execute(self, processor): if processor.condition_passed(): msbit = self.lsbit + self.widthminus1 if msbit <= 31: processor.registers.set( self.d, sign_extend( substring(processor.registers.get(self.n), msbit, self.lsbit), self.widthminus1 + 1, 32)) else: print('unpredictable')
def execute(self, processor): if processor.condition_passed(): try: processor.null_check_if_thumbee(15) except EndOfInstruction: pass else: base = align(processor.registers.get_pc(), 4) address = bits_add(base, self.imm32, 32) if self.add else bits_sub( base, self.imm32, 32) processor.registers.set( self.t, sign_extend(processor.mem_u_get(address, 1), 32))
def execute(self, processor): if processor.condition_passed(): try: processor.null_check_if_thumbee(15) except EndOfInstruction: pass else: base = align(processor.registers.get_pc(), 4) address = bits_add(base, self.imm32, 32) if self.add else bits_sub(base, self.imm32, 32) data = processor.mem_u_get(address, 2) if processor.unaligned_support() or not address[31]: processor.registers.set(self.t, sign_extend(data, 32)) else: processor.registers.set(self.t, BitArray(length=32)) # unkown
def from_bitarray(instr, processor): imm11 = substring(instr, 10, 0) j2 = bit_at(instr, 11) j1 = bit_at(instr, 13) imm10 = substring(instr, 25, 16) s = bit_at(instr, 26) i1 = bit_not(j1 ^ s, 1) i2 = bit_not(j2 ^ s, 1) imm32 = sign_extend( chain(s, chain(i1, chain(i2, chain(imm10, imm11 << 1, 12), 22), 23), 24), 25, 32) if processor.in_it_block() and not processor.last_in_it_block(): print('unpredictable') else: return BT4(instr, imm32=imm32)
def execute(self, processor): if processor.condition_passed(): try: processor.null_check_if_thumbee(15) except EndOfInstruction: pass else: offset_addr = bits_add(processor.registers.get( self.n), self.imm32, 32) if self.add else bits_sub( processor.registers.get(self.n), self.imm32, 32) address = offset_addr if self.index else processor.registers.get( self.n) processor.registers.set( self.t, sign_extend(processor.mem_u_get(address, 1), 32)) if self.wback: processor.registers.set(self.n, offset_addr)
def from_bitarray(instr, processor): imm11 = substring(instr, 10, 0) j2 = bit_at(instr, 11) j1 = bit_at(instr, 13) imm10 = substring(instr, 25, 16) s = bit_at(instr, 26) i1 = bit_not(j1 ^ s, 1) i2 = bit_not(j2 ^ s, 1) imm32 = sign_extend( chain(s, chain(i1, chain(i2, chain(imm10, imm11 << 1, 12), 22), 23), 24), 25, 32) target_instr_set = processor.registers.current_instr_set() if processor.in_it_block() and not processor.last_in_it_block(): print('unpredictable') else: return BlBlxImmediateT1(instr, target_instr_set=target_instr_set, imm32=imm32)
def execute(self, processor): if processor.condition_passed(): try: processor.null_check_if_thumbee(self.n) except EndOfInstruction: pass else: offset_addr = bits_add(processor.registers.get( self.n), self.imm32, 32) if self.add else bits_sub( processor.registers.get(self.n), self.imm32, 32) address = offset_addr if self.index else processor.registers.get( self.n) data = processor.mem_u_get(address, 2) if self.wback: processor.registers.set(self.n, offset_addr) if processor.unaligned_support() or not bit_at(address, 0): processor.registers.set(self.t, sign_extend(data, 16, 32)) else: processor.registers.set(self.t, 0x00000000) # unknown
def execute(self, processor): try: processor.null_check_if_thumbee(self.n) except EndOfInstruction: pass else: offset = shift(processor.registers.get(self.m), self.shift_t, self.shift_n, processor.registers.cpsr.get_c()) offset_addr = bits_add(processor.registers.get( self.n), offset, 32) if self.add else bits_sub( processor.registers.get(self.n), offset, 32) address = offset_addr if self.index else processor.registers.get( self.n) data = processor.mem_u_get(address, 2) if self.wback: processor.registers.set(self.n, offset_addr) if processor.unaligned_support() or not address[31]: processor.registers.set(self.t, sign_extend(data, 32)) else: processor.registers.set(self.t, BitArray(length=32)) # unknown
def from_bitarray(instr, processor): h = bit_at(instr, 0) imm10l = substring(instr, 10, 1) j2 = bit_at(instr, 11) j1 = bit_at(instr, 13) imm10h = substring(instr, 25, 16) s = bit_at(instr, 26) i1 = bit_not(j1 ^ s, 1) i2 = bit_not(j2 ^ s, 1) imm32 = sign_extend( chain(s, chain(i1, chain(i2, chain(imm10h, imm10l << 2, 12), 22), 23), 24), 25, 32) target_instr_set = InstrSet.ARM if processor.registers.current_instr_set() == InstrSet.THUMB_EE or h: raise UndefinedInstructionException() elif processor.in_it_block() and not processor.last_in_it_block(): print('unpredictable') else: return BlBlxImmediateT2(instr, target_instr_set=target_instr_set, imm32=imm32)
def execute(self, processor): if processor.condition_passed(): if processor.registers.current_mode_is_hyp(): print('unpredictable') else: try: processor.null_check_if_thumbee(self.n) except EndOfInstruction: pass else: offset = processor.registers.get( self.m) if self.register_form else self.imm32 offset_addr = bits_add(processor.registers.get( self.n), offset, 32) if self.add else bits_sub( processor.registers.get(self.n), offset, 32) address = processor.registers.get( self.n) if self.post_index else offset_addr processor.registers.set( self.t, sign_extend(processor.mem_u_unpriv_get(address, 1), 8, 32)) if self.post_index: processor.registers.set(self.n, offset_addr)
def from_bitarray(instr, processor): imm32 = sign_extend(substring(instr, 23, 0) << 2, 26, 32) return BlBlxImmediateA1(instr, target_instr_set=InstrSet.ARM, imm32=imm32)
def execute(self, processor): if processor.condition_passed(): m = processor.registers.get(self.m) result = set_substring(0, 31, 8, sign_extend(lower_chunk(m, 8), 8, 24)) result = set_substring(result, 7, 0, substring(m, 15, 8)) processor.registers.set(self.d, result)
def execute(self, processor): if processor.condition_passed(): result = sign_extend(processor.registers.get(self.m)[24:32], 24) result += processor.registers.get(self.m)[16:24] processor.registers.set(self.d, result)
def from_bitarray(instr, processor): imm32 = sign_extend(substring(instr, 23, 0) << 2, 26, 32) return BA1(instr, imm32=imm32)
def asr_c(x, x_len, shift): assert shift > 0 extended_x = bits_ops.sign_extend(x, x_len, shift + x_len) result = substring(extended_x, shift + x_len - 1, shift) carry_out = bit_at(extended_x, shift - 1) return result, carry_out