示例#1
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    def _translate_bisz(self, oprnd1, oprnd2, oprnd3):
        """Return a formula representation of a BISZ instruction.
        """
        assert oprnd1.size and oprnd3.size

        op1_var = self._translate_src_oprnd(oprnd1)
        op3_var, op3_var_constrs = self._translate_dst_oprnd(oprnd3)

        result = smtfunction.ite(oprnd3.size, op1_var == 0x0,
                                 smtsymbol.Constant(oprnd3.size, 0x1),
                                 smtsymbol.Constant(oprnd3.size, 0x0))

        return [op3_var == result] + op3_var_constrs
示例#2
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 def _translate_src_oprnd(self, operand):
     """Translate source operand to a SMT expression.
     """
     if isinstance(operand, ReilRegisterOperand):
         return self._translate_src_register_oprnd(operand)
     elif isinstance(operand, ReilImmediateOperand):
         return smtsymbol.Constant(operand.size, operand.immediate)
     else:
         raise Exception("Invalid operand type")
示例#3
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    def get_operand_expr(self, operand, mode="post"):
        """Return a smt bit vector that represents a register (architectural or
        temporal).
        """
        if isinstance(operand, ReilRegisterOperand):
            if operand.name in self._arch_info.registers_all:
                # Process architectural registers (eax, ebx, etc.)
                expr = self.get_register_expr(operand.name, mode=mode)
            else:
                # Process temporal registers (t0, t1, etc.)
                var_name = self._get_var_name(operand.name, mode)
                expr = self._translator.make_bitvec(operand.size, var_name)
        elif isinstance(operand, ReilImmediateOperand):
            expr = smtsymbol.Constant(operand.size, operand.immediate)
        else:
            raise Exception("Invalid operand: %s" % str(operand))

        return expr