def init_lfsr_14_lut():
"""
Generates a 14bit LFSR according to Manual v1.9 page 19
"""
lfsr = BitLogic(14)
lfsr[7:0] = 0xFF
lfsr[13:8] = 63
dummy = 0
for i in range(2**14):
_lfsr_14_lut[BitLogic.tovalue(lfsr)] = i
dummy = lfsr[13]
lfsr[13] = lfsr[12]
lfsr[12] = lfsr[11]
lfsr[11] = lfsr[10]
lfsr[10] = lfsr[9]
lfsr[9] = lfsr[8]
lfsr[8] = lfsr[7]
lfsr[7] = lfsr[6]
lfsr[6] = lfsr[5]
lfsr[5] = lfsr[4]
lfsr[4] = lfsr[3]
lfsr[3] = lfsr[2]
lfsr[2] = lfsr[1]
lfsr[1] = lfsr[0]
lfsr[0] = lfsr[2] ^ dummy ^ lfsr[12] ^ lfsr[13]
_lfsr_14_lut[2**14 - 1] = 0
def init_gray_14_lut():
"""
Generates a 14bit gray according to Manual v1.9 page 19
"""
for j in range(2**14):
encoded_value = BitLogic(14) #48
encoded_value[13:0] = j #47
gray_decrypt_v = BitLogic(14) #48
gray_decrypt_v[13] = encoded_value[13] #47
for i in range(12, -1, -1): #46
gray_decrypt_v[i] = gray_decrypt_v[i + 1] ^ encoded_value[i]
_gray_14_lut[j] = gray_decrypt_v.tovalue()
def init_lfsr_4_lut():
"""
Generates a 4bit LFSR according to Manual v1.9 page 19
"""
lfsr = BitLogic(4)
lfsr[3:0] = 0xF
dummy = 0
for i in range(2**4):
_lfsr_4_lut[BitLogic.tovalue(lfsr)] = i
dummy = lfsr[3]
lfsr[3] = lfsr[2]
lfsr[2] = lfsr[1]
lfsr[1] = lfsr[0]
lfsr[0] = lfsr[3] ^ dummy
_lfsr_4_lut[2**4 - 1] = 0
def init_lfsr_10_lut():
"""
Generates a 10bit LFSR according to Manual v1.9 page 19
"""
lfsr = BitLogic(10)
lfsr[7:0] = 0xFF
lfsr[9:8] = 0b11
dummy = 0
for i in range(2**10):
_lfsr_10_lut[BitLogic.tovalue(lfsr)] = i
dummy = lfsr[9]
lfsr[9] = lfsr[8]
lfsr[8] = lfsr[7]
lfsr[7] = lfsr[6]
lfsr[6] = lfsr[5]
lfsr[5] = lfsr[4]
lfsr[4] = lfsr[3]
lfsr[3] = lfsr[2]
lfsr[2] = lfsr[1]
lfsr[1] = lfsr[0]
lfsr[0] = lfsr[7] ^ dummy
_lfsr_10_lut[2**10 - 1] = 0
def run_test_pulses():
# Step 1: Initialize chip & hardware
chip = TPX3()
chip.init()
# Step 2: Chip start-up sequence
# Step 2a: Reset the chip
chip['CONTROL']['RESET'] = 1
chip['CONTROL'].write()
chip['CONTROL']['RESET'] = 0
chip['CONTROL'].write()
# Step 2b: Enable power pulsing
chip['CONTROL']['EN_POWER_PULSING'] = 1
chip['CONTROL'].write()
# Step 2c: Reset the Timer
data = chip.getGlobalSyncHeader() + [0x40] + [0x0]
chip.write(data)
# Step 2d: Start the Timer
data = chip.getGlobalSyncHeader() + [0x4A] + [0x0]
chip.write(data)
chip['RX'].reset()
chip['RX'].DATA_DELAY = 0
chip['RX'].ENABLE = 1
time.sleep(0.01)
print 'RX ready:', chip['RX'].is_ready
print 'get_decoder_error_counter', chip['RX'].get_decoder_error_counter()
data = chip.write_outputBlock_config(write=False)
chip.write(data)
print 'RX ready:', chip['RX'].is_ready
print(chip.get_configuration())
# Step 2e: reset sequential / resets pixels?!
# before setting PCR need to reset pixel matrix
data = chip.reset_sequential(False)
chip.write(data, True)
fdata = chip['FIFO'].get_data()
print fdata
dout = chip.decode_fpga(fdata, True)
print dout
ddout = chip.decode(dout[0], 0x71)
print ddout
try:
ddout = chip.decode(dout[1], 0x71)
print ddout
except IndexError:
print("no EoR found")
# Step 3: Set PCR
# Step 3a: Produce needed PCR
for x in range(255):
for y in range(256):
chip.set_pixel_pcr(x, y, 0, 7, 1)
for y in range(255):
chip.set_pixel_pcr(255, y, 0, 7, 1)
chip.set_pixel_pcr(255, 255, 1, 7, 0)
# Step 3b: Write PCR to chip
for i in range(256):
data = chip.write_pcr([i], write=False)
chip.write(data, True)
# Step 4: Set TP DACs
# Step 4a: Set VTP_coarse DAC (8-bit)
print "Set VTP_coarse"
chip.dacs["VTP_coarse"] = 0b1000000
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
# Step 4b: Set VTP_fine DAC (9-bit)
print "Set VTP_fine"
chip.dacs["VTP_fine"] = 0b100000000
print chip.dacs["VTP_fine"]
# after setting the DACs, write them
chip.write_dacs()
#chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# Step 5: Set general config
print "Set general config"
data = chip.write_general_config(write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
# Step 6: Write to the test pulse registers
# Step 6a: Write to period and phase tp registers
print "Write TP_period and TP_phase"
data = chip.write_tp_period(10, 0, write=False)
chip.write(data, True)
# Step 6b: Write to pulse number tp register
print "Write TP_number"
data = chip.write_tp_pulsenumber(4, write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
print "Read TP config"
data = chip.read_tp_config(write=False)
chip.write(data, True)
# Step 7: Set CTPR
print "Write CTPR"
data = chip.write_ctpr(range(128), write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
print "\tGet EoC: "
dout = chip.decode(
chip.decode_fpga(chip['FIFO'].get_data(), True)[0], 0x71)
print_cmp_commands("11001111", dout[0], dout[1])
# Step 8: Send "read pixel matrix data driven" command
print "Read pixel matrix data driven"
data = chip.read_pixel_matrix_datadriven(write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
# Step 9: Enable Shutter
chip['CONTROL']['SHUTTER'] = 1
chip['CONTROL'].write()
# Step 10: Receive data
""" ??? """
print "Acquisition"
time.sleep(1)
# Get the data and do the FPGA decoding
# dout = chip.decode_fpga(chip['FIFO'].get_data(), True)
# for el in dout:
# print "Decoded: ", el
# Step 11: Disable Shutter
print "Receive 'TP_internalfinished' and 'End of Readout'"
chip['CONTROL']['SHUTTER'] = 0
chip['CONTROL'].write()
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoR (header: 0x71)
dout = chip.decode_fpga(chip['FIFO'].get_data(), True)
pixel_counter = 0
EoR_counter = 0
stop_readout_counter = 0
reset_sequential_counter = 0
unknown_counter = 0
print "Get data:"
for el in dout:
if el[47:44].tovalue() is 0xB:
ddout = chip.decode(el, 0xB0)
print "\tX Pos:", chip.pixel_address_to_x(ddout[0])
print "\tY Pos:", chip.pixel_address_to_y(ddout[0])
print "\tiTOT:", chip.lfsr_14[BitLogic.tovalue(ddout[1])]
print "\tEvent Counter:", chip.lfsr_10[BitLogic.tovalue(ddout[2])]
print "\tHit Counter", chip.lfsr_4[BitLogic.tovalue(ddout[3])]
pixel_counter += 1
elif el[47:40].tovalue() is 0x71:
print "\tEoC/EoR/TP_Finished:", chip.decode(el, 0x71)
EoR_counter += 1
elif el[47:40].tovalue() is 0xF0:
print "\tStop Matrix Readout:", el
stop_readout_counter += 1
elif el[47:40].tovalue() is 0xE0:
print "\tReset Sequential:", el
reset_sequential_counter += 1
else:
print "\tUnknown Packet:", el
unknown_counter += 1
print "Pixel counter:", pixel_counter
print "EoR counter:", EoR_counter
print "Stop Matrix Readout counter:", stop_readout_counter
print "Reset Sequential counter:", reset_sequential_counter
print "Unknown counter:", unknown_counter
def run_test_pulses():
# Step 1: Initialize chip & hardware
chip = TPX3()
chip.init()
# Step 2: Chip start-up sequence
# Step 2a: Reset the chip
chip['CONTROL']['RESET'] = 1
chip['CONTROL'].write()
chip['CONTROL']['RESET'] = 0
chip['CONTROL'].write()
# Step 2b: Enable power pulsing
chip['CONTROL']['EN_POWER_PULSING'] = 1
chip['CONTROL'].write()
# Step 2c: Reset the Timer
data = chip.getGlobalSyncHeader() + [0x40] + [0x0]
chip.write(data)
# Step 2d: Start the Timer
data = chip.getGlobalSyncHeader() + [0x4A] + [0x0]
chip.write(data)
chip['RX'].reset()
chip['RX'].DATA_DELAY = 0
chip['RX'].ENABLE = 1
time.sleep(0.01)
print 'RX ready:', chip['RX'].is_ready
print 'get_decoder_error_counter', chip['RX'].get_decoder_error_counter()
data = chip.write_outputBlock_config(write=False)
chip.write(data)
print 'RX ready:', chip['RX'].is_ready
print(chip.get_configuration())
# Step 2e: reset sequential / resets pixels?!
# before setting PCR need to reset pixel matrix
data = chip.reset_sequential(False)
chip.write(data, True)
fdata = chip['FIFO'].get_data()
print fdata
dout = chip.decode_fpga(fdata, True)
print dout
ddout = chip.decode(dout[0], 0x71)
print ddout
try:
ddout = chip.decode(dout[1], 0x71)
print ddout
except IndexError:
print("no EoR found")
# Step 3: Set PCR
# Step 3a: Produce needed PCR
for x in range(256):
for y in range(256):
chip.set_pixel_pcr(x, y, TP_OFF, 7, MASK_OFF)
# choose the pixel for which to do an SCurve
x_pixel = 128
y_pixel = 128
chip.set_pixel_pcr(x_pixel, y_pixel, TP_ON, 7, MASK_ON)
# Step 3b: Write PCR to chip
for i in range(256):
data = chip.write_pcr([i], write=False)
chip.write(data, True)
# Step 5: Set general config
print "Set general config"
data = chip.write_general_config(write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
# Step 6: Write to the test pulse registers
# Step 6a: Write to period and phase tp registers
print "Write TP_period and TP_phase"
data = chip.write_tp_period(1, 0, write=False)
chip.write(data, True)
# Step 6b: Write to pulse number tp register
print "Write TP_number"
data = chip.write_tp_pulsenumber(104, write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
print "Read TP config"
data = chip.read_tp_config(write=False)
chip.write(data, True)
print "Set Vthreshold_coarse"
data = chip.set_dac("Vthreshold_coarse", 8, write=False)
chip.write(data, True)
# Step 7: Set CTPR
print "Write CTPR"
data = chip.write_ctpr([128], write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
print "\tGet EoC: "
dout = chip.decode(chip.decode_fpga(chip['FIFO'].get_data(), True)[0], 0x71)
print_cmp_commands("11001111", dout[0], dout[1])
tp_fine = 2.5 # 9 bit
tp_coarse = 5 # 8 bit
tpvals = []
evCounters = []
wrongCommands = 0
thrs = []
try:
for tpc in [170]:
# Step 4: Set TP DACs
# Step 4a: Set VTP_coarse DAC (8-bit)
print "Set VTP_coarse"
data = chip.set_dac("VTP_coarse", tpc, write=False)
chip.write(data, True)
for tpf in range(512):
tpval = tpf * tp_fine + tpc * tp_coarse
print("Starting to work on tp val {} mV".format(tpval))
print "Set VTP_fine"
data = chip.set_dac("VTP_fine", tpf, write=False)
chip.write(data, True)
# Step 8: Send "read pixel matrix data driven" command
#print "Read pixel matrix data driven"
data = chip.read_pixel_matrix_datadriven(write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
# Step 9: Enable Shutter
chip['CONTROL']['SHUTTER'] = 1
chip['CONTROL'].write()
# Step 10: Receive data
""" ??? """
#print "Acquisition"
time.sleep(0.05)
# Get the data and do the FPGA decoding
# dout = chip.decode_fpga(chip['FIFO'].get_data(), True)
# for el in dout:
# print "Decoded: ", el
# Step 11: Disable Shutter
#print "Receive 'TP_internalfinished' and 'End of Readout'"
chip['CONTROL']['SHUTTER'] = 0
chip['CONTROL'].write()
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoR (header: 0x71)
dout = chip.decode_fpga(chip['FIFO'].get_data(), True)
print dout
for i in range(len(dout)):
try:
ddout = chip.decode(dout[i], 0xB0)
if ddout[0] != "EoC":
x = chip.pixel_address_to_x(ddout[0])
y = chip.pixel_address_to_y(ddout[0])
if x == 128 and y == 128:
iTot = chip.lfsr_14[BitLogic.tovalue(ddout[1])]
evCount = chip.lfsr_10[BitLogic.tovalue(ddout[2])]
hitCount = chip.lfsr_4[BitLogic.tovalue(ddout[3])]
evCounters.append(evCount)
tpvals.append(tpval)
print("TP {} mV, iToT {}, evCount {}, hitCount {}".format(tpval, iTot, evCount, hitCount))
except ValueError:
wrongCommands += 1
continue
except KeyboardInterrupt:
print("Current wrong command counter is {}".format(wrongCommands))
import sys
sys.exit()
print("We found {} wrong commands during SCurve".format(wrongCommands))
plt.plot(tpvals, evCounters)
plt.title("SCurve scan 1 pixel ({} / {})".format(x_pixel, y_pixel))
plt.xlabel("VTP")
plt.ylabel("Count / #")
plt.show()
def main(args_dict):
led_blink = args_dict["led_blink"]
benchmark = args_dict["benchmark"]
delay_scan = args_dict["delay_scan"]
timestamp_request = args_dict["timestamp_request"]
timestamp_hits = args_dict["timestamp_hits"]
chip = TPX3()
chip.init()
chip.toggle_pin("RESET")
print('RX ready:', chip['RX0'].is_ready)
print('get_decoder_error_counter', chip['RX0'].get_decoder_error_counter())
data = chip.write_pll_config(write=False)
chip.write(data)
data = chip.write_outputBlock_config(write=False)
chip.write(data)
print('RX ready:', chip['RX0'].is_ready)
if delay_scan is True:
for i in range(32):
chip['RX0'].reset()
chip['RX0'].INVERT = 0
chip['RX0'].SAMPLING_EDGE = 0
chip['RX0'].DATA_DELAY = i # i
chip['RX0'].ENABLE = 1
chip['FIFO'].reset()
time.sleep(0.01)
chip['FIFO'].get_data()
for _ in range(100):
data = [0xAA, 0x00, 0x00, 0x00, 0x00
] + [0x11] + [0x00 for _ in range(3)]
chip.write(data)
fdata = chip['FIFO'].get_data()
print('i =', i, '\tlen =', len(fdata), '\terror =',
chip['RX0'].get_decoder_error_counter(), "\tready =",
chip['RX0'].is_ready)
print('get_decoder_error_counter',
chip['RX0'].get_decoder_error_counter())
print('RX ready:', chip['RX0'].is_ready)
for i in fdata[:10]:
print(hex(i), (i & 0x01000000) != 0, hex(i & 0xffffff))
b = BitLogic(32)
b[:] = int(i)
print(b[:])
pretty_print(i)
chip['RX0'].reset()
chip['RX0'].DATA_DELAY = 20
chip['RX0'].ENABLE = 1
time.sleep(0.01)
while (not chip['RX0'].is_ready):
pass
print((chip.get_configuration()))
print("Get ChipID")
data = chip.read_periphery_template("EFuse_Read")
data += [0x00] * 4
print(data)
chip["FIFO"].reset()
time.sleep(0.1)
chip.write(data)
time.sleep(0.1)
fdata = chip['FIFO'].get_data()
print(fdata)
dout = chip.decode_fpga(fdata, True)
if len(dout) == 2:
wafer_number = dout[1][19:8]
y_position = dout[1][7:4]
x_position = dout[1][3:0]
print("W{}-{}{}".format(
wafer_number.tovalue(),
chr(ord('a') + x_position.tovalue() - 1).upper(),
y_position.tovalue()))
print("Test set DAC")
data = chip.set_dac("Vfbk", 0b10101011, write=False)
chip['FIFO'].reset()
time.sleep(0.01)
chip.write(data)
time.sleep(0.01)
data = chip.read_dac("Vfbk", write=False)
chip['FIFO'].reset()
time.sleep(0.01)
chip.write(data)
time.sleep(0.01)
fdata = chip['FIFO'].get_data()
dout = chip.decode_fpga(fdata, True)
for i, d in enumerate(fdata):
print(i, hex(d), (d & 0x01000000) != 0, bin(d & 0xffffff),
hex(d & 0xffffff))
pretty_print(d)
for el in dout:
print("Decode_fpga: ", el)
ddout = chip.decode(dout[0], 0x03)
print("Decoded 'Read DAC':")
for el in ddout:
print("\tDecode: ", el)
ddout = chip.decode(dout[1], 0x71)
print("Decoded 'End of Command':")
for el in ddout:
print("\tDecode: ", el)
print("Test set general config")
data = chip.write_general_config(write=False)
chip['FIFO'].reset()
time.sleep(0.01)
chip.write(data)
time.sleep(0.01)
data = chip.read_general_config(write=False)
chip['FIFO'].reset()
time.sleep(0.01)
chip.write(data)
time.sleep(0.01)
fdata = chip['FIFO'].get_data()
print(fdata)
dout = chip.decode_fpga(fdata, True)
print(dout)
for i, d in enumerate(fdata):
print(i, hex(d), (d & 0x01000000) != 0, bin(d & 0xffffff),
hex(d & 0xffffff))
pretty_print(d)
for el in dout:
print("Decode_fpga: ", el)
ddout = chip.decode(dout[0], 0x31)
print("Decoded 'Read GeneralConfig':")
for el in ddout:
print("\tDecode: ", el)
ddout = chip.decode(dout[1], 0x71)
print("Decoded 'End of Command':")
for el in ddout:
print("\tDecode: ", el)
print("Test test pulse registers")
data = chip.write_tp_period(100, 0, write=False)
chip['FIFO'].reset()
time.sleep(0.01)
chip.write(data)
time.sleep(0.01)
data = chip.write_tp_pulsenumber(1000, write=False)
chip['FIFO'].reset()
time.sleep(0.01)
chip.write(data)
time.sleep(0.01)
data = chip.read_tp_config(write=False)
chip['FIFO'].reset()
time.sleep(0.01)
chip.write(data)
time.sleep(0.01)
fdata = chip['FIFO'].get_data()
print(fdata)
dout = chip.decode_fpga(fdata, True)
print(dout)
for i, d in enumerate(fdata):
print(i, hex(d), (d & 0x01000000) != 0, bin(d & 0xffffff),
hex(d & 0xffffff))
pretty_print(d)
for el in dout:
print("Decode_fpga: ", el)
ddout = chip.decode(dout[0], 0x0E)
print("Decoded 'Read TestPulse Config':")
for el in ddout:
print("\tDecode: ", el)
ddout = chip.decode(dout[1], 0x71)
print("Decoded 'End of Command':")
for el in ddout:
print("\tDecode: ", el)
if timestamp_request is True:
print("Test Timestamp extension")
chip['gpio'].reset()
chip['FIFO'].reset()
time.sleep(0.01)
chip['FIFO'].get_data()
chip['PULSE_GEN'].reset()
chip['PULSE_GEN'].set_delay(40)
chip['PULSE_GEN'].set_width(4056)
chip['PULSE_GEN'].set_repeat(200)
chip['PULSE_GEN'].set_en(True)
print("\t Delay = ", chip['PULSE_GEN'].get_delay())
print("\t Width = ", chip['PULSE_GEN'].get_width())
print("\t Repeat = ", chip['PULSE_GEN'].get_repeat())
for counter in range(1):
chip.toggle_pin("TO_SYNC")
for _ in range(20):
chip.requestTimerLow()
time.sleep(0.1)
ret = chip['FIFO'].get_data()
print("\t Length of FIFO data: ", len(ret))
print("\t FIFO data: ")
for i, r in enumerate(ret):
if (r & 0xf0000000) >> 28 == 0b0101:
if (r & 0x0f000000) >> 24 == 0b0001:
print("FPGA", bin(r & 0x00ffffff), r & 0x00ffffff,
(r & 0x00ffffff) * 25 / 1000000)
else:
if (r & 0x0f000000) >> 24 != 0b0001:
dataout = BitLogic(48)
d1 = bitword_to_byte_list(ret[i - 1])
d2 = bitword_to_byte_list(ret[i])
dataout[47:40] = d2[3]
dataout[39:32] = d2[2]
dataout[31:24] = d2[1]
dataout[23:16] = d1[3]
dataout[15:8] = d1[2]
dataout[7:0] = d1[1]
if (dataout.tovalue() & 0xff0000000000) >> 40 != 0x71:
print("CHIP", bin(dataout.tovalue() & 0xffffffff),
dataout.tovalue() & 0xffffffff,
(dataout.tovalue() & 0xffffffff) * 25 /
1000000)
time.sleep(1)
if timestamp_hits is True:
with open('timestamp_test.txt', 'w') as f:
sys.stdout = f
print("Test Timestamp extension - Hit data")
chip.toggle_pin("RESET")
for rx in {'RX0', 'RX1', 'RX2', 'RX3', 'RX4', 'RX5', 'RX6', 'RX7'}:
chip[rx].reset()
chip[rx].DATA_DELAY = 0
chip[rx].ENABLE = 1
data = chip.reset_sequential(False)
chip.write(data, True)
chip['CONTROL']['EN_POWER_PULSING'] = 1
chip['CONTROL'].write()
# Set the output settings of the chip
chip._outputBlocks["chan_mask"] = 0b11111111
data = chip.write_outputBlock_config()
data = chip.write_pll_config(write=False)
chip.write(data)
chip.write_general_config()
data = chip.read_periphery_template("EFuse_Read")
data += [0x00] * 4
chip["FIFO"].reset()
time.sleep(0.1)
chip.write(data)
time.sleep(0.1)
chip['gpio'].reset()
chip['FIFO'].reset()
time.sleep(0.01)
chip['FIFO'].get_data()
chip['PULSE_GEN'].reset()
chip['PULSE_GEN'].set_delay(40)
chip['PULSE_GEN'].set_width(4056)
chip['PULSE_GEN'].set_repeat(400)
chip['PULSE_GEN'].set_en(True)
chip.configs["Op_mode"] = 0
chip.write_general_config()
chip.reset_dac_attributes(to_default=False)
chip.write_dacs()
chip.set_dac("VTP_fine", 300)
time.sleep(0.01)
data = chip.write_tp_period(2, 0, write=False)
chip['FIFO'].reset()
time.sleep(0.01)
chip.write(data)
time.sleep(0.01)
data = chip.write_tp_pulsenumber(20, write=False)
chip['FIFO'].reset()
time.sleep(0.01)
chip.write(data)
time.sleep(0.01)
mask_step_cmd = []
chip.test_matrix[:, :] = chip.TP_OFF
chip.mask_matrix[:, :] = chip.MASK_OFF
chip.test_matrix[0::64, 0::64] = chip.TP_ON
chip.mask_matrix[0::64, 0::64] = chip.MASK_ON
for i in range(256 // 4):
mask_step_cmd.append(
chip.write_pcr(list(range(4 * i, 4 * i + 4)), write=False))
mask_step_cmd.append(chip.read_pixel_matrix_datadriven())
chip.toggle_pin("TO_SYNC")
for counter in range(1):
chip.write_ctpr(list(range(0, 256, 1)))
chip.write(mask_step_cmd)
chip['FIFO'].get_data()
chip.toggle_pin("SHUTTER", 0.1)
time.sleep(0.1)
ret = chip['FIFO'].get_data()
print("\t Length of FIFO data: ", len(ret))
print("\t FIFO data: ")
for i, r in enumerate(ret):
if (r & 0xf0000000) >> 28 == 0b0101:
if (r & 0x0f000000) >> 24 == 0b0001:
print("FPGA", bin(0x400000 | (r & 0x00ffffff)),
r & 0x00ffffff,
(r & 0x00ffffff) * 25 / 1000000)
else:
link = (r & 0x0e000000) >> 25
if ((r & 0x0f000000) >> 24 == 0b0001
or (r & 0x0f000000) >> 24 == 0b0011
or (r & 0x0f000000) >> 24 == 0b0101
or (r & 0x0f000000) >> 24 == 0b0111
or (r & 0x0f000000) >> 24 == 0b1001
or (r & 0x0f000000) >> 24 == 0b1011
or (r & 0x0f000000) >> 24 == 0b1101
or (r & 0x0f000000) >> 24 == 0b1111):
d1 = bitword_to_byte_list(r)
for j in range(i, len(ret)):
if (ret[j] & 0x0f000000) >> 24 == (
(r & 0x0f000000) >> 24) - 1:
if (ret[j] & 0xf0000000) >> 28 != 0b0101:
d2 = bitword_to_byte_list(ret[j])
break
dataout = BitLogic(48)
dataout[47:40] = d2[3]
dataout[39:32] = d2[2]
dataout[31:24] = d2[1]
dataout[23:16] = d1[3]
dataout[15:8] = d1[2]
dataout[7:0] = d1[1]
if (dataout.tovalue()
& 0xf00000000000) >> 44 == 0xB:
pixel = (dataout.tovalue() >> 28) & 0b111
super_pixel = (dataout.tovalue() >> 31) & 0x3f
right_col = pixel > 3
eoc = (dataout.tovalue() >> 37) & 0x7f
x = (super_pixel * 4) + (pixel - right_col * 4)
y = eoc * 2 + right_col * 1
toa = gray_decrypt((dataout.tovalue() >> 14)
& 0x3fff).tovalue()
print("CHIP", bin(0x400000 | toa), toa,
toa * 25 / 1000000, x, y, link)
else:
print(
"Reply",
hex((dataout.tovalue()
& 0xffff00000000) >> 32), link)
sys.stdout = sys.__stdout__
chip.toggle_pin("RESET")
if led_blink is True:
# let LEDs blink!
for i in range(8):
chip['CONTROL']['LED'] = 0
chip['CONTROL']['LED'][i] = 1
chip['CONTROL'].write()
time.sleep(0.1)
if benchmark is True:
chip['CONTROL']['CNT_FIFO_EN'] = 1
chip['CONTROL'].write()
count = 0
stime = time.time()
for _ in range(500):
count += len(chip['FIFO'].get_data())
etime = time.time()
chip['CONTROL']['CNT_FIFO_EN'] = 0
chip['CONTROL'].write()
ttime = etime - stime
bits = count * 4 * 8
print(ttime, 's ', bits, 'b ', (float(bits) / ttime) / (1024 * 1024),
'Mb/s')
print('Happy day!')
def test_timer():
# Step 1: Initialize chip & hardware
chip = TPX3()
chip.init()
# Step 2: Chip start-up sequence
# Step 2a: Reset the chip
chip['CONTROL']['RESET'] = 1
chip['CONTROL'].write()
chip['CONTROL']['RESET'] = 0
chip['CONTROL'].write()
# Step 2b: Enable power pulsing
chip['CONTROL']['EN_POWER_PULSING'] = 1
chip['CONTROL'].write()
chip['RX'].reset()
chip['RX'].DATA_DELAY = 0
chip['RX'].ENABLE = 1
time.sleep(0.01)
print 'RX ready:', chip['RX'].is_ready
print 'get_decoder_error_counter', chip['RX'].get_decoder_error_counter()
data = chip.write_outputBlock_config(write=False)
chip.write(data)
print 'RX ready:', chip['RX'].is_ready
print(chip.get_configuration())
# Step 2e: reset sequential / resets pixels?!
# before setting PCR need to reset pixel matrix
data = chip.reset_sequential(False)
chip.write(data, True)
fdata = chip['FIFO'].get_data()
print fdata
dout = chip.decode_fpga(fdata, True)
print dout
ddout = chip.decode(dout[0], 0x71)
print ddout
try:
ddout = chip.decode(dout[1], 0x71)
print ddout
except IndexError:
print("no EoR found")
# Step 3: Set PCR
# Step 3a: Produce needed PCR
for x in range(255):
for y in range(256):
chip.set_pixel_pcr(x, y, 0, 7, 1)
for y in range(255):
chip.set_pixel_pcr(255, y, 0, 7, 1)
chip.set_pixel_pcr(255, 255, 1, 7, 0)
# Step 3b: Write PCR to chip
for i in range(256):
data = chip.write_pcr([i], write=False)
chip.write(data, True)
# Step 4: Set general config
print "Set general config"
data = chip.write_general_config(write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
# Step 5: Reset the Timer
print "Set Timer Low"
chip['CONTROL']['TO_SYNC'] = 0
chip['CONTROL'].write()
data = chip.resetTimer(False)
chip.write(data)
chip['CONTROL']['TO_SYNC'] = 1
chip['CONTROL'].write()
data = chip.requestTimerLow(False)
chip.write(data)
fdata = chip['FIFO'].get_data()
dout = chip.decode_fpga(fdata, True)
ddout = chip.decode(dout[0], 0x44)
print ddout[0]
# Step 6: Start the Timer
chip['CONTROL']['TO_SYNC'] = 0
chip['CONTROL'].write()
data = chip.startTimer(False)
chip.write(data)
# Step 7: Set CTPR
print "Write CTPR"
data = chip.write_ctpr(range(255), write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
data = chip.requestTimerLow(False)
chip.write(data)
fdata = chip['FIFO'].get_data()
dout = chip.decode_fpga(fdata, True)
ddout = chip.decode(dout[1], 0x44)
print "Timer Check:", BitLogic.tovalue(ddout[0])
# Step 8: Send "read pixel matrix data driven" command
print "Read pixel matrix data driven"
data = chip.read_pixel_matrix_datadriven(write=False)
chip.write(data, True)
# Get the data, do the FPGA decode and do the decode ot the 0th element
# which should be EoC (header: 0x71)
# Step 9: Enable Shutter
print "Shutter Open"
chip['CONTROL']['SHUTTER'] = 1
chip['CONTROL'].write()
# Step 10: Receive data
dout = chip.decode_fpga(chip['FIFO'].get_data(), True)
# Step11: Request the low 32 bits of the timer multiple times
data = chip.requestTimerLow(False)
for i in range(15):
chip.write(data)
# fdata1=chip['FIFO'].get_data()
fdata2 = chip['FIFO'].get_data()
d1out1 = chip.decode_fpga(fdata2, True)
for i in range(15):
dd1out1 = chip.decode(d1out1[2 * i], 0x44)
print "Timer Check:", BitLogic.tovalue(dd1out1[0])
# Step 11: Disable Shutter
print "Shutter Closed'"
chip['CONTROL']['SHUTTER'] = 0
chip['CONTROL'].write()
# Step 12: Request the low 32 bit and the high 16 bit of the timer
# for the shutter start (Rising) and the shutter end (Falling)
data = chip.requestTimerRisingShutterLow(False)
chip.write(data)
fdata = chip['FIFO'].get_data()
dout = chip.decode_fpga(fdata, True)
ddout = chip.decode(dout[1], 0x46)
print "Timer Check Rising Low:", BitLogic.tovalue(ddout[0])
data = chip.requestTimerRisingShutterHigh(False)
chip.write(data)
fdata = chip['FIFO'].get_data()
dout = chip.decode_fpga(fdata, True)
ddout = chip.decode(dout[0], 0x47)
print "Timer Check Rising High:", BitLogic.tovalue(ddout[0])
data = chip.requestTimerFallingShutterLow(False)
chip.write(data)
ftdata = chip['FIFO'].get_data()
dtout = chip.decode_fpga(ftdata, True)
ddout = chip.decode(dtout[0], 0x48)
print "Timer Check Falling Low:", BitLogic.tovalue(ddout[0])
data = chip.requestTimerFallingShutterHigh(False)
chip.write(data)
ftdata = chip['FIFO'].get_data()
dtout = chip.decode_fpga(ftdata, True)
ddout = chip.decode(dtout[0], 0x49)
print "Timer Check Falling Low:", BitLogic.tovalue(ddout[0])
