def cat_max_mask_check(cat_mask_list, feature, cat_str, max_mask_str):
(res_info, rdt_res_clos_max, clos_max_mask_list) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
if not board_cfg_lib.is_rdt_enabled() or ("L2" not in res_info and "L3" not in res_info):
return
if board_cfg_lib.is_cdp_enabled():
clos_max_set_entry = 2 * board_cfg_lib.get_common_clos_max()
else:
clos_max_set_entry = board_cfg_lib.get_common_clos_max()
cat_max_mask_settings_len = len(cat_mask_list)
if clos_max_set_entry != cat_max_mask_settings_len:
key = 'hv,{},{},{}'.format(feature, cat_str, max_mask_str)
ERR_LIST[key] = "Number of Cache mask entries should be equal to MAX_CACHE_CLOS_NUM_ENTRIES={}".format(clos_max_set_entry)
return
clos_max_mask_str = clos_max_mask_list[0].strip('"').strip("'")
clos_max_mask = common.num2int(clos_max_mask_str)
for val_str in cat_mask_list:
if empty_check(val_str, feature, cat_str, max_mask_str):
return
value = common.num2int(val_str)
if value < 0 or value > clos_max_mask:
key = 'hv,{},{},{}'.format(feature, cat_str, max_mask_str)
ERR_LIST[key] = "{} should be in range[0,{}]".format(max_mask_str, clos_max_mask_str)
return
if not is_contiguous_bit_set(value):
key = 'hv,{},{},{}'.format(feature, cat_str, max_mask_str)
ERR_LIST[key] = "CLOS_MASK {} should be contiguous bit set.".format(max_mask_str, clos_max_mask_str)
return
def vcpu_clos_check(cpus_per_vm, clos_per_vm, prime_item, item):
if not board_cfg_lib.is_rdt_enabled():
return
common_clos_max = board_cfg_lib.get_common_clos_max()
for vm_i, vcpus in cpus_per_vm.items():
clos_per_vm_len = 0
if vm_i in clos_per_vm:
clos_per_vm_len = len(clos_per_vm[vm_i])
if clos_per_vm_len != len(vcpus):
key = "vm:id={},{},{}".format(vm_i, prime_item, item)
ERR_LIST[
key] = "'vcpu_clos' number should be equal 'pcpu_id' number for VM{}".format(
vm_i)
return
if board_cfg_lib.is_cdp_enabled() and common_clos_max != 0:
for clos_val in clos_per_vm[vm_i]:
if not clos_val or clos_val == None:
key = "vm:id={},{},{}".format(vm_i, prime_item, item)
ERR_LIST[key] = "'vcpu_clos' should be not None"
return
if int(clos_val) >= common_clos_max:
key = "vm:id={},{},{}".format(vm_i, prime_item, item)
ERR_LIST[
key] = "CDP_ENABLED=y, the clos value should not be greater than {} for VM{}".format(
common_clos_max - 1, vm_i)
return
def generate_file(config):
# get cpu processor list
cpu_list = board_cfg_lib.get_processor_info()
max_cpu_num = len(cpu_list)
# set macro of max clos number
common_clos_max = board_cfg_lib.get_common_clos_max()
max_mba_clos_entries = common_clos_max
# start to generate board_info.h
print("{0}".format(board_cfg_lib.HEADER_LICENSE), file=config)
print(BOARD_INFO_DEFINE, file=config)
# define CONFIG_MAX_PCPCU_NUM
print("#define MAX_PCPU_NUM\t\t\t{}U".format(max_cpu_num), file=config)
print("#define MAX_PLATFORM_CLOS_NUM\t\t{}U".format(common_clos_max),
file=config)
# define MAX_VMSIX_ON_MSI_PDEVS_NUM
gen_known_caps_pci_head(config)
# define MAX_HIDDEN_PDEVS_NUM
if board_cfg_lib.BOARD_NAME in list(
board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB):
print("#define MAX_HIDDEN_PDEVS_NUM\t\t{}U".format(
len(board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB[
board_cfg_lib.BOARD_NAME])),
file=config)
else:
print("#define MAX_HIDDEN_PDEVS_NUM\t\t0U", file=config)
# generate HI_MMIO_START/HI_MMIO_END
find_hi_mmio_window(config)
print(BOARD_INFO_ENDIF, file=config)
def mba_delay_check(mba_delay_list, feature, mba_str, max_mask_str):
(res_info, rdt_res_clos_max,
clos_max_mask_list) = board_cfg_lib.clos_info_parser(
common.BOARD_INFO_FILE)
if not board_cfg_lib.is_rdt_enabled() or "MBA" not in res_info:
return
clos_max = board_cfg_lib.get_common_clos_max()
mba_delay_settings_len = len(mba_delay_list)
if clos_max != mba_delay_settings_len:
key = 'hv,{},{},{}'.format(feature, mba_str, max_mask_str)
ERR_LIST[
key] = "Number of MBA delay entries should be equal to MAX_MBA_CLOS_NUM_ENTRIES={}".format(
clos_max)
return
mba_idx = res_info.index("MBA")
mba_delay_str = clos_max_mask_list[mba_idx].strip('"').strip("'")
mba_delay = common.num2int(mba_delay_str)
for val_str in mba_delay_list:
if empty_check(val_str, feature, mba_str, max_mask_str):
return
value = common.num2int(val_str)
if value > mba_delay:
key = 'hv,{},{},{}'.format(feature, mba_str, max_mask_str)
ERR_LIST[key] = "{} should be in range[0,{}]".format(
max_mask_str, mba_delay_str)
return
def generate_file(config):
"""
Start to generate board.c
:param config: it is a file pointer of board information for writing to
"""
board_cfg_lib.get_valid_irq(common.BOARD_INFO_FILE)
# get the vuart0/vuart1 which user chosed from scenario.xml of board_private section
(err_dic, ttys_n) = board_cfg_lib.parser_hv_console()
if err_dic:
return err_dic
# parse sos_bootargs/rootfs/console
(err_dic, sos_cmdlines, sos_rootfs, vuart0_dic, vuart1_dic) = parse_boot_info()
if err_dic:
return err_dic
if vuart0_dic:
# parse to get poart/base of vuart0/vuart1
vuart0_port_base = board_cfg_lib.LEGACY_TTYS[list(vuart0_dic.keys())[0]]
vuart0_irq = vuart0_dic[list(vuart0_dic.keys())[0]]
vuart1_port_base = board_cfg_lib.LEGACY_TTYS[list(vuart1_dic.keys())[0]]
vuart1_irq = vuart1_dic[list(vuart1_dic.keys())[0]]
# parse the setting ttys vuatx dic: {vmid:base/irq}
vuart0_setting = Vuart()
vuart1_setting = Vuart()
vuart0_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 0)
vuart1_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 1)
# sos command lines information
sos_cmdlines = [i for i in sos_cmdlines[0].split() if i != '']
# get native rootfs list from board_info.xml
(root_devs, root_dev_num) = board_cfg_lib.get_rootfs(common.BOARD_INFO_FILE)
# start to generate misc_cfg.h
print("{0}".format(board_cfg_lib.HEADER_LICENSE), file=config)
print("{}".format(MISC_CFG_HEADER), file=config)
print("", file=config)
# define rootfs with macro
#for i in range(root_dev_num):
# print('#define ROOTFS_{}\t\t"root={} "'.format(i, root_devs[i]), file=config)
# sos rootfs and console
if "SOS_VM" in common.VM_TYPES.values():
print('#define SOS_ROOTFS\t\t"root={} "'.format(sos_rootfs[0]), file=config)
if ttys_n:
print('#define SOS_CONSOLE\t\t"console={} "'.format(ttys_n), file=config)
else:
print('#define SOS_CONSOLE\t\t" "', file=config)
# sos com base/irq
i_type = 0
for vm_i,vm_type in common.VM_TYPES.items():
if vm_type == "SOS_VM":
i_type = vm_i
break
if "SOS_VM" in common.VM_TYPES.values():
if vuart0_dic:
print("#define SOS_COM1_BASE\t\t{}U".format(vuart0_port_base), file=config)
print("#define SOS_COM1_IRQ\t\t{}U".format(vuart0_irq), file=config)
else:
print("#define SOS_COM1_BASE\t\t0U", file=config)
print("#define SOS_COM1_IRQ\t\t0U", file=config)
if vuart1_setting[i_type]['base'] != "INVALID_COM_BASE":
print("#define SOS_COM2_BASE\t\t{}U".format(vuart1_port_base), file=config)
print("#define SOS_COM2_IRQ\t\t{}U".format(vuart1_irq), file=config)
# sos boot command line
print("", file=config)
if "SOS_VM" in common.VM_TYPES.values():
sos_bootarg_diff(sos_cmdlines, config)
print("", file=config)
if board_cfg_lib.is_rdt_supported():
print("", file=config)
common_clos_max = board_cfg_lib.get_common_clos_max()
max_cache_clos_entries = common_clos_max
if board_cfg_lib.is_cdp_enabled():
max_cache_clos_entries = 2 * common_clos_max
print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(max_cache_clos_entries), file=config)
(rdt_resources, rdt_res_clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CLOS_MASK")
mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "MBA_DELAY")
idx = 0
for mba_delay_mask in mba_delay_list:
print("#define MBA_MASK_{}\t\t\t{}U".format(idx, mba_delay_mask), file=config)
idx += 1
idx = 0
for cat_mask in cat_mask_list:
print("#define CLOS_MASK_{}\t\t\t{}U".format(idx, cat_mask), file=config)
idx += 1
print("", file=config)
vm0_pre_launch = False
common.get_vm_types()
for vm_idx,vm_type in common.VM_TYPES.items():
if vm_idx == 0 and scenario_cfg_lib.VM_DB[vm_type]['load_type'] == "PRE_LAUNCHED_VM":
vm0_pre_launch = True
if vm0_pre_launch and board_cfg_lib.is_tpm_passthru():
print("#define VM0_PASSTHROUGH_TPM", file=config)
print("#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL", file=config)
print("#define VM0_TPM_BUFFER_SIZE 0x5000UL", file=config)
print("", file=config)
print("{}".format(MISC_CFG_END), file=config)
return err_dic
def gen_rdt_res(config):
"""
Get RDT resource (L2, L3, MBA) information
:param config: it is a file pointer of board information for writing to
"""
err_dic = {}
rdt_res_str =""
res_present = [0, 0, 0]
(rdt_resources, rdt_res_clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
common_clos_max = board_cfg_lib.get_common_clos_max()
cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CLOS_MASK")
mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "MBA_DELAY")
# TODO: Since use the MAX_PLATFORM_CLOS_NUM for L2/L3/MBA, so use the minimal number of them
common_clos_max = min(len(cat_mask_list), len(mba_delay_list))
if common_clos_max > MSR_IA32_L2_MASK_END - MSR_IA32_L2_MASK_BASE or\
common_clos_max > MSR_IA32_L3_MASK_END - MSR_IA32_L3_MASK_BASE:
err_dic["board config: generate board.c failed"] = "CLOS MAX should be less than reserved adress region length of L2/L3 cache"
return err_dic
print("\n#ifdef CONFIG_RDT_ENABLED", file=config)
if len(rdt_resources) == 0 or common_clos_max == 0:
print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("l2"), file=config)
print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("l3"), file=config)
print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("mba"), file=config)
else:
for idx, rdt_res in enumerate(rdt_resources):
if rdt_res == "L2":
rdt_res_str = "l2"
print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
"MAX_PLATFORM_CLOS_NUM"), file=config)
populate_clos_mask_msr(rdt_res, cat_mask_list, config)
print("};\n", file=config)
res_present[RDT.L2.value] = 1
elif rdt_res == "L3":
rdt_res_str = "l3"
print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
"MAX_PLATFORM_CLOS_NUM"), file=config)
populate_clos_mask_msr(rdt_res, cat_mask_list, config)
print("};\n", file=config)
res_present[RDT.L3.value] = 1
elif rdt_res == "MBA":
rdt_res_str = "mba"
print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
"MAX_PLATFORM_CLOS_NUM"), file=config)
err_dic = populate_mba_delay_mask(rdt_res, mba_delay_list, config)
print("};\n", file=config)
res_present[RDT.MBA.value] = 1
else:
err_dic['board config: generate board.c failed'] = "The input of {} was corrupted!".format(common.BOARD_INFO_FILE)
return err_dic
if res_present[RDT.L2.value] == 0:
print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l2", "MAX_PLATFORM_CLOS_NUM"), file=config)
if res_present[RDT.L3.value] == 0:
print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l3", "MAX_PLATFORM_CLOS_NUM"), file=config)
if res_present[RDT.MBA.value] == 0:
print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("mba", "MAX_PLATFORM_CLOS_NUM"), file=config)
print("#endif", file=config)
print("", file=config)
return err_dic
def generate_file(config):
"""
Start to generate board.c
:param config: it is a file pointer of board information for writing to
"""
board_cfg_lib.get_valid_irq(common.BOARD_INFO_FILE)
# get the vuart0/vuart1 which user chosed from scenario.xml of board_private section
(err_dic, ttys_n) = board_cfg_lib.parser_hv_console()
if err_dic:
return err_dic
# parse sos_bootargs/rootfs/console
(err_dic, sos_cmdlines, sos_rootfs, vuart0_dic,
vuart1_dic) = parse_boot_info()
if err_dic:
return err_dic
if vuart0_dic:
# parse to get poart/base of vuart0/vuart1
vuart0_port_base = board_cfg_lib.LEGACY_TTYS[list(
vuart0_dic.keys())[0]]
vuart0_irq = vuart0_dic[list(vuart0_dic.keys())[0]]
vuart1_port_base = board_cfg_lib.LEGACY_TTYS[list(vuart1_dic.keys())[0]]
vuart1_irq = vuart1_dic[list(vuart1_dic.keys())[0]]
# parse the setting ttys vuatx dic: {vmid:base/irq}
vuart0_setting = Vuart()
vuart1_setting = Vuart()
vuart0_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 0)
vuart1_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 1)
# sos command lines information
sos_cmdlines = [i for i in sos_cmdlines[0].split() if i != '']
# add maxcpus parameter into sos cmdlines if there are pre-launched VMs
pcpu_list = board_cfg_lib.get_processor_info()
cpu_affinity = common.get_leaf_tag_map(common.SCENARIO_INFO_FILE,
"cpu_affinity", "pcpu_id")
pre_cpu_list = []
sos_cpu_num = 0
for vmid, cpu_list in cpu_affinity.items():
if vmid in common.VM_TYPES and cpu_list != [None]:
vm_type = common.VM_TYPES[vmid]
load_type = ''
if vm_type in scenario_cfg_lib.VM_DB:
load_type = scenario_cfg_lib.VM_DB[vm_type]['load_type']
if load_type == "PRE_LAUNCHED_VM":
pre_cpu_list += cpu_list
elif load_type == "SOS_VM":
sos_cpu_num += len(cpu_list)
if sos_cpu_num == 0:
sos_cpu_num_max = len(list(set(pcpu_list) - set(pre_cpu_list)))
else:
sos_cpu_num_max = sos_cpu_num
if sos_cpu_num_max > 0:
sos_cmdlines.append('maxcpus=' + str(sos_cpu_num_max))
# get native rootfs list from board_info.xml
(root_devs,
root_dev_num) = board_cfg_lib.get_rootfs(common.BOARD_INFO_FILE)
# start to generate misc_cfg.h
print("{0}".format(board_cfg_lib.HEADER_LICENSE), file=config)
print("{}".format(MISC_CFG_HEADER), file=config)
print("", file=config)
# define rootfs with macro
#for i in range(root_dev_num):
# print('#define ROOTFS_{}\t\t"root={} "'.format(i, root_devs[i]), file=config)
# sos rootfs and console
if "SOS_VM" in common.VM_TYPES.values():
print('#define SOS_ROOTFS\t\t"root={} "'.format(sos_rootfs[0]),
file=config)
if ttys_n:
print('#define SOS_CONSOLE\t\t"console={} "'.format(ttys_n),
file=config)
else:
print('#define SOS_CONSOLE\t\t" "', file=config)
# sos com base/irq
i_type = 0
for vm_i, vm_type in common.VM_TYPES.items():
if vm_type == "SOS_VM":
i_type = vm_i
break
if "SOS_VM" in common.VM_TYPES.values():
if vuart0_dic:
print("#define SOS_COM1_BASE\t\t{}U".format(vuart0_port_base),
file=config)
print("#define SOS_COM1_IRQ\t\t{}U".format(vuart0_irq),
file=config)
else:
print("#define SOS_COM1_BASE\t\t0U", file=config)
print("#define SOS_COM1_IRQ\t\t0U", file=config)
if vuart1_setting[i_type]['base'] != "INVALID_COM_BASE":
print("#define SOS_COM2_BASE\t\t{}U".format(vuart1_port_base),
file=config)
print("#define SOS_COM2_IRQ\t\t{}U".format(vuart1_irq),
file=config)
# sos boot command line
print("", file=config)
if "SOS_VM" in common.VM_TYPES.values():
sos_bootarg_diff(sos_cmdlines, config)
print("", file=config)
cpu_affinity_per_vm_gen(config)
common_clos_max = board_cfg_lib.get_common_clos_max()
max_mba_clos_entries = common_clos_max
max_cache_clos_entries = common_clos_max
comments_max_clos = '''
/*
* The maximum CLOS that is allowed by ACRN hypervisor,
* its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0])
* among all supported RDT resources in the platform. In other words, it is
* min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent
* CLOS allocations between all the RDT resources.
*/'''
comments_max_mba_clos = '''
/*
* Max number of Cache Mask entries corresponding to each CLOS.
* This can vary if CDP is enabled vs disabled, as each CLOS entry
* will have corresponding cache mask values for Data and Code when
* CDP is enabled.
*/'''
comments_max_cache_clos = '''
/* Max number of MBA delay entries corresponding to each CLOS. */'''
if board_cfg_lib.is_cdp_enabled():
max_cache_clos_entries_cdp_enable = 2 * common_clos_max
(res_info, rdt_res_clos_max,
clos_max_mask_list) = board_cfg_lib.clos_info_parser(
common.BOARD_INFO_FILE)
common_clos_max_cdp_disable = min(rdt_res_clos_max)
print("#ifdef CONFIG_RDT_ENABLED", file=config)
print("#ifdef CONFIG_CDP_ENABLED", file=config)
print(comments_max_clos, file=config)
print("#define HV_SUPPORTED_MAX_CLOS\t{}U".format(common_clos_max),
file=config)
print(comments_max_cache_clos, file=config)
print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(
max_cache_clos_entries_cdp_enable),
file=config)
print("#else", file=config)
print(comments_max_clos, file=config)
print("#define HV_SUPPORTED_MAX_CLOS\t{}U".format(
common_clos_max_cdp_disable),
file=config)
print(comments_max_cache_clos, file=config)
print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(
max_cache_clos_entries),
file=config)
print("#endif", file=config)
print(comments_max_mba_clos, file=config)
print("#define MAX_MBA_CLOS_NUM_ENTRIES\t{}U".format(
max_mba_clos_entries),
file=config)
else:
print("#ifdef CONFIG_RDT_ENABLED", file=config)
print(comments_max_clos, file=config)
print("#define HV_SUPPORTED_MAX_CLOS\t{}U".format(common_clos_max),
file=config)
print(comments_max_mba_clos, file=config)
print("#define MAX_MBA_CLOS_NUM_ENTRIES\t{}U".format(
max_mba_clos_entries),
file=config)
print(comments_max_cache_clos, file=config)
print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(
max_cache_clos_entries),
file=config)
if not board_cfg_lib.is_rdt_supported():
print("#endif", file=config)
print("", file=config)
if board_cfg_lib.is_rdt_supported():
(rdt_resources, rdt_res_clos_max,
_) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE,
"FEATURES", "RDT", "CLOS_MASK")
mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE,
"FEATURES", "RDT", "MBA_DELAY")
idx = 0
for mba_delay_mask in mba_delay_list:
print("#define MBA_MASK_{}\t\t\t{}U".format(idx, mba_delay_mask),
file=config)
idx += 1
idx = 0
for cat_mask in cat_mask_list:
print("#define CLOS_MASK_{}\t\t\t{}U".format(idx, cat_mask),
file=config)
idx += 1
print("", file=config)
clos_per_vm_gen(config)
print("#endif", file=config)
print("", file=config)
vm0_pre_launch = False
common.get_vm_types()
for vm_idx, vm_type in common.VM_TYPES.items():
if vm_idx == 0 and scenario_cfg_lib.VM_DB[vm_type][
'load_type'] == "PRE_LAUNCHED_VM":
vm0_pre_launch = True
if vm0_pre_launch and board_cfg_lib.is_tpm_passthru():
tpm2_passthru_enabled = common.get_leaf_tag_map_bool(
common.SCENARIO_INFO_FILE, "mmio_resources", "TPM2")
if 0 in tpm2_passthru_enabled and tpm2_passthru_enabled[0]:
print("#define VM0_PASSTHROUGH_TPM", file=config)
print("#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL",
file=config)
gpa = common.hpa2gpa(0, 0xFED40000, 0x5000)
print(
"#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0x{:X}UL".format(gpa),
file=config)
print("#define VM0_TPM_BUFFER_SIZE 0x5000UL", file=config)
print("", file=config)
pci_dev_num_per_vm_gen(config)
boot_args_per_vm_gen(config)
pt_intx_num_vm0_gen(config)
swsram_base_gpa_gen(config)
print("{}".format(MISC_CFG_END), file=config)
return err_dic
def generate_file(config):
"""
Start to generate board.c
:param config: it is a file pointer of board information for writing to
"""
board_cfg_lib.get_valid_irq(common.BOARD_INFO_FILE)
# get cpu processor list
cpu_list = board_cfg_lib.get_processor_info()
max_cpu_num = len(cpu_list)
# get the vuart0/vuart1 which user chosed from scenario.xml of board_private section
(err_dic, ttys_n) = board_cfg_lib.parser_hv_console()
if err_dic:
return err_dic
# parse sos_bootargs/rootfs/console
(err_dic, sos_cmdlines, sos_rootfs, vuart0_dic,
vuart1_dic) = parse_boot_info()
if err_dic:
return err_dic
if vuart0_dic:
# parse to get poart/base of vuart0/vuart1
vuart0_port_base = board_cfg_lib.LEGACY_TTYS[list(
vuart0_dic.keys())[0]]
vuart0_irq = vuart0_dic[list(vuart0_dic.keys())[0]]
vuart1_port_base = board_cfg_lib.LEGACY_TTYS[list(vuart1_dic.keys())[0]]
vuart1_irq = vuart1_dic[list(vuart1_dic.keys())[0]]
# parse the setting ttys vuatx dic: {vmid:base/irq}
vuart0_setting = Vuart()
vuart1_setting = Vuart()
vuart0_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 0)
vuart1_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 1)
# sos command lines information
sos_cmdlines = [i for i in sos_cmdlines[0].split() if i != '']
# get native rootfs list from board_info.xml
(root_devs,
root_dev_num) = board_cfg_lib.get_rootfs(common.BOARD_INFO_FILE)
# start to generate misc_cfg.h
print("{0}".format(board_cfg_lib.HEADER_LICENSE), file=config)
print("{}".format(MISC_CFG_HEADER), file=config)
# define CONFIG_MAX_PCPCU_NUM
print("#define MAX_PCPU_NUM\t{}U".format(max_cpu_num), file=config)
# set macro of max clos number
common_clos_max = board_cfg_lib.get_common_clos_max()
max_cache_clos_entries = common_clos_max
max_mba_clos_entries = common_clos_max
if board_cfg_lib.is_cdp_enabled():
max_cache_clos_entries = 2 * common_clos_max
print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(
max_cache_clos_entries),
file=config)
print("#define MAX_MBA_CLOS_NUM_ENTRIES\t{}U".format(max_mba_clos_entries),
file=config)
print("#define MAX_PLATFORM_CLOS_NUM\t{}U".format(common_clos_max),
file=config)
gen_known_caps_pci_head(config)
# define rootfs with macro
for i in range(root_dev_num):
print('#define ROOTFS_{}\t\t"root={} "'.format(i, root_devs[i]),
file=config)
# sos rootfs and console
print("", file=config)
if "SOS_VM" in common.VM_TYPES.values():
print('#define SOS_ROOTFS\t\t"root={} "'.format(sos_rootfs[0]),
file=config)
if ttys_n:
print('#define SOS_CONSOLE\t\t"console={} "'.format(ttys_n),
file=config)
else:
print('#define SOS_CONSOLE\t\t" "', file=config)
# sos com base/irq
i_type = 0
for vm_i, vm_type in common.VM_TYPES.items():
if vm_type == "SOS_VM":
i_type = vm_i
break
if "SOS_VM" in common.VM_TYPES.values():
if vuart0_dic:
print("#define SOS_COM1_BASE\t\t{}U".format(vuart0_port_base),
file=config)
print("#define SOS_COM1_IRQ\t\t{}U".format(vuart0_irq),
file=config)
else:
print("#define SOS_COM1_BASE\t\t0U", file=config)
print("#define SOS_COM1_IRQ\t\t0U", file=config)
if vuart1_setting[i_type]['base'] != "INVALID_COM_BASE":
print("#define SOS_COM2_BASE\t\t{}U".format(vuart1_port_base),
file=config)
print("#define SOS_COM2_IRQ\t\t{}U".format(vuart1_irq),
file=config)
# sos boot command line
print("", file=config)
if "SOS_VM" in common.VM_TYPES.values():
sos_bootarg_diff(sos_cmdlines, config)
# set macro for HIDDEN PTDEVS
print("", file=config)
if board_cfg_lib.BOARD_NAME in list(
board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB):
print("#define MAX_HIDDEN_PDEVS_NUM {}U".format(
len(board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB[
board_cfg_lib.BOARD_NAME])),
file=config)
else:
print("#define MAX_HIDDEN_PDEVS_NUM 0U", file=config)
# generate HI_MMIO_START/HI_MMIO_END
find_hi_mmio_window(config)
print("", file=config)
print("{}".format(MISC_CFG_END), file=config)
return err_dic
