def gen_px_cx(config):
"""
Get Px/Cx and store them to board.c
:param config: it is a file pointer of board information for writing to
"""
cpu_brand_lines = board_cfg_lib.get_info(
common.BOARD_INFO_FILE, "<CPU_BRAND>", "</CPU_BRAND>")
cx_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<CX_INFO>", "</CX_INFO>")
px_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<PX_INFO>", "</PX_INFO>")
gen_single_data(cx_lines, 'c', config)
gen_single_data(px_lines, 'p', config)
if not cpu_brand_lines:
print("\nconst struct cpu_state_table board_cpu_state_tbl;\n", file=config)
return
for brand_line in cpu_brand_lines:
cpu_brand = brand_line
print("const struct cpu_state_table board_cpu_state_tbl = {", file=config)
print("\t{0},".format(cpu_brand.strip()), file=config)
print("\t{(uint8_t)ARRAY_SIZE(board_cpu_px), board_cpu_px,", file=config)
print("\t(uint8_t)ARRAY_SIZE(board_cpu_cx), board_cpu_cx}", file=config)
print("};", file=config)
def gen_px_cx(config):
"""
Get Px/Cx and store them to board.c
:param config: it is a file pointer of board information for writing to
"""
cpu_brand_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE,
"<CPU_BRAND>", "</CPU_BRAND>")
cx_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE,
"<CX_INFO>", "</CX_INFO>")
px_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE,
"<PX_INFO>", "</PX_INFO>")
cx_len = len(cx_lines)
px_len = len(px_lines)
#print("#ifdef CONFIG_CPU_POWER_STATES_SUPPORT", file=config)
print("static const struct cpu_cx_data board_cpu_cx[%s] = {" % str(cx_len),
file=config)
for cx_l in cx_lines:
print("\t{0}".format(cx_l.strip()), file=config)
print("};\n", file=config)
print("static const struct cpu_px_data board_cpu_px[%s] = {" % str(px_len),
file=config)
for px_l in px_lines:
print("\t{0}".format(px_l.strip()), file=config)
print("};\n", file=config)
for brand_line in cpu_brand_lines:
cpu_brand = brand_line
print("const struct cpu_state_table board_cpu_state_tbl = {", file=config)
print("\t{0},".format(cpu_brand.strip()), file=config)
print("\t{(uint8_t)ARRAY_SIZE(board_cpu_px), board_cpu_px,", file=config)
print("\t(uint8_t)ARRAY_SIZE(board_cpu_cx), board_cpu_cx}", file=config)
print("};", file=config)
def get_valid_ttys_for_vuart(ttys_n):
"""
Get available ttysn list for vuart0/vuart1
:param ttys_n: the serial port was chosen as hv console
"""
vuart0_valid = []
vuart1_valid = ['ttyS0', 'ttyS1', 'ttyS2', 'ttyS3']
ttys_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<TTYS_INFO>", "</TTYS_INFO>")
if ttys_lines:
vuart0_valid.clear()
for tty_line in ttys_lines:
tmp_dic = {}
#seri:/dev/ttySx type:mmio base:0x91526000 irq:4 [bdf:"00:18.0"]
#seri:/dev/ttySy type:portio base:0x2f8 irq:5
tty = tty_line.split('/')[2].split()[0]
ttys_irq = tty_line.split()[3].split(':')[1].strip()
ttys_type = tty_line.split()[1].split(':')[1].strip()
tmp_dic['irq'] = int(ttys_irq)
tmp_dic['type'] = ttys_type
NATIVE_TTYS_DIC[tty] = tmp_dic
vuart0_valid.append(tty)
if tty and tty in vuart1_valid:
vuart1_valid.remove(tty)
if not vuart1_valid:
common.print_yel("ttyS are fully used. ttyS0 is used for hv_console, ttyS1 is used for vuart1!", warn=True)
vuart1_valid = ['ttyS0', 'ttyS1', 'ttyS2', 'ttyS3']
if ttys_n in vuart1_valid:
vuart1_valid.remove(ttys_n)
return (vuart0_valid, vuart1_valid)
def get_serial_type():
""" Get serial console type specified by user """
ttys_type = ''
ttys_value = ''
# Get ttySx information from board config file
ttys_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE,
"<TTYS_INFO>", "</TTYS_INFO>")
scenario_name = board_cfg_lib.get_scenario_name()
if scenario_name == "logical_partition":
ttyn = 'ttyS0'
else:
# Get ttySx from scenario config file which selected by user
(err_dic, ttyn) = board_cfg_lib.parser_vuart_console()
if err_dic:
board_cfg_lib.ERR_LIST.update(err_dic)
# query the serial type from board config file
for line in ttys_lines:
if ttyn in line:
# line format:
# seri:/dev/ttyS0 type:portio base:0x3F8 irq:4
# seri:/dev/ttyS0 type:mmio base:0xB3640000 irq:4 bdf:"0:x.y"
ttys_type = line.split()[1].split(':')[1]
if ttys_type == "portio":
ttys_value = line.split()[2].split(':')[1]
elif ttys_type == "mmio":
ttys_value = line.split()[-1].split(':')[1]
break
return (ttys_type, ttys_value)
def drhd_info_parser(config):
"""
Parse DRHD information
:param config: it is a file pointer to write acpi information
"""
prev_num = 0
drhd_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE,
"<DRHD_INFO>", "</DRHD_INFO>")
# write DRHD
print("/* DRHD of DMAR */", file=config)
for drhd in drhd_lines:
cur_num = drhd.strip().split()[1][4:5]
if drhd.strip().split()[1] == "DRHD_COUNT":
print("", file=config)
print("{}".format(drhd.strip()), file=config)
continue
if cur_num != prev_num:
print("", file=config)
print("{}".format(drhd.strip()), file=config)
prev_num = cur_num
def gen_known_caps_pci_devs(config):
"""Generate information for known capabilities of pci devices"""
vpid_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<PCI_VID_PID>", "</PCI_VID_PID>")
for dev,known_dev in board_cfg_lib.KNOWN_CAPS_PCI_DEVS_DB.items():
if dev not in board_cfg_lib.KNOWN_CAPS_PCI_DEVS:
board_cfg_lib.KNOWN_CAPS_PCI_DEVS[dev] = []
for k_dev in known_dev:
for vpid_line in vpid_lines:
if k_dev in vpid_line:
bdf = vpid_line.split()[0]
board_cfg_lib.KNOWN_CAPS_PCI_DEVS[dev].append(bdf)
break
for dev,bdf_list in board_cfg_lib.KNOWN_CAPS_PCI_DEVS.items():
if dev == "TSN":
print("", file=config)
bdf_list_len = len(bdf_list)
if bdf_list_len == 0:
print("const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM];", file=config)
break
for i in range(bdf_list_len):
b = bdf_list[i].split(":")[0]
d = bdf_list[i].split(":")[1].split(".")[0]
f = bdf_list[i].split(".")[1]
print("#define VMSIX_ON_MSI_DEV{}\t.bdf.bits = {{.b = 0x{}U, .d = 0x{}U, .f =0x{}U}},".format(i, b, d, f), file=config)
for i in range(bdf_list_len):
if i == 0:
print("const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM] = {", file=config)
print("\t{{VMSIX_ON_MSI_DEV{}}},".format(i), file=config)
if i == (bdf_list_len - 1):
print("};", file=config)
def multi_info_parser(config, default_platform, msg_s, msg_e):
"""Parser multi information"""
write_direct = [
'PM1A_EVT_ACCESS_SIZE', 'PM1A_EVT_ADDRESS', 'PM1A_CNT_ADDRESS'
]
pm_ac_sz = OverridAccessSize()
multi_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE, msg_s,
msg_e)
for s_line in multi_lines:
if s_line.split()[1] in write_direct:
if "PM1A_CNT" in s_line.split()[1] and int(
s_line.split()[2].strip('UL'), 16) == 0:
pm_ac_sz.pm1a_cnt_ac_sz = False
print("{}".format(s_line.strip()), file=config)
continue
with open(default_platform, 'r') as default:
while True:
line = default.readline()
if not line:
break
if len(line.split()) < 2:
continue
multi_parser(line, s_line, pm_ac_sz, config)
def write_direct_info_parser(config, msg_s, msg_e):
"""
Direct to write
:param config: it is a file pointer to write acpi information
:param msg_s: it is a pattern of key stings what start to match from board information
:param msg_e: it is a pattern of key stings what end to match from board information
"""
vector_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, msg_s, msg_e)
msg_name = msg_s.split('_')[0].strip('<')
# Set defaults if not present in target xml file
if not vector_lines and msg_name in ("WAKE"):
print("\n#define WAKE_VECTOR_32\t\t0UL", file=config)
print("#define WAKE_VECTOR_64\t\t0UL", file=config)
return
if not vector_lines and msg_name in ("RESET"):
print("\n#define RESET_REGISTER_ADDRESS\t0UL", file=config)
print("#define RESET_REGISTER_VALUE\t0UL", file=config)
print("#define RESET_REGISTER_SPACE_ID\t0UL", file=config)
return
if not vector_lines and msg_name in ("MMCFG"):
print("\n#define DEFAULT_PCI_MMCFG_BASE\t0UL", file=config)
return
for vector in vector_lines:
print("{}".format(vector.strip()), file=config)
print("", file=config)
def get_serial_type():
""" Get serial console type specified by user """
ttys_type = ''
ttys_value = ''
pci_mmio = False
# Get ttySx information from board config file
ttys_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<TTYS_INFO>",
"</TTYS_INFO>")
# Get ttySx from scenario config file which selected by user
(err_dic, ttyn) = board_cfg_lib.parser_hv_console()
if err_dic:
hv_cfg_lib.ERR_LIST.update(err_dic)
# query the serial type from board config file
for line in ttys_lines:
if ttyn in line:
# line format:
# seri:/dev/ttyS0 type:portio base:0x3F8 irq:4
# seri:/dev/ttyS0 type:mmio base:0xB3640000 irq:4 [bdf:"0:x.y"]
ttys_type = line.split()[1].split(':')[1]
if ttys_type == "portio":
ttys_value = line.split()[2].split(':')[1]
elif ttys_type == "mmio":
if 'bdf' in line:
ttys_value = line.split()[-1].split('"')[1:-1][0]
pci_mmio = True
else:
ttys_value = line.split()[2].split(':')[1]
break
return (ttys_type, ttys_value, pci_mmio)
def get_capacities(hv_info, config):
print("CONFIG_IOMMU_BUS_NUM={}".format(hv_info.cap.iommu_bus_num),
file=config)
print("CONFIG_MAX_IOAPIC_NUM={}".format(hv_info.cap.max_ioapic_num),
file=config)
print("CONFIG_MAX_IR_ENTRIES={}".format(hv_info.cap.max_ir_entries),
file=config)
print("CONFIG_MAX_PCI_DEV_NUM={}".format(hv_info.cap.max_pci_dev_num),
file=config)
print("CONFIG_MAX_IOAPIC_LINES={}".format(hv_info.cap.max_ioapic_lines),
file=config)
print("CONFIG_MAX_PT_IRQ_ENTRIES={}".format(
hv_info.cap.max_pt_irq_entries),
file=config)
max_msix_table_num = 0
if not hv_info.cap.max_msix_table_num:
native_max_msix_line = board_cfg_lib.get_info(common.BOARD_INFO_FILE,
"<MAX_MSIX_TABLE_NUM>",
"</MAX_MSIX_TABLE_NUM>")
max_msix_table_num = native_max_msix_line[0].strip()
else:
max_msix_table_num = hv_info.cap.max_msix_table_num
print("CONFIG_MAX_MSIX_TABLE_NUM={}".format(max_msix_table_num),
file=config)
print("CONFIG_MAX_EMULATED_MMIO_REGIONS={}".format(
hv_info.cap.max_emu_mmio_regions),
file=config)
def get_gpu_vpid():
vpid = ''
vpid_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<PCI_VID_PID>", "</PCI_VID_PID>")
for vpid_line in vpid_lines:
if GPU_BDF in vpid_line:
vpid = " ".join(vpid_line.split()[2].split(':'))
return vpid
def write_direct_info_parser(config, msg_s, msg_e):
"""
Direct to write
:param config: it is a file pointer to write acpi information
:param msg_s: it is a pattern of key stings what start to match from board information
:param msg_e: it is a pattern of key stings what end to match from board information
"""
vector_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, msg_s, msg_e)
msg_name = msg_s.split('_')[0].strip('<')
# Set defaults if not present in target xml file
if not vector_lines and msg_name in ("WAKE"):
print("\n#define WAKE_VECTOR_32\t\t0UL", file=config)
print("#define WAKE_VECTOR_64\t\t0UL", file=config)
return
if not vector_lines and msg_name in ("RESET"):
print("\n#define RESET_REGISTER_ADDRESS\t0UL", file=config)
print("#define RESET_REGISTER_VALUE\t0UL", file=config)
print("#define RESET_REGISTER_SPACE_ID\t0UL", file=config)
return
if not vector_lines and msg_name in ("MMCFG"):
print("\n#define DEFAULT_PCI_MMCFG_BASE\t0UL", file=config)
return
if msg_name in ("IOMEM"):
if vector_lines:
for vector in vector_lines:
if "MMCONFIG" in vector:
try:
bus_list = vector.split("bus")[1].strip().split("-")
start_bus_number = int(bus_list[0].strip(), 16)
end_bus_number = int(bus_list[1].strip("]"), 16)
print("/* PCI mmcfg bus number of MCFG */",
file=config)
print("#define DEFAULT_PCI_MMCFG_START_BUS \t 0x{:X}U".
format(start_bus_number),
file=config)
print(
"#define DEFAULT_PCI_MMCFG_END_BUS \t 0x{:X}U\n".
format(end_bus_number),
file=config)
print("", file=config)
return
except:
pass
print("/* PCI mmcfg bus number of MCFG */", file=config)
print("#define DEFAULT_PCI_MMCFG_START_BUS\t0U", file=config)
print("#define DEFAULT_PCI_MMCFG_END_BUS\t0U", file=config)
print("", file=config)
return
for vector in vector_lines:
print("{}".format(vector.strip()), file=config)
print("", file=config)
def parser_pci():
""" Parse PCI lines """
cur_bdf = 0
prev_bdf = 0
tmp_bar_dic = {}
pci_dev_dic = {}
pci_bar_dic = {}
above_4G_mmio = False
bar_addr = bar_num = '0'
pci_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE,
"<PCI_DEVICE>", "</PCI_DEVICE>")
for line in pci_lines:
# get pci bar information into pci_bar_dic
if "Region" in line and "Memory at" in line:
#ignore memory region from SR-IOV capabilities
if "size=" not in line:
continue
bar_num = line.split()[1].strip(':')
bar_addr = get_value_after_str(line, "at")
if int(bar_addr, 16) > 0xffffffff:
above_4G_mmio = True
tmp_bar_dic[int(bar_num)] = hex(int(bar_addr, 16))
else:
prev_bdf = cur_bdf
pci_bdf = line.split()[0]
pci_sub_name = " ".join(line.split(':')[1].split()[1:])
# remove '[*]' in pci subname
if '[' in pci_sub_name:
pci_sub_name = pci_sub_name.rsplit('[', 1)[0]
pci_dev_dic[pci_bdf] = pci_sub_name
cur_bdf = pci_bdf
if not prev_bdf:
prev_bdf = cur_bdf
if tmp_bar_dic and cur_bdf != prev_bdf:
pci_bar_dic[prev_bdf] = tmp_bar_dic
# clear the tmp_bar_dic before store the next dic
tmp_bar_dic = {}
if above_4G_mmio:
board_cfg_lib.print_yel(
"Currently ACRN does not support BAR size above 4G, please double check below possible items in BIOS:\n\
1. GPU Aperture size is less than 1GB;\n\
2. the device MMIO mapping region is below 4GB",
warn=True)
# output all the pci device list to pci_device.h
sub_name_count = collections.Counter(pci_dev_dic.values())
if tmp_bar_dic:
pci_bar_dic[cur_bdf] = tmp_bar_dic
return (pci_dev_dic, pci_bar_dic, sub_name_count)
def write_direct_info_parser(config, msg_s, msg_e):
"""Direct to write"""
vector_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE, msg_s,
msg_e)
for vector in vector_lines:
print("{}".format(vector.strip()), file=config)
print("", file=config)
def get_native_valid_irq():
"""
This is get available irq from board info file
:return: native available irq list
"""
val_irq = []
irq_info_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<AVAILABLE_IRQ_INFO>", "</AVAILABLE_IRQ_INFO>")
for irq_string in irq_info_lines:
val_irq = [int(x.strip()) for x in irq_string.split(',')]
return val_irq
def multi_info_parser(config, default_platform, msg_s, msg_e):
"""
Parse multi information
:param config: it is a file pointer to write acpi information
:param default_platform: it is the default_acpi_info.h in acrn-hypervisor
:param msg_s: it is a pattern of key stings what start to match from board information
:param msg_e: it is a pattern of key stings what end to match from board information
"""
write_direct = [
'PM1A_EVT_ACCESS_SIZE', 'PM1A_EVT_ADDRESS', 'PM1A_CNT_ADDRESS'
]
pm_ac_sz = OverridAccessSize()
multi_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, msg_s, msg_e)
msg_name = msg_s.split('_')[0].strip('<')
# Set defaults for PM1A registers if not present in target xml file
if not multi_lines and msg_name in ("PM1A"):
print("#define PM1A_EVT_ACCESS_SIZE\t0U", file=config)
print("#define PM1A_EVT_ADDRESS\t0UL", file=config)
print("#define PM1A_CNT_ADDRESS\t0UL", file=config)
return
# S3/S5 not supported by BIOS
if not multi_lines and msg_name in ("S3", "S5"):
print("/* {} is not supported by BIOS */".format(msg_name),
file=config)
return
for s_line in multi_lines:
# parse the commend line
if '/*' in s_line:
print("{}".format(s_line), file=config)
continue
if s_line.split()[1] in write_direct:
if "PM1A_CNT" in s_line.split()[1] and int(
s_line.split()[2].strip('UL'), 16) == 0:
pm_ac_sz.pm1a_cnt_ac_sz = False
print("{}".format(s_line.strip()), file=config)
continue
with open(default_platform, 'r') as default:
while True:
line = default.readline()
if not line:
break
if len(line.split()) < 2:
continue
multi_parser(line, s_line, pm_ac_sz, config)
def get_gpu_bdf():
pci_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<PCI_DEVICE>",
"</PCI_DEVICE>")
for line in pci_lines:
if "VGA compatible controller" in line:
global gpu_bdf
gpu_bdf = line.split('\t')[1]
gpu_bdf = gpu_bdf[0:7]
return gpu_bdf
def max_msix_table_num_check(max_msix_table_num, cap_str, max_msi_num_str):
native_max_msix_line = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<MAX_MSIX_TABLE_NUM>", "</MAX_MSIX_TABLE_NUM>")
if not native_max_msix_line and not max_msix_table_num:
empty_check(max_msix_table_num, cap_str, max_msi_num_str)
return
if max_msix_table_num:
hv_range_check(max_msix_table_num, cap_str, max_msi_num_str, RANGE_DB['MSIX_TABLE_NUM'], False)
if native_max_msix_line:
native_max_msix_num = native_max_msix_line[0].strip()
range_check(native_max_msix_num, "In board xml", max_msi_num_str, RANGE_DB['MSIX_TABLE_NUM'])
def gen_dmar_structure(config):
"""Generate dmar structure information"""
dmar_info_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE, "<DRHD_INFO>", "</DRHD_INFO>")
drhd_cnt = 0
drhd_dev_scope_cnt = []
dev_scope_type = []
# parse to get DRHD count and dev scope count
for dmar_line in dmar_info_lines:
if "DRHD_COUNT" in dmar_line and not drhd_cnt:
drhd_cnt = int(dmar_line.split()[2].strip('U'))
for i_cnt in range(drhd_cnt):
for dmar_line in dmar_info_lines:
dev_scope_cnt_str = "DRHD{}_DEV_CNT".format(i_cnt)
if dev_scope_cnt_str in dmar_line:
tmp_dev_scope_cnt = int(dmar_line.split()[2].strip('U'), 16)
drhd_dev_scope_cnt.append(tmp_dev_scope_cnt)
# gen dmar structure information
for i_drhd_cnt in range(drhd_cnt):
dev_cnt = drhd_dev_scope_cnt[i_drhd_cnt]
print("static struct dmar_dev_scope drhd{}_dev_scope[DRHD{}_DEV_CNT] = {{".format(
i_drhd_cnt, i_drhd_cnt), file=config)
for i_dev_cnt in range(dev_cnt):
print("\t{", file=config)
print("\t\t.type = DRHD{}_DEVSCOPE{}_TYPE,".format(i_drhd_cnt, i_dev_cnt), file=config)
print("\t\t.id = DRHD{}_DEVSCOPE{}_ID,".format(i_drhd_cnt, i_dev_cnt), file=config)
print("\t\t.bus = DRHD{}_DEVSCOPE{}_BUS,".format(i_drhd_cnt, i_dev_cnt), file=config)
print("\t\t.devfun = DRHD{}_DEVSCOPE{}_PATH,".format(i_drhd_cnt, i_dev_cnt), file=config)
print("\t},", file=config)
print("};", file=config)
print("", file=config)
print("static struct dmar_drhd drhd_info_array[DRHD_COUNT] = {", file=config)
for i_drhd_cnt in range(drhd_cnt):
print("\t{", file=config)
print("\t\t.dev_cnt = DRHD{}_DEV_CNT,".format(i_drhd_cnt), file=config)
print("\t\t.segment = DRHD{}_SEGMENT,".format(i_drhd_cnt), file=config)
print("\t\t.flags = DRHD{}_FLAGS,".format(i_drhd_cnt), file=config)
print("\t\t.reg_base_addr = DRHD{}_REG_BASE,".format(i_drhd_cnt), file=config)
print("\t\t.ignore = DRHD{}_IGNORE,".format(i_drhd_cnt), file=config)
print("\t\t.devices = drhd{}_dev_scope".format(i_drhd_cnt), file=config)
print("\t},", file=config)
print("};", file=config)
print("", file=config)
print("struct dmar_info plat_dmar_info = {", file=config)
print("\t.drhd_count = DRHD_COUNT,", file=config)
print("\t.drhd_units = drhd_info_array,", file=config)
print("};", file=config)
def write_direct_info_parser(config, msg_s, msg_e):
"""
Direct to write
:param config: it is a file pointer to write acpi information
:param msg_s: it is a pattern of key stings what start to match from board information
:param msg_e: it is a pattern of key stings what end to match from board information
"""
vector_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, msg_s, msg_e)
for vector in vector_lines:
print("{}".format(vector.strip()), file=config)
print("", file=config)
def parser_pci():
"""Parser PCI lines"""
cur_bdf = 0
prev_bdf = 0
tmp_bar_dic = {}
pci_dev_dic = {}
pci_bar_dic = {}
bar_value = bar_num = '0'
pci_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE,
"<PCI_DEVICE>", "</PCI_DEVICE>")
for line in pci_lines:
# get pci bar information into pci_bar_dic
if "Region" in line and "Memory at" in line:
bar_num = line.split()[1].strip(':')
bar_value = line.split()[4]
tmp_bar_dic[int(bar_num)] = hex(int(bar_value, 16))
else:
prev_bdf = cur_bdf
pci_bdf = line.split()[0]
pci_sub_name = " ".join(line.split(':')[1].split()[1:])
# remove '[*]' in pci subname
if '[' in pci_sub_name:
pci_sub_name = pci_sub_name.rsplit('[', 1)[0]
pci_dev_dic[pci_bdf] = pci_sub_name
cur_bdf = pci_bdf
#board_cfg_lib.LOGICAL_PCI_LINE[pci_bdf] = line
# skipt the first init value
if not prev_bdf:
prev_bdf = cur_bdf
if tmp_bar_dic and cur_bdf != prev_bdf:
pci_bar_dic[prev_bdf] = tmp_bar_dic
# clear the tmp_bar_dic before store the next dic
tmp_bar_dic = {}
# output all the pci device list to pci_device.h
sub_name_count = collections.Counter(pci_dev_dic.values())
# share the pci profile with pt_dev
#board_cfg_lib.LOGICAL_PT_PROFILE = sub_name_count
#board_cfg_lib.LOGICAL_PCI_DEV = pci_dev_dic
if tmp_bar_dic:
pci_bar_dic[cur_bdf] = tmp_bar_dic
return (pci_dev_dic, pci_bar_dic, sub_name_count)
def get_ram_range():
""" Get System RAM range mapping """
# read system ram from board_info.xml
ram_range = {}
sys_mem_lines = board_cfg_lib.get_info(
board_cfg_lib.BOARD_INFO_FILE, "<SYSTEM_RAM_INFO>", "</SYSTEM_RAM_INFO>")
for line in sys_mem_lines:
start_addr = int(line.split('-')[0], 16)
end_addr = int(line.split('-')[1].split(':')[0], 16)
mem_range = end_addr - start_addr
ram_range[start_addr] = mem_range
return ram_range
def get_mmio_windows_with_key(keywords):
keyword_mmiolist = []
exclusive_mmiolist = []
iomem_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE,
"<IOMEM_INFO>", "</IOMEM_INFO>")
for line in iomem_lines:
mmio_range = line.split(':')[0]
devmmio_tuple = MmioWindow.from_str(mmio_range)
if is_mmio_window_used(line, keywords):
keyword_mmiolist.append(devmmio_tuple)
else:
exclusive_mmiolist.append(devmmio_tuple)
return sorted(keyword_mmiolist), sorted(exclusive_mmiolist)
def drhd_info_parser(config):
"""
Parse DRHD information
:param config: it is a file pointer to write acpi information
"""
prev_num = 0
drhd_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE,
"<DRHD_INFO>", "</DRHD_INFO>")
# write DRHD
print("/* DRHD of DMAR */", file=config)
for drhd in drhd_lines:
print(drhd.strip(), file=config)
def find_hi_mmio_window(config):
i_cnt = 0
mmio_min = 0
mmio_max = 0
is_hi_mmio = False
iomem_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE,
"<IOMEM_INFO>", "</IOMEM_INFO>")
for line in iomem_lines:
if "PCI Bus" not in line:
continue
line_start_addr = int(line.split('-')[0], 16)
line_end_addr = int(line.split('-')[1].split()[0], 16)
if line_start_addr < common.SIZE_4G and line_end_addr < common.SIZE_4G:
continue
elif line_start_addr < common.SIZE_4G and line_end_addr >= common.SIZE_4G:
i_cnt += 1
is_hi_mmio = True
mmio_min = common.SIZE_4G
mmio_max = line_end_addr
continue
is_hi_mmio = True
if i_cnt == 0:
mmio_min = line_start_addr
mmio_max = line_end_addr
if mmio_max < line_end_addr:
mmio_max = line_end_addr
i_cnt += 1
print("", file=config)
if is_hi_mmio:
print("#define HI_MMIO_START\t\t\t0x%xUL" %
common.round_down(mmio_min, common.SIZE_G),
file=config)
print("#define HI_MMIO_END\t\t\t0x%xUL" %
common.round_up(mmio_max, common.SIZE_G),
file=config)
else:
print("#define HI_MMIO_START\t\t\t~0UL", file=config)
print("#define HI_MMIO_END\t\t\t0UL", file=config)
print("#define HI_MMIO_SIZE\t\t\t{}UL".format(
hex(board_cfg_lib.HI_MMIO_OFFSET)),
file=config)
def clos_info_parser():
"""Parser CLOS information"""
cache_support = False
clos_max = 0
cat_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE,
"<CLOS_INFO>", "</CLOS_INFO>")
for line in cat_lines:
if line.split(':')[0] == "clos supported by cache":
cache_support = line.split(':')[1].strip()
elif line.split(':')[0] == "clos max":
clos_max = int(line.split(':')[1])
return (cache_support, clos_max)
def find_next_bar(bar_val, bar_list):
pci_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<PCI_DEVICE>",
"</PCI_DEVICE>")
idx = bar_list[-1]
for line in pci_lines:
if bar_val.split('x')[1] in line:
if "32-bit" in line:
idx += 1
break
elif "64-bit" in line:
idx += 2
break
if int(idx) > 5:
raise ValueError(
"Not enough bar region, last bar region is {}".format(idx))
return idx
def get_ram_range():
""" Get System RAM range mapping """
# read system ram from board_info.xml
ram_range = {}
io_mem_lines = board_cfg_lib.get_info(
common.BOARD_INFO_FILE, "<IOMEM_INFO>", "</IOMEM_INFO>")
for line in io_mem_lines:
if 'System RAM' not in line:
continue
start_addr = int(line.split('-')[0], 16)
end_addr = int(line.split('-')[1].split(':')[0], 16)
mem_range = end_addr - start_addr
ram_range[start_addr] = mem_range
return ram_range
def get_native_ttys():
native_ttys = {}
ttys_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<TTYS_INFO>", "</TTYS_INFO>")
if ttys_lines:
for tty_line in ttys_lines:
tmp_dic = {}
#seri:/dev/ttySx type:mmio base:0x91526000 irq:4 [bdf:"00:18.0"]
#seri:/dev/ttySy type:portio base:0x2f8 irq:5
tty = tty_line.split('/')[2].split()[0]
ttys_type = tty_line.split()[1].split(':')[1].strip()
ttys_base = tty_line.split()[2].split(':')[1].strip()
ttys_irq = tty_line.split()[3].split(':')[1].strip()
tmp_dic['type'] = ttys_type
tmp_dic['base'] = ttys_base
tmp_dic['irq'] = int(ttys_irq)
native_ttys[tty] = tmp_dic
return native_ttys
def multi_info_parser(config, default_platform, msg_s, msg_e):
"""
Parse multi information
:param config: it is a file pointer to write acpi information
:param default_platform: it is the default_acpi_info.h in acrn-hypervisor
:param msg_s: it is a pattern of key stings what start to match from board information
:param msg_e: it is a pattern of key stings what end to match from board information
"""
write_direct = [
'PM1A_EVT_ACCESS_SIZE', 'PM1A_EVT_ADDRESS', 'PM1A_CNT_ADDRESS'
]
pm_ac_sz = OverridAccessSize()
multi_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE, msg_s,
msg_e)
for s_line in multi_lines:
if s_line.split()[1] in write_direct:
if "PM1A_CNT" in s_line.split()[1] and int(
s_line.split()[2].strip('UL'), 16) == 0:
pm_ac_sz.pm1a_cnt_ac_sz = False
print("{}".format(s_line.strip()), file=config)
continue
with open(default_platform, 'r') as default:
while True:
line = default.readline()
if not line:
break
if len(line.split()) < 2:
continue
multi_parser(line, s_line, pm_ac_sz, config)