示例#1
0
"""
An example usage of the circuit_sim library. We describe an XOR function using
a simple sum-of-products.
"""

from circuit_sim import Circuit

circuit = Circuit()

# Two inputs which go through all possible combinations of 0 and 1.
a = circuit.Stimulus({0: 0,
                      10: 1,
                      20: 0,
                      30: 1})
b = circuit.Stimulus({0: 0,
                      20: 1})

# Define XOR as a sum-of-products
neg_a = circuit.Inv(a.output)
neg_b = circuit.Inv(b.output)

just_a = circuit.And(a.output, neg_b.output)
just_b = circuit.And(neg_a.output, b.output)

a_xor_b = circuit.Or(just_a.output, just_b.output)

output = circuit.Probe(a_xor_b.output)

# Simulate the circuit for 40 time steps
import sys
circuit.simulate(sys.argv[1], 40)
def test_circuit_simulate(monkeypatch):
    
    mock_mc = Mock()
    
    class CtxtMgr(object):
        def __enter__(self):
            pass
        
        def __exit__(self, type, value, traceback):
            pass
    mock_mc.application.side_effect = CtxtMgr
    
    mock_mc.get_system_info.return_value = SystemInfo(1, 1, {
        (0, 0): ChipInfo(num_cores=18,
                         core_states=[AppState.run] + [AppState.idle]*17,
                         working_links=set(Links),
                         largest_free_sdram_block=110*1024*1024,
                         largest_free_sram_block=1024*1024)
    })
    
    mock_filelike = Mock()
    mock_mc.sdram_alloc_as_filelike.return_value = mock_filelike
    
    mock_mc_constructor = Mock(return_value=mock_mc)
    monkeypatch.setattr(circuit_sim, "MachineController", mock_mc_constructor)
    
    # A simple ring oscillator
    c = Circuit()
    osc = c.Inv()
    osc.input = osc.output
    
    c.simulate("test-machine", 64)
    
    # The simulation time tick attribute should be set up.
    assert c.ticks == list(range(64))
    
    # Correct hostname should have been used
    mock_mc_constructor.assert_called_once_with("test-machine")
    
    # Should have used context manager
    mock_mc.application.assert_called_once_with()
    
    # Should have fetched the machine
    mock_mc.get_system_info.assert_called_once_with()
    
    # Should have allocated SDRAM for the one and only device on chip (0, 0),
    # the only one, and on core 1.
    mock_mc.sdram_alloc_as_filelike.assert_called_once_with(
        osc.sdram_required(64), 1, buffer_size=0, clear=False, x=0, y=0)
    
    # Should have loaded only one application
    mock_mc.load_application.assert_called_once_with({
        osc.app_name: {(0, 0): set([1])}})
    
    # Should have written the config accordingly
    mock_filelike.write.assert_called_once_with(
        b"\x40\x00\x00\x00"
        b"\x00\x00\x00\x00"
        b"\x00\x00\x00\x00")
    
    # Should have loaded the routing tables
    assert mock_mc.load_routing_tables.called
    
    # Should have waited first for sync0 then exit
    mock_mc.wait_for_cores_to_reach_state.assert_has_calls([
        call("sync0", 1),
        call("exit", 1),
    ])
    
    # Should have sent a sync0 signal.
    mock_mc.send_signal.assert_called_once_with("sync0")