def __init__(self, dut): self.dut = dut self.BAR0_APERTURE = int(os.getenv("PARAM_BAR0_APERTURE")) self.log = SimLog("cocotb.tb") self.log.setLevel(logging.DEBUG) # PCIe self.rc = RootComplex() self.rc.max_payload_size = 0x1 # 256 bytes self.rc.max_read_request_size = 0x2 # 512 bytes self.dev = UltraScalePcieDevice( # configuration options pcie_generation=3, pcie_link_width=8, user_clk_frequency=250e6, alignment="dword", straddle=False, enable_pf1=False, enable_client_tag=True, enable_extended_tag=True, enable_parity=False, enable_rx_msg_interface=False, enable_sriov=False, enable_extended_configuration=False, enable_pf0_msi=True, enable_pf1_msi=False, # signals # Clock and Reset Interface user_clk=dut.clk_250mhz, user_reset=dut.rst_250mhz, # user_lnk_up # sys_clk # sys_clk_gt # sys_reset # phy_rdy_out # Requester reQuest Interface rq_bus=AxiStreamBus.from_prefix(dut, "m_axis_rq"), pcie_rq_seq_num=dut.s_axis_rq_seq_num, pcie_rq_seq_num_vld=dut.s_axis_rq_seq_num_valid, # pcie_rq_tag # pcie_rq_tag_av # pcie_rq_tag_vld # Requester Completion Interface rc_bus=AxiStreamBus.from_prefix(dut, "s_axis_rc"), # Completer reQuest Interface cq_bus=AxiStreamBus.from_prefix(dut, "s_axis_cq"), # pcie_cq_np_req # pcie_cq_np_req_count # Completer Completion Interface cc_bus=AxiStreamBus.from_prefix(dut, "m_axis_cc"), # Transmit Flow Control Interface # pcie_tfc_nph_av=dut.pcie_tfc_nph_av, # pcie_tfc_npd_av=dut.pcie_tfc_npd_av, # Configuration Management Interface cfg_mgmt_addr=dut.cfg_mgmt_addr, cfg_mgmt_write=dut.cfg_mgmt_write, cfg_mgmt_write_data=dut.cfg_mgmt_write_data, cfg_mgmt_byte_enable=dut.cfg_mgmt_byte_enable, cfg_mgmt_read=dut.cfg_mgmt_read, cfg_mgmt_read_data=dut.cfg_mgmt_read_data, cfg_mgmt_read_write_done=dut.cfg_mgmt_read_write_done, # cfg_mgmt_debug_access # Configuration Status Interface # cfg_phy_link_down # cfg_phy_link_status # cfg_negotiated_width # cfg_current_speed cfg_max_payload=dut.cfg_max_payload, cfg_max_read_req=dut.cfg_max_read_req, # cfg_function_status # cfg_vf_status # cfg_function_power_state # cfg_vf_power_state # cfg_link_power_state # cfg_err_cor_out # cfg_err_nonfatal_out # cfg_err_fatal_out # cfg_local_error_out # cfg_local_error_valid # cfg_rx_pm_state # cfg_tx_pm_state # cfg_ltssm_state # cfg_rcb_status # cfg_obff_enable # cfg_pl_status_change # cfg_tph_requester_enable # cfg_tph_st_mode # cfg_vf_tph_requester_enable # cfg_vf_tph_st_mode # Configuration Received Message Interface # cfg_msg_received # cfg_msg_received_data # cfg_msg_received_type # Configuration Transmit Message Interface # cfg_msg_transmit # cfg_msg_transmit_type # cfg_msg_transmit_data # cfg_msg_transmit_done # Configuration Flow Control Interface cfg_fc_ph=dut.cfg_fc_ph, cfg_fc_pd=dut.cfg_fc_pd, cfg_fc_nph=dut.cfg_fc_nph, cfg_fc_npd=dut.cfg_fc_npd, cfg_fc_cplh=dut.cfg_fc_cplh, cfg_fc_cpld=dut.cfg_fc_cpld, cfg_fc_sel=dut.cfg_fc_sel, # Configuration Control Interface # cfg_hot_reset_in # cfg_hot_reset_out # cfg_config_space_enable # cfg_dsn # cfg_bus_number # cfg_ds_port_number # cfg_ds_bus_number # cfg_ds_device_number # cfg_ds_function_number # cfg_power_state_change_ack # cfg_power_state_change_interrupt cfg_err_cor_in=dut.status_error_cor, cfg_err_uncor_in=dut.status_error_uncor, # cfg_flr_in_process # cfg_flr_done # cfg_vf_flr_in_process # cfg_vf_flr_func_num # cfg_vf_flr_done # cfg_pm_aspm_l1_entry_reject # cfg_pm_aspm_tx_l0s_entry_disable # cfg_req_pm_transition_l23_ready # cfg_link_training_enable # Configuration Interrupt Controller Interface # cfg_interrupt_int # cfg_interrupt_sent # cfg_interrupt_pending cfg_interrupt_msi_enable=dut.cfg_interrupt_msi_enable, cfg_interrupt_msi_vf_enable=dut.cfg_interrupt_msi_vf_enable, cfg_interrupt_msi_mmenable=dut.cfg_interrupt_msi_mmenable, cfg_interrupt_msi_mask_update=dut.cfg_interrupt_msi_mask_update, cfg_interrupt_msi_data=dut.cfg_interrupt_msi_data, cfg_interrupt_msi_select=dut.cfg_interrupt_msi_select, cfg_interrupt_msi_int=dut.cfg_interrupt_msi_int, cfg_interrupt_msi_pending_status=dut.cfg_interrupt_msi_pending_status, cfg_interrupt_msi_pending_status_data_enable=dut.cfg_interrupt_msi_pending_status_data_enable, cfg_interrupt_msi_pending_status_function_num=dut.cfg_interrupt_msi_pending_status_function_num, cfg_interrupt_msi_sent=dut.cfg_interrupt_msi_sent, cfg_interrupt_msi_fail=dut.cfg_interrupt_msi_fail, # cfg_interrupt_msix_enable # cfg_interrupt_msix_mask # cfg_interrupt_msix_vf_enable # cfg_interrupt_msix_vf_mask # cfg_interrupt_msix_address # cfg_interrupt_msix_data # cfg_interrupt_msix_int # cfg_interrupt_msix_vec_pending # cfg_interrupt_msix_vec_pending_status cfg_interrupt_msi_attr=dut.cfg_interrupt_msi_attr, cfg_interrupt_msi_tph_present=dut.cfg_interrupt_msi_tph_present, cfg_interrupt_msi_tph_type=dut.cfg_interrupt_msi_tph_type, # cfg_interrupt_msi_tph_st_tag=dut.cfg_interrupt_msi_tph_st_tag, # cfg_interrupt_msi_function_number=dut.cfg_interrupt_msi_function_number, # Configuration Extend Interface # cfg_ext_read_received # cfg_ext_write_received # cfg_ext_register_number # cfg_ext_function_number # cfg_ext_write_data # cfg_ext_write_byte_enable # cfg_ext_read_data # cfg_ext_read_data_valid ) # self.dev.log.setLevel(logging.DEBUG) self.rc.make_port().connect(self.dev) self.driver = mqnic.Driver(self.rc) self.dev.functions[0].msi_cap.msi_multiple_message_capable = 5 self.dev.functions[0].configure_bar(0, 2**self.BAR0_APERTURE, ext=True, prefetch=True) # Ethernet cocotb.fork(Clock(dut.qsfp_rx_clk_1, 6.4, units="ns").start()) self.qsfp_1_source = XgmiiSource(dut.qsfp_rxd_1, dut.qsfp_rxc_1, dut.qsfp_rx_clk_1, dut.qsfp_rx_rst_1) cocotb.fork(Clock(dut.qsfp_tx_clk_1, 6.4, units="ns").start()) self.qsfp_1_sink = XgmiiSink(dut.qsfp_txd_1, dut.qsfp_txc_1, dut.qsfp_tx_clk_1, dut.qsfp_tx_rst_1) cocotb.fork(Clock(dut.qsfp_rx_clk_2, 6.4, units="ns").start()) self.qsfp_2_source = XgmiiSource(dut.qsfp_rxd_2, dut.qsfp_rxc_2, dut.qsfp_rx_clk_2, dut.qsfp_rx_rst_2) cocotb.fork(Clock(dut.qsfp_tx_clk_2, 6.4, units="ns").start()) self.qsfp_2_sink = XgmiiSink(dut.qsfp_txd_2, dut.qsfp_txc_2, dut.qsfp_tx_clk_2, dut.qsfp_tx_rst_2) cocotb.fork(Clock(dut.qsfp_rx_clk_3, 6.4, units="ns").start()) self.qsfp_3_source = XgmiiSource(dut.qsfp_rxd_3, dut.qsfp_rxc_3, dut.qsfp_rx_clk_3, dut.qsfp_rx_rst_3) cocotb.fork(Clock(dut.qsfp_tx_clk_3, 6.4, units="ns").start()) self.qsfp_3_sink = XgmiiSink(dut.qsfp_txd_3, dut.qsfp_txc_3, dut.qsfp_tx_clk_3, dut.qsfp_tx_rst_3) cocotb.fork(Clock(dut.qsfp_rx_clk_4, 6.4, units="ns").start()) self.qsfp_4_source = XgmiiSource(dut.qsfp_rxd_4, dut.qsfp_rxc_4, dut.qsfp_rx_clk_4, dut.qsfp_rx_rst_4) cocotb.fork(Clock(dut.qsfp_tx_clk_4, 6.4, units="ns").start()) self.qsfp_4_sink = XgmiiSink(dut.qsfp_txd_4, dut.qsfp_txc_4, dut.qsfp_tx_clk_4, dut.qsfp_tx_rst_4) dut.btnu.setimmediatevalue(0) dut.btnl.setimmediatevalue(0) dut.btnd.setimmediatevalue(0) dut.btnr.setimmediatevalue(0) dut.btnc.setimmediatevalue(0) dut.sw.setimmediatevalue(0) dut.qsfp_rx_error_count_1.setimmediatevalue(0) dut.qsfp_rx_error_count_2.setimmediatevalue(0) dut.qsfp_rx_error_count_3.setimmediatevalue(0) dut.qsfp_rx_error_count_4.setimmediatevalue(0) dut.qsfp_modprsl.setimmediatevalue(0) dut.qsfp_intl.setimmediatevalue(0) dut.sw.setimmediatevalue(0) dut.i2c_scl_i.setimmediatevalue(1) dut.i2c_sda_i.setimmediatevalue(1) dut.flash_dq_i.setimmediatevalue(0) self.loopback_enable = False cocotb.fork(self._run_loopback())
def __init__(self, dut): self.dut = dut self.log = SimLog("cocotb.tb") self.log.setLevel(logging.DEBUG) # PCIe self.rc = RootComplex() self.dev = UltraScalePcieDevice( # configuration options pcie_generation=3, pcie_link_width=8, user_clk_frequency=250e6, alignment="dword", straddle=False, enable_pf1=False, enable_client_tag=True, enable_extended_tag=True, enable_parity=False, enable_rx_msg_interface=False, enable_sriov=False, enable_extended_configuration=False, enable_pf0_msi=True, enable_pf1_msi=False, # signals # Clock and Reset Interface user_clk=dut.clk, user_reset=dut.rst, # user_lnk_up # sys_clk # sys_clk_gt # sys_reset # phy_rdy_out # Requester reQuest Interface rq_bus=AxiStreamBus.from_prefix(dut, "m_axis_rq"), # pcie_rq_seq_num=dut.s_axis_rq_seq_num, # pcie_rq_seq_num_vld=dut.s_axis_rq_seq_num_valid, # pcie_rq_tag # pcie_rq_tag_av # pcie_rq_tag_vld # Requester Completion Interface rc_bus=AxiStreamBus.from_prefix(dut, "s_axis_rc"), # Completer reQuest Interface cq_bus=AxiStreamBus.from_prefix(dut, "s_axis_cq"), # pcie_cq_np_req # pcie_cq_np_req_count # Completer Completion Interface cc_bus=AxiStreamBus.from_prefix(dut, "m_axis_cc"), # Transmit Flow Control Interface # pcie_tfc_nph_av=dut.pcie_tfc_nph_av, # pcie_tfc_npd_av=dut.pcie_tfc_npd_av, # Configuration Management Interface cfg_mgmt_addr=dut.cfg_mgmt_addr, cfg_mgmt_write=dut.cfg_mgmt_write, cfg_mgmt_write_data=dut.cfg_mgmt_write_data, cfg_mgmt_byte_enable=dut.cfg_mgmt_byte_enable, cfg_mgmt_read=dut.cfg_mgmt_read, cfg_mgmt_read_data=dut.cfg_mgmt_read_data, cfg_mgmt_read_write_done=dut.cfg_mgmt_read_write_done, # cfg_mgmt_debug_access # Configuration Status Interface # cfg_phy_link_down # cfg_phy_link_status # cfg_negotiated_width # cfg_current_speed cfg_max_payload=dut.cfg_max_payload, cfg_max_read_req=dut.cfg_max_read_req, # cfg_function_status # cfg_vf_status # cfg_function_power_state # cfg_vf_power_state # cfg_link_power_state # cfg_err_cor_out # cfg_err_nonfatal_out # cfg_err_fatal_out # cfg_local_error_out # cfg_local_error_valid # cfg_rx_pm_state # cfg_tx_pm_state # cfg_ltssm_state # cfg_rcb_status # cfg_obff_enable # cfg_pl_status_change # cfg_tph_requester_enable # cfg_tph_st_mode # cfg_vf_tph_requester_enable # cfg_vf_tph_st_mode # Configuration Received Message Interface # cfg_msg_received # cfg_msg_received_data # cfg_msg_received_type # Configuration Transmit Message Interface # cfg_msg_transmit # cfg_msg_transmit_type # cfg_msg_transmit_data # cfg_msg_transmit_done # Configuration Flow Control Interface # cfg_fc_ph=dut.cfg_fc_ph, # cfg_fc_pd=dut.cfg_fc_pd, # cfg_fc_nph=dut.cfg_fc_nph, # cfg_fc_npd=dut.cfg_fc_npd, # cfg_fc_cplh=dut.cfg_fc_cplh, # cfg_fc_cpld=dut.cfg_fc_cpld, # cfg_fc_sel=dut.cfg_fc_sel, # Configuration Control Interface # cfg_hot_reset_in # cfg_hot_reset_out # cfg_config_space_enable # cfg_dsn # cfg_bus_number # cfg_ds_port_number # cfg_ds_bus_number # cfg_ds_device_number # cfg_ds_function_number # cfg_power_state_change_ack # cfg_power_state_change_interrupt cfg_err_cor_in=dut.status_error_cor, cfg_err_uncor_in=dut.status_error_uncor, # cfg_flr_in_process # cfg_flr_done # cfg_vf_flr_in_process # cfg_vf_flr_func_num # cfg_vf_flr_done # cfg_pm_aspm_l1_entry_reject # cfg_pm_aspm_tx_l0s_entry_disable # cfg_req_pm_transition_l23_ready # cfg_link_training_enable # Configuration Interrupt Controller Interface # cfg_interrupt_int # cfg_interrupt_sent # cfg_interrupt_pending cfg_interrupt_msi_enable=dut.cfg_interrupt_msi_enable, cfg_interrupt_msi_vf_enable=dut.cfg_interrupt_msi_vf_enable, cfg_interrupt_msi_mmenable=dut.cfg_interrupt_msi_mmenable, cfg_interrupt_msi_mask_update=dut.cfg_interrupt_msi_mask_update, cfg_interrupt_msi_data=dut.cfg_interrupt_msi_data, cfg_interrupt_msi_select=dut.cfg_interrupt_msi_select, cfg_interrupt_msi_int=dut.cfg_interrupt_msi_int, cfg_interrupt_msi_pending_status=dut.cfg_interrupt_msi_pending_status, cfg_interrupt_msi_pending_status_data_enable=dut.cfg_interrupt_msi_pending_status_data_enable, cfg_interrupt_msi_pending_status_function_num=dut.cfg_interrupt_msi_pending_status_function_num, cfg_interrupt_msi_sent=dut.cfg_interrupt_msi_sent, cfg_interrupt_msi_fail=dut.cfg_interrupt_msi_fail, # cfg_interrupt_msix_enable # cfg_interrupt_msix_mask # cfg_interrupt_msix_vf_enable # cfg_interrupt_msix_vf_mask # cfg_interrupt_msix_address # cfg_interrupt_msix_data # cfg_interrupt_msix_int # cfg_interrupt_msix_vec_pending # cfg_interrupt_msix_vec_pending_status cfg_interrupt_msi_attr=dut.cfg_interrupt_msi_attr, cfg_interrupt_msi_tph_present=dut.cfg_interrupt_msi_tph_present, cfg_interrupt_msi_tph_type=dut.cfg_interrupt_msi_tph_type, # cfg_interrupt_msi_tph_st_tag=dut.cfg_interrupt_msi_tph_st_tag, # cfg_interrupt_msi_function_number=dut.cfg_interrupt_msi_function_number, # Configuration Extend Interface # cfg_ext_read_received # cfg_ext_write_received # cfg_ext_register_number # cfg_ext_function_number # cfg_ext_write_data # cfg_ext_write_byte_enable # cfg_ext_read_data # cfg_ext_read_data_valid ) # self.dev.log.setLevel(logging.DEBUG) self.rc.make_port().connect(self.dev) self.dev.functions[0].msi_multiple_message_capable = 5 self.dev.functions[0].configure_bar(0, 2**22) self.dev.functions[0].configure_bar(2, 2**22) dut.btnu.setimmediatevalue(0) dut.btnl.setimmediatevalue(0) dut.btnd.setimmediatevalue(0) dut.btnr.setimmediatevalue(0) dut.btnc.setimmediatevalue(0) dut.sw.setimmediatevalue(0)
def __init__(self, dut): self.dut = dut self.log = logging.getLogger("cocotb.tb") self.log.setLevel(logging.DEBUG) # PCIe self.rc = RootComplex() self.dev = UltraScalePcieDevice( # configuration options # pcie_generation=3, # pcie_link_width=2, # user_clk_frequency=250e6, alignment="dword", straddle=False, enable_pf1=False, enable_client_tag=True, enable_extended_tag=False, enable_parity=False, enable_rx_msg_interface=False, enable_sriov=False, enable_extended_configuration=False, enable_pf0_msi=True, enable_pf1_msi=False, # signals user_clk=dut.user_clk, user_reset=dut.user_reset, user_lnk_up=dut.user_lnk_up, sys_clk=dut.sys_clk, sys_clk_gt=dut.sys_clk_gt, sys_reset=dut.sys_reset, pcie_perstn1_in=dut.pcie_perstn1_in, pcie_perstn0_out=dut.pcie_perstn0_out, pcie_perstn1_out=dut.pcie_perstn1_out, phy_rdy_out=dut.phy_rdy_out, rq_bus=AxiStreamBus.from_prefix(dut, "s_axis_rq"), pcie_rq_seq_num=dut.pcie_rq_seq_num, pcie_rq_seq_num_vld=dut.pcie_rq_seq_num_vld, pcie_rq_tag=dut.pcie_rq_tag, pcie_rq_tag_av=dut.pcie_rq_tag_av, pcie_rq_tag_vld=dut.pcie_rq_tag_vld, rc_bus=AxiStreamBus.from_prefix(dut, "m_axis_rc"), cq_bus=AxiStreamBus.from_prefix(dut, "m_axis_cq"), pcie_cq_np_req=dut.pcie_cq_np_req, pcie_cq_np_req_count=dut.pcie_cq_np_req_count, cc_bus=AxiStreamBus.from_prefix(dut, "s_axis_cc"), pcie_tfc_nph_av=dut.pcie_tfc_nph_av, pcie_tfc_npd_av=dut.pcie_tfc_npd_av, cfg_phy_link_down=dut.cfg_phy_link_down, cfg_phy_link_status=dut.cfg_phy_link_status, cfg_negotiated_width=dut.cfg_negotiated_width, cfg_current_speed=dut.cfg_current_speed, cfg_max_payload=dut.cfg_max_payload, cfg_max_read_req=dut.cfg_max_read_req, cfg_function_status=dut.cfg_function_status, cfg_function_power_state=dut.cfg_function_power_state, cfg_vf_status=dut.cfg_vf_status, cfg_vf_power_state=dut.cfg_vf_power_state, cfg_link_power_state=dut.cfg_link_power_state, cfg_mgmt_addr=dut.cfg_mgmt_addr, cfg_mgmt_write=dut.cfg_mgmt_write, cfg_mgmt_write_data=dut.cfg_mgmt_write_data, cfg_mgmt_byte_enable=dut.cfg_mgmt_byte_enable, cfg_mgmt_read=dut.cfg_mgmt_read, cfg_mgmt_read_data=dut.cfg_mgmt_read_data, cfg_mgmt_read_write_done=dut.cfg_mgmt_read_write_done, cfg_mgmt_type1_cfg_reg_access=dut.cfg_mgmt_type1_cfg_reg_access, cfg_err_cor_out=dut.cfg_err_cor_out, cfg_err_nonfatal_out=dut.cfg_err_nonfatal_out, cfg_err_fatal_out=dut.cfg_err_fatal_out, cfg_local_error=dut.cfg_local_error, cfg_ltr_enable=dut.cfg_ltr_enable, cfg_ltssm_state=dut.cfg_ltssm_state, cfg_rcb_status=dut.cfg_rcb_status, cfg_dpa_substate_change=dut.cfg_dpa_substate_change, cfg_obff_enable=dut.cfg_obff_enable, cfg_pl_status_change=dut.cfg_pl_status_change, cfg_tph_requester_enable=dut.cfg_tph_requester_enable, cfg_tph_st_mode=dut.cfg_tph_st_mode, cfg_vf_tph_requester_enable=dut.cfg_vf_tph_requester_enable, cfg_vf_tph_st_mode=dut.cfg_vf_tph_st_mode, cfg_msg_received=dut.cfg_msg_received, cfg_msg_received_data=dut.cfg_msg_received_data, cfg_msg_received_type=dut.cfg_msg_received_type, cfg_msg_transmit=dut.cfg_msg_transmit, cfg_msg_transmit_type=dut.cfg_msg_transmit_type, cfg_msg_transmit_data=dut.cfg_msg_transmit_data, cfg_msg_transmit_done=dut.cfg_msg_transmit_done, cfg_fc_ph=dut.cfg_fc_ph, cfg_fc_pd=dut.cfg_fc_pd, cfg_fc_nph=dut.cfg_fc_nph, cfg_fc_npd=dut.cfg_fc_npd, cfg_fc_cplh=dut.cfg_fc_cplh, cfg_fc_cpld=dut.cfg_fc_cpld, cfg_fc_sel=dut.cfg_fc_sel, cfg_per_func_status_control=dut.cfg_per_func_status_control, cfg_per_func_status_data=dut.cfg_per_func_status_data, cfg_per_function_number=dut.cfg_per_function_number, cfg_per_function_output_request=dut. cfg_per_function_output_request, cfg_per_function_update_done=dut.cfg_per_function_update_done, cfg_dsn=dut.cfg_dsn, cfg_power_state_change_ack=dut.cfg_power_state_change_ack, cfg_power_state_change_interrupt=dut. cfg_power_state_change_interrupt, cfg_err_cor_in=dut.cfg_err_cor_in, cfg_err_uncor_in=dut.cfg_err_uncor_in, cfg_flr_in_process=dut.cfg_flr_in_process, cfg_flr_done=dut.cfg_flr_done, cfg_vf_flr_in_process=dut.cfg_vf_flr_in_process, cfg_vf_flr_done=dut.cfg_vf_flr_done, cfg_link_training_enable=dut.cfg_link_training_enable, cfg_interrupt_int=dut.cfg_interrupt_int, cfg_interrupt_pending=dut.cfg_interrupt_pending, cfg_interrupt_sent=dut.cfg_interrupt_sent, cfg_interrupt_msi_enable=dut.cfg_interrupt_msi_enable, cfg_interrupt_msi_vf_enable=dut.cfg_interrupt_msi_vf_enable, cfg_interrupt_msi_mmenable=dut.cfg_interrupt_msi_mmenable, cfg_interrupt_msi_mask_update=dut.cfg_interrupt_msi_mask_update, cfg_interrupt_msi_data=dut.cfg_interrupt_msi_data, cfg_interrupt_msi_select=dut.cfg_interrupt_msi_select, cfg_interrupt_msi_int=dut.cfg_interrupt_msi_int, cfg_interrupt_msi_pending_status=dut. cfg_interrupt_msi_pending_status, cfg_interrupt_msi_pending_status_data_enable=dut. cfg_interrupt_msi_pending_status_data_enable, cfg_interrupt_msi_pending_status_function_num=dut. cfg_interrupt_msi_pending_status_function_num, cfg_interrupt_msi_sent=dut.cfg_interrupt_msi_sent, cfg_interrupt_msi_fail=dut.cfg_interrupt_msi_fail, cfg_interrupt_msi_attr=dut.cfg_interrupt_msi_attr, cfg_interrupt_msi_tph_present=dut.cfg_interrupt_msi_tph_present, cfg_interrupt_msi_tph_type=dut.cfg_interrupt_msi_tph_type, cfg_interrupt_msi_tph_st_tag=dut.cfg_interrupt_msi_tph_st_tag, cfg_interrupt_msi_function_number=dut. cfg_interrupt_msi_function_number, cfg_hot_reset_out=dut.cfg_hot_reset_out, cfg_config_space_enable=dut.cfg_config_space_enable, cfg_req_pm_transition_l23_ready=dut. cfg_req_pm_transition_l23_ready, cfg_hot_reset_in=dut.cfg_hot_reset_in, cfg_ds_port_number=dut.cfg_ds_port_number, cfg_ds_bus_number=dut.cfg_ds_bus_number, cfg_ds_device_number=dut.cfg_ds_device_number, cfg_ds_function_number=dut.cfg_ds_function_number, cfg_subsys_vend_id=dut.cfg_subsys_vend_id) self.dev.log.setLevel(logging.DEBUG) dut.pcie_cq_np_req.setimmediatevalue(1) dut.cfg_mgmt_addr.setimmediatevalue(0) dut.cfg_mgmt_write.setimmediatevalue(0) dut.cfg_mgmt_write_data.setimmediatevalue(0) dut.cfg_mgmt_byte_enable.setimmediatevalue(0) dut.cfg_mgmt_read.setimmediatevalue(0) dut.cfg_mgmt_type1_cfg_reg_access.setimmediatevalue(0) dut.cfg_msg_transmit.setimmediatevalue(0) dut.cfg_msg_transmit_type.setimmediatevalue(0) dut.cfg_msg_transmit_data.setimmediatevalue(0) dut.cfg_fc_sel.setimmediatevalue(0) dut.cfg_per_func_status_control.setimmediatevalue(0) dut.cfg_per_function_number.setimmediatevalue(0) dut.cfg_per_function_output_request.setimmediatevalue(0) dut.cfg_dsn.setimmediatevalue(0) dut.cfg_power_state_change_ack.setimmediatevalue(0) dut.cfg_err_cor_in.setimmediatevalue(0) dut.cfg_err_uncor_in.setimmediatevalue(0) dut.cfg_flr_done.setimmediatevalue(0) dut.cfg_vf_flr_done.setimmediatevalue(0) dut.cfg_link_training_enable.setimmediatevalue(1) dut.cfg_interrupt_int.setimmediatevalue(0) dut.cfg_interrupt_pending.setimmediatevalue(0) dut.cfg_interrupt_msi_select.setimmediatevalue(0) dut.cfg_interrupt_msi_int.setimmediatevalue(0) dut.cfg_interrupt_msi_pending_status.setimmediatevalue(0) dut.cfg_interrupt_msi_pending_status_data_enable.setimmediatevalue(0) dut.cfg_interrupt_msi_pending_status_function_num.setimmediatevalue(0) dut.cfg_interrupt_msi_attr.setimmediatevalue(0) dut.cfg_interrupt_msi_tph_present.setimmediatevalue(0) dut.cfg_interrupt_msi_tph_type.setimmediatevalue(0) dut.cfg_interrupt_msi_tph_st_tag.setimmediatevalue(0) dut.cfg_interrupt_msi_function_number.setimmediatevalue(0) dut.cfg_config_space_enable.setimmediatevalue(1) dut.cfg_req_pm_transition_l23_ready.setimmediatevalue(0) dut.cfg_hot_reset_in.setimmediatevalue(0) dut.cfg_ds_port_number.setimmediatevalue(0) dut.cfg_ds_bus_number.setimmediatevalue(0) dut.cfg_ds_device_number.setimmediatevalue(0) dut.cfg_ds_function_number.setimmediatevalue(0) dut.cfg_subsys_vend_id.setimmediatevalue(0) dut.sys_clk.setimmediatevalue(0) dut.sys_clk_gt.setimmediatevalue(0) dut.sys_reset.setimmediatevalue(1) dut.pcie_perstn1_in.setimmediatevalue(1) self.rc.make_port().connect(self.dev) # user logic self.rq_source = RqSource(AxiStreamBus.from_prefix(dut, "s_axis_rq"), dut.user_clk, dut.user_reset) self.rc_sink = RcSink(AxiStreamBus.from_prefix(dut, "m_axis_rc"), dut.user_clk, dut.user_reset) self.cq_sink = CqSink(AxiStreamBus.from_prefix(dut, "m_axis_cq"), dut.user_clk, dut.user_reset) self.cc_source = CcSource(AxiStreamBus.from_prefix(dut, "s_axis_cc"), dut.user_clk, dut.user_reset) self.regions = [None] * 6 self.regions[0] = mmap.mmap(-1, 1024 * 1024) self.regions[1] = mmap.mmap(-1, 1024 * 1024) self.regions[3] = mmap.mmap(-1, 1024) self.current_tag = 0 self.tag_count = 32 self.tag_active = [False] * 256 self.tag_release = Event() self.dev.functions[0].msi_cap.msi_multiple_message_capable = 5 self.dev.functions[0].configure_bar(0, len(self.regions[0])) self.dev.functions[0].configure_bar(1, len(self.regions[1]), True, True) self.dev.functions[0].configure_bar(3, len(self.regions[3]), False, False, True) cocotb.fork(self._run_cq())