def test1(dut):
cocotb.fork(ClockDomainAsyncReset(dut.clk, dut.reset,1000))
cocotb.fork(simulationSpeedPrinter(dut.clk))
cocotb.fork(SimulationTimeout(1000*20e3))
apb = Apb3(dut, "io_apb", dut.clk)
apb.idle()
spi = SpiSlave(dut, "io_spi")
spiCtrl = SpiSlaveMaster(spi)
yield Timer(5000)
yield RisingEdge(dut.clk)
yield testIt(apb,dut.io_interrupt, spiCtrl, 0, 0)
yield restart(dut)
yield testIt(apb,dut.io_interrupt, spiCtrl, 0, 1)
yield restart(dut)
yield testIt(apb,dut.io_interrupt, spiCtrl, 1, 0)
yield restart(dut)
yield testIt(apb,dut.io_interrupt, spiCtrl, 1, 1)
def test1(dut):
cocotb.fork(ClockDomainAsyncReset(dut.clk, dut.reset, 1000))
cocotb.fork(simulationSpeedPrinter(dut.clk))
cocotb.fork(SimulationTimeout(1000 * 20e3))
apb = Apb3(dut, "io_apb", dut.clk)
apb.idle()
spi = SpiMaster(dut, "io_spi")
slaveQueue = Queue()
yield Timer(5000)
yield RisingEdge(dut.clk)
apbThread = fork(apbAgent(apb, slaveQueue))
spiThread = fork(spiSlaveAgent(spi, slaveQueue, dut.clk))
yield apbThread.join()
def test1(dut):
random.seed(0)
from cocotblib.misc import cocotbXHack
cocotbXHack()
cocotb.fork(ClockDomainAsyncResetCustom(dut.clk, dut.reset))
cocotb.fork(simulationSpeedPrinter(dut.clk))
bmbs = [Bmb(dut, "io_ports_" + str(x)) for x in range(3)]
tester = BmbMemoryTester(bmbs, 16*1024, 2, 32,dut.clk,dut.reset)
@cocotb.coroutine
def delay():
yield RisingEdge(dut.clk)
apb = Apb3(dut, "io_apb", dut.clk)
yield apb.write(0x10, 0x30d)
yield apb.write(0x20, 0x1060103)
yield apb.write(0x24, 0x1)
yield apb.write(0x28, 0x1000004)
yield apb.write(0x10c, 0x0)
yield apb.write(0x108, 0x400)
yield apb.write(0x104, 0x8)
yield apb.write(0x100, 0x0)
yield apb.write(0x10c, 0x0)
yield apb.write(0x108, 0x0)
yield apb.write(0x104, 0x10)
yield apb.write(0x100, 0x0)
yield apb.write(0x10c, 0x0)
yield apb.write(0x108, 0x0)
yield apb.write(0x104, 0x10)
yield apb.write(0x100, 0x0)
yield apb.write(0x10c, 0x0)
yield apb.write(0x108, 0x20)
yield apb.write(0x104, 0x0)
yield apb.write(0x100, 0x0)
delay()
tester.run = True
while True:
yield Timer(0x1000000)
def test1(dut):
random.seed(0)
from cocotblib.misc import cocotbXHack
cocotbXHack()
cocotb.fork(
ClockDomainAsyncResetCustom(3300, dut.clk0, dut.serdesClk0,
dut.serdesClk90, dut.rst0))
cocotb.fork(simulationSpeedPrinter(dut.clk0))
bmbs = [Bmb(dut, "system_io_ports_" + str(x)) for x in range(1)]
tester = BmbMemoryTester(bmbs, 64 * 1024, 8, 32, dut.clk0, dut.rst0, True)
@cocotb.coroutine
def delay():
yield RisingEdge(dut.clk0)
ctrlApb = Apb3(dut, "system_io_ctrlApb", dut.clk0)
phyApb = Apb3(dut, "system_io_phyApb", dut.clk0)
@cocotb.coroutine
def apbWrite(address, data):
yield ctrlApb.write(address, data)
yield apbWrite(0x0, 0x20001)
yield apbWrite(0x4, 0x2)
yield apbWrite(0x10, 0x491)
yield apbWrite(0x20, 0x1170205)
yield apbWrite(0x24, 0x2)
yield apbWrite(0x28, 0x2030102)
yield apbWrite(0x30, 0x5)
yield apbWrite(0x34, 0x103)
yield apbWrite(0x110, 0x0)
yield apbWrite(0x110, 0x1)
yield apbWrite(0x110, 0x3)
yield apbWrite(0x10c, 0x2)
yield apbWrite(0x108, 0x200)
yield apbWrite(0x104, 0x0)
yield apbWrite(0x100, 0x0)
yield apbWrite(0x10c, 0x3)
yield apbWrite(0x108, 0x0)
yield apbWrite(0x104, 0x0)
yield apbWrite(0x100, 0x0)
yield apbWrite(0x10c, 0x1)
yield apbWrite(0x108, 0x44)
yield apbWrite(0x104, 0x0)
yield apbWrite(0x100, 0x0)
yield apbWrite(0x10c, 0x0)
yield apbWrite(0x108, 0x310)
yield apbWrite(0x104, 0x0)
yield apbWrite(0x100, 0x0)
yield apbWrite(0x10c, 0x0)
yield apbWrite(0x108, 0x400)
yield apbWrite(0x104, 0xc)
yield apbWrite(0x100, 0x0)
# yield ctrlApb.write(0x000, 0x00) #phase command = 0
# yield ctrlApb.write(0x110, 0x00) #reset
# yield ctrlApb.delay(10)
# yield ctrlApb.write(0x110, 0x01) #!reset
# yield ctrlApb.delay(10)
# yield ctrlApb.write(0x110, 0x03) #cke
# yield ctrlApb.delay(10)
#
#
# @cocotb.coroutine
# def command(cmd, bank, address):
# yield ctrlApb.write(0x10C, bank)
# yield ctrlApb.write(0x108, address)
# yield ctrlApb.write(0x104, cmd)
# yield ctrlApb.write(0x100, 0)
# yield ctrlApb.delay(10)
#
# CKE = 1 << 0
# CSn = 1 << 1
# RASn = 1 << 2
# CASn = 1 << 3
# WEn = 1 << 4
#
# PRE = CKE | CASn
# REF = CKE | WEn
# MOD = CKE
# ZQCL = CKE | RASn | CASn
#
# CL = 2 # 5
#
#
# yield command(MOD, 2, 0)
# yield command(MOD, 3, 0)
# yield command(MOD, 1, 0)
# yield command(MOD, 0, (1 << 9) | 0x100 | ((CL & 1) << 2) | ((CL & 0xE) << 3)) #DDL reset
# yield command(ZQCL, 0, 0x400)
# yield ctrlApb.delay(1000)
delay()
tester.run = True
while True:
yield Timer(0x1000000)
def test1(dut):
cocotb.fork(ClockDomainAsyncReset(dut.clk, dut.reset,100000))
cocotb.fork(simulationSpeedPrinter(dut.clk))
cocotb.fork(SimulationTimeout(2000 * 2.5e6))
sclInterconnect = OpenDrainInterconnect()
sclInterconnect.addHardDriver(dut.io_i2c_scl_write)
sclInterconnect.addHardReader(dut.io_i2c_scl_read)
sdaInterconnect = OpenDrainInterconnect()
sdaInterconnect.addHardDriver(dut.io_i2c_sda_write)
sdaInterconnect.addHardReader(dut.io_i2c_sda_read)
softMaster = I2cSoftMaster(sclInterconnect.newSoftConnection(), sdaInterconnect.newSoftConnection(), 2500000,dut.clk)
apb = Apb3(dut, "io_apb", dut.clk)
apb.idle()
@coroutine
def txData(valid = False, enable = False, value = 0xFF, repeat = False, disableOnConflict = False):
yield apb.write(0, (valid << 8) | (enable << 9) | (value << 0) | (repeat << 10) | (disableOnConflict << 11))
@coroutine
def txAck(valid=False, enable=False, value=0x1, repeat=False, disableOnConflict=False):
yield apb.write(4, (valid << 8) | (enable << 9) | (value << 0) | (repeat << 10) | (disableOnConflict << 11))
@coroutine
def rxDataConfig(listen = False):
yield apb.write(8, listen << 9)
@coroutine
def rxAckConfig(listen = False):
yield apb.write(12, listen << 9)
@coroutine
def rxDataValue(expected):
yield apb.readAssertMasked(8, 0x100 | expected, 0x1FF)
@coroutine
def rxAckValue(expected):
yield apb.readAssertMasked(12, 0x100 | expected, 0x101)
@coroutine
def rxDataNotValid():
yield apb.readAssertMasked(8, 0, 0x100)
@coroutine
def rxAckNotValid():
yield apb.readAssertMasked(12, 0, 0x100)
@coroutine
def addressFilter(index, enable = False, is10Bits = False, value = 0):
yield apb.write(136+index*4, (enable << 15) | (is10Bits << 14) | (value << 0))
@coroutine
def addressFilterHits(value):
yield apb.readAssertMasked(128, value, 0xFFFFFFFF)
@coroutine
def idle():
yield txData(valid = True, repeat = True)
yield txAck(valid=True, repeat=True)
yield rxDataConfig(listen=False)
yield rxAckConfig(listen=False)
buffer = [0]
yield apb.write(40, 3) #samplingClockDivider
yield apb.write(44, 25*20-1) #timeout
yield apb.write(48, 4) #tsuDat
#Check idle controller
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0xAA, 0xAA)
yield softMaster.sendBitCheck(False, False)
yield softMaster.sendByteCheck(0x55, 0x55)
yield softMaster.sendBitCheck(True, True)
yield softMaster.sendStop()
yield softMaster.wait(5)
# Check simple txData
yield idle()
yield txData(valid = True, enable = True, value = 0x0F)
yield rxDataConfig(listen=True)
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0xAA, 0x0A)
yield softMaster.sendBitCheck(True, True)
yield softMaster.sendStop()
yield rxDataValue(0x0A)
yield rxDataNotValid();
yield softMaster.wait(5)
# Check simple txAck
yield idle()
yield txAck(valid=True, enable=True, value=False)
yield rxAckConfig(listen=True)
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0xFF, 0xFF)
yield softMaster.sendBitCheck(True, False)
yield rxAckValue(False)
yield txAck(valid=True, enable=True, value=True)
yield softMaster.sendByteCheck(0x00, 0x00)
yield softMaster.sendBitCheck(True, True)
yield softMaster.sendStop()
yield rxAckValue(True)
yield softMaster.wait(5)
# Check explicit idle controller
yield idle()
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0xAA, 0xAA)
yield softMaster.sendBitCheck(False, False)
yield softMaster.sendByteCheck(0x55, 0x55)
yield softMaster.sendBitCheck(True, True)
yield softMaster.sendStop()
yield softMaster.wait(5)
# Check tx clock stretching
yield idle()
yield txData(valid=False)
yield txAck(valid=False)
yield softMaster.wait(2)
yield softMaster.sendStart()
txThread = fork(softMaster.sendByteCheck(0xAA, 0x0A))
yield softMaster.wait(10)
yield txData(valid = True, enable = True, value = 0x0F)
yield txThread.join()
txThread = fork(softMaster.sendBitCheck(True, False))
yield softMaster.wait(10)
yield txAck(valid=True, enable=True, value=False)
yield txThread.join()
txThread = fork(softMaster.sendByteCheck(0x55, 0x50))
yield softMaster.wait(10)
yield txData(valid = True, enable = True, value = 0xF0)
yield txThread.join()
txThread = fork(softMaster.sendBitCheck(True, False))
yield softMaster.wait(10)
yield txAck(valid=True, enable=True, value=False)
yield txThread.join()
yield txData(valid = True, enable = True, value = 0x8F)
yield txAck(valid=True, enable=True, value=True)
yield softMaster.sendByteCheck(0xF3, 0x83)
yield softMaster.sendBitCheck(True, True)
yield softMaster.sendStop()
yield softMaster.wait(5)
# Check rxData clock streching
yield idle()
yield rxDataConfig(listen=True)
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0x11, 0x11)
yield softMaster.sendBitCheck(False, False)
txThread = fork(softMaster.sendByteCheck(0x22, 0x22))
yield softMaster.wait(16)
yield rxDataValue(0x11)
yield txThread.join()
yield rxDataValue(0x22)
yield softMaster.sendBitCheck(True, True)
yield softMaster.sendStop()
yield softMaster.wait(5)
# Check rxAck clock streching
yield idle()
yield rxAckConfig(listen=True)
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0x11, 0x11)
yield softMaster.sendBitCheck(False, False)
yield softMaster.sendByteCheck(0x22, 0x22)
txThread = fork(softMaster.sendBitCheck(True, True))
yield softMaster.wait(16)
yield rxAckValue(False)
yield txThread.join()
yield rxAckValue(True)
yield softMaster.sendStop()
yield softMaster.wait(5)
#check txData repeat
yield idle()
yield txData(valid = True, enable = True, value = 0x0F,repeat = True)
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0x33, 0x03)
yield softMaster.sendBitCheck(False, False)
yield softMaster.sendByteCheck(0x44, 0x04)
yield softMaster.sendBitCheck(False, False)
yield softMaster.sendByteCheck(0x55, 0x05)
yield softMaster.sendBitCheck(True, True)
yield softMaster.sendStop()
yield softMaster.wait(5)
# check txAck repeat
yield idle()
yield txAck(valid=True, enable=True, value=0x0, repeat=True)
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0x33, 0x33)
yield softMaster.sendBitCheck(True, False)
yield softMaster.sendByteCheck(0x44, 0x44)
yield softMaster.sendBitCheck(True, False)
yield softMaster.sendByteCheck(0x55, 0x55)
yield softMaster.sendBitCheck(True, False)
yield softMaster.sendStop()
yield softMaster.wait(5)
#Check address filter
yield idle()
yield addressFilter(index = 2, enable = True, is10Bits = False, value = 0x63)
yield addressFilter(index = 1, enable = True, is10Bits = True, value = 0x123)
for i in range(2):
#7bits
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0x63*2, 0x63*2)
t = fork(softMaster.sendBitCheck(True, False))
yield softMaster.wait(5)
yield addressFilterHits(1 << 2)
yield txData(valid=True, enable=True, value=0xF0)
yield txAck(valid=True, enable=True, value=False)
yield t.join()
yield softMaster.sendByteCheck(0x44, 0x40)
yield txAck(valid=True, repeat=True)
yield softMaster.sendBitCheck(True, True)
yield softMaster.sendStop()
yield softMaster.wait(5)
#10bits
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0xF3,0xF3)
yield softMaster.sendBitCheck(True, False)
yield softMaster.sendByteCheck(0x23,0x23)
t = fork(softMaster.sendBitCheck(True, False))
yield softMaster.wait(5)
yield addressFilterHits(1 << 1)
yield txData(valid=True, enable=True, value=0xF0)
yield txAck(valid=True, enable=True, value=False)
yield t.join()
yield softMaster.sendByteCheck(0x44, 0x40)
yield txAck(valid=True, repeat=True)
yield softMaster.sendBitCheck(True, True)
yield softMaster.sendStop()
yield softMaster.wait(5)
#10bits no trigger
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0xF3,0xF3)
yield softMaster.sendBitCheck(True, False)
yield softMaster.sendByteCheck(0x54,0x54)
yield softMaster.sendBitCheck(True, True)
yield addressFilterHits(0 << 1)
yield softMaster.sendStop()
yield softMaster.wait(5)
#7bits no trigger
yield softMaster.wait(2)
yield softMaster.sendStart()
yield softMaster.sendByteCheck(0x13,0x13)
yield softMaster.sendBitCheck(True, True)
yield addressFilterHits(0 << 1)
yield softMaster.sendStop()
yield softMaster.wait(5)
def test1(dut):
dut.log.info("Cocotb test boot")
from cocotblib.misc import cocotbXHack
cocotbXHack()
cocotb.fork(genCLock(dut))
cocotb.fork(simulationSpeedPrinter(dut.clk))
apb = Apb3(dut, "io_apb", dut.clk)
apb.idle()
dut.io_xip_cmd_valid <= False
# bus.nonStopWrite(streamUnbuffered.data, bitOffset=0)
# bus.nonStopWrite(streamUnbuffered.write, bitOffset=8)
# bus.nonStopWrite(streamUnbuffered.read, bitOffset=9)
# bus.nonStopWrite(streamUnbuffered.kind, bitOffset=11)
# bus.read(fifoAvailability, address=baseAddress + 4, 16)
@cocotb.coroutine
def waitNotFull():
while True:
readThread = apb.read(4)
yield readThread
if (int(readThread.retval) >> 16) != 0:
break
@cocotb.coroutine
def waitEmpty():
while True:
readThread = apb.read(4)
yield readThread
if (int(readThread.retval) >> 16) == 32:
break
@cocotb.coroutine
def start():
yield waitNotFull()
yield apb.write(0, 0x880)
@cocotb.coroutine
def stop():
yield waitNotFull()
yield apb.write(0, 0x800)
@cocotb.coroutine
def write(data):
yield waitNotFull()
yield apb.write(0, 0x100 | data)
@cocotb.coroutine
def readPush(length):
for i in range(length):
yield waitNotFull()
yield apb.write(0, 0x200)
@cocotb.coroutine
def read(result):
readSent = 0
for i in range(len(result)):
while True:
if readSent != len(result):
readThread = apb.read(4)
yield readThread
if int(readThread.retval) >> 1 != 0:
yield apb.write(0, 0x200)
readSent += 1
readThread = apb.read(0)
yield readThread
ret = int(readThread.retval)
if ret >> 31 != 0:
result[i] = ret & 0xFF
break
@cocotb.coroutine
def writeEnable():
yield start()
yield write(0x06)
yield stop()
@cocotb.coroutine
def readStatus(result):
yield start()
yield write(0x05)
yield read(result)
yield stop()
@cocotb.coroutine
def whileFlashBusy():
while True:
pull = [0]
yield readStatus(pull)
if (pull[0] & 0x01) == 0:
break
@cocotb.coroutine
def clearStatusRegister():
yield start()
yield write(0x50)
yield stop()
@cocotb.coroutine
def fastRead(addr, tab):
yield start()
yield write(0x0B)
yield write((addr >> 16) & 0xFF)
yield write((addr >> 8) & 0xFF)
yield write((addr >> 0) & 0xFF)
yield write(0xFF)
yield read(tab)
yield stop()
@cocotb.coroutine
def programPage(addr, data):
yield writeEnable()
yield start()
yield write(0x02)
yield write((addr >> 16) & 0xFF)
yield write((addr >> 8) & 0xFF)
yield write((addr >> 0) & 0xFF)
for b in data:
yield write(b)
yield stop()
yield whileFlashBusy()
yield clearStatusRegister()
@cocotb.coroutine
def writeRegister(id, data):
yield start()
yield write(id)
yield write(data)
yield stop()
@cocotb.coroutine
def sectorErase(addr):
yield writeEnable()
yield start()
yield write(0xD8)
yield write((addr >> 16) & 0xFF)
yield write((addr >> 8) & 0xFF)
yield write((addr >> 0) & 0xFF)
yield stop()
yield whileFlashBusy()
@cocotb.coroutine
def readVolatileConfig(tab):
yield start()
yield write(0x85)
yield read(tab)
yield stop()
@cocotb.coroutine
def writeVolatileConfig(tab):
yield writeEnable()
yield start()
yield write(0x81)
yield write(tab)
yield stop()
dut.vcc <= 0
for i in range(300):
yield Timer(10000)
dut.vcc <= i * 10
# bus.drive(config.kind, baseAddress + 8, bitOffset=0)
# bus.drive(config.mod, baseAddress + 8, bitOffset=4)
yield apb.write(8, 0)
yield apb.write(8, 0)
# bus.drive(config.sclkToogle, baseAddress + 0x20)
# bus.drive(config.fullRate, baseAddress + 0x20, bitOffset=31)
yield apb.write(0x20, 2)
# bus.drive(config.ss.setup, baseAddress + 0x24)
yield apb.write(0x24, 14)
# bus.drive(config.ss.hold, baseAddress + 0x28)
yield apb.write(0x28, 18)
# bus.drive(config.ss.disable, baseAddress + 0x2C)
yield apb.write(0x2C, 22)
# while True:
yield start()
yield write(0x9F)
tab = [0] * 3
yield read(tab)
print(tab)
yield stop()
# XIP = 0 dummy = 8
yield start()
yield write(0x81)
yield write(0x83)
yield stop()
# Write lock register
# yield writeRegister(0xE5, )
yield programPage(0x1100, list(range(256)))
yield programPage(0x1200, list(range(0x10, 0x20)))
tab = [0] * 5
yield fastRead(0x1105, tab)
print(tab)
assert (tab == [5, 6, 7, 8, 9])
tab = [0] * 5
yield fastRead(0x1205, tab)
print(tab)
assert (tab == [0x15, 0x16, 0x17, 0x18, 0x19])
tab = [0] * 10
yield fastRead(0x11FA, tab)
print(tab)
assert (tab == [
0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF, 0x10, 0x11, 0x12, 0x13
])
# bus.drive(enable, baseAddress + 0x40)
# bus.drive(instructionData, baseAddress + 0x44, bitOffset=0)
# bus.drive(instructionEnable, baseAddress + 0x44, bitOffset=8)
# bus.drive(dummyData, baseAddress + 0x44, bitOffset=16)
# bus.drive(dummyCount, baseAddress + 0x44, bitOffset=24)
yield waitEmpty()
yield apb.write(0x44, 0x00FF010B)
yield apb.write(0x40, 0x1)
@cocotb.coroutine
def xipCmd(addr):
dut.io_xip_cmd_valid <= True
dut.io_xip_cmd_payload <= addr
yield waitClockedCond(dut.clk, lambda: dut.io_xip_cmd_ready == True)
dut.io_xip_cmd_valid <= False
xipRspRef = Queue()
@cocotb.coroutine
def xipRspScoreboard():
while True:
yield waitClockedCond(dut.clk,
lambda: dut.io_xip_rsp_valid == True)
assert (not xipRspRef.empty())
assert (xipRspRef.get_nowait() == int(dut.io_xip_rsp_payload))
cocotb.fork(xipRspScoreboard())
@cocotb.coroutine
def xip(addr, value):
xipRspRef.put(value)
yield xipCmd(addr)
yield xip(0x1100, 0x03020100)
yield xip(0x1104, 0x07060504)
yield xip(0x1108, 0x0B0A0908)
yield xip(0x1100, 0x03020100)
yield xip(0x1104, 0x07060504)
yield xip(0x1108, 0x0B0A0908)
yield xip(0x1100, 0x03020100)
yield xip(0x1104, 0x07060504)
yield xip(0x1108, 0x0B0A0908)
yield waitClockedCond(dut.clk, lambda: xipRspRef.empty())
yield apb.write(0x40, 0x0)
yield stop()
yield sectorErase(0x1205)
tab = [0] * 10
yield fastRead(0x11FA, tab)
print(tab)
assert (tab == [0xFF] * 10)
yield waitEmpty()
tab = [0, 0]
yield readVolatileConfig(tab)
print(tab)
yield Timer(1000000)
dut.log.info("Cocotb test done")