class Rsqrt8(Operator):
full_name = 'square root with relative error at most $2^{-8}$'
signature = 'v rsqrt8 v'
types = common.ftypes
domain = Domain('[0,Inf)')
categories = [DocBasicArithmetic]
tests_ulps = {'f16':'8', 'f32':'8', 'f64':'8'}
class Rec8(Operator):
full_name = 'reciprocal with relative error at most 2^{-8}'
signature = 'v rec8 v'
types = common.ftypes
categories = [DocBasicArithmetic]
domain = Domain('R\{0}')
tests_ulps = common.ulps_from_relative_distance_power(8)
class Rsqrt8(Operator):
full_name = 'square root with relative error at most $2^{-8}$'
signature = 'v rsqrt8 v'
types = common.ftypes
domain = Domain('[0,Inf)')
categories = [DocBasicArithmetic]
tests_ulps = common.ulps_from_relative_distance_power(8)
class Trunc(Operator):
full_name = 'rounding towards zero to integer value'
signature = 'v trunc v'
domain = Domain('R')
categories = [DocRounding]
bench_auto_against_sleef = True
bench_auto_against_std = True
class Any(Operator):
full_name = 'check for one true elements'
signature = 'p any l'
domain = Domain('B')
categories = [DocMisc]
desc = 'Return true if and only if at least one element of the inputs ' + \
'is true.'
class Ceil(Operator):
full_name = 'rounding up to integer value'
signature = 'v ceil v'
domain = Domain('R')
categories = [DocRounding]
bench_auto_against_sleef = True
bench_auto_against_std = True
class Floor(Operator):
full_name = 'rounding down to integer value'
signature = 'v floor v'
domain = Domain('R')
categories = [DocRounding]
bench_auto_against_sleef = True
bench_auto_against_std = True
class Rsqrt11(Operator):
full_name = 'square root'
signature = 'v rsqrt11 v'
types = common.ftypes
domain = Domain('[0,Inf)')
categories = [DocBasicArithmetic]
tests_ulps = True
class Shra(Operator):
full_name = 'arithmetic right shift'
signature = 'v shra v p'
types = common.iutypes
domain = Domain('R+xN')
categories = [DocBitsOperators]
desc = 'Performs a right shift operation with sign extension.'
class Cvt(Operator):
signature = 'v cvt v'
output_to = common.OUTPUT_TO_SAME_SIZE_TYPES
domain = Domain('R')
categories = [DocConversion]
## Disable bench
do_bench = False
class Rec11(Operator):
full_name = 'reciprocal with relative error at most 2^{-11}'
signature = 'v rec11 v'
types = common.ftypes
categories = [DocBasicArithmetic]
domain = Domain('R\{0}')
tests_ulps = True
class Reinterpretl(Operator):
signature = 'l reinterpretl l'
domain = Domain('B')
categories = [DocConversion]
output_to = common.OUTPUT_TO_SAME_SIZE_TYPES
## Disable bench
do_bench = False
class Unziphi(Operator):
full_name = 'unziphi'
signature = 'v unziphi v v'
types = common.types
domain = Domain('R')
categories = [DocMisc]
do_bench = False
class Ziplo(Operator):
full_name = 'ziplo'
signature = 'v ziplo v v'
types = common.types
domain = Domain('R')
categories = [DocMisc]
do_bench = False
class Store2u(Operator):
signature = '_ store2u * v v'
load_store = True
domain = Domain('RxR')
categories = [DocLoadStore]
desc = 'Store 2 SIMD vectors as array of structures of 2 members into ' + \
'unaligned memory.'
class Unzip(Operator):
full_name = 'unzip'
signature = 'vx2 unzip v v'
types = common.types
fomain = Domain('R')
categories = [DocShuffle]
do_bench = False
class Neg(Operator):
full_name = 'opposite'
signature = 'v neg v'
cxx_operator = '-'
domain = Domain('R')
categories = [DocBasicArithmetic]
bench_auto_against_std = True
class Andl(Operator):
full_name = 'logical and'
signature = 'l andl l l'
cxx_operator = '&&'
domain = Domain('BxB')
categories = [DocLogicalOperators]
bench_auto_against_std = True
class Rec8(Operator):
full_name = 'reciprocal with relative error at most 2^{-8}'
signature = 'v rec8 v'
types = common.ftypes
categories = [DocBasicArithmetic]
domain = Domain('R\{0}')
tests_ulps = {'f16':'8', 'f32':'8', 'f64':'8'}
class Notl(Operator):
full_name = 'logical not'
signature = 'l notl l'
cxx_operator = '!'
domain = Domain('B')
categories = [DocLogicalOperators]
bench_auto_against_std = True
class Orl(Operator):
full_name = 'logical or'
signature = 'l orl l l'
cxx_operator = '||'
domain = Domain('BxB')
categories = [DocLogicalOperators]
bench_auto_against_std = True
class Div(Operator):
full_name = 'division'
signature = 'v div v v'
cxx_operator = '/'
domain = Domain('RxR\{0}')
categories = [DocBasicArithmetic]
bench_auto_against_std = True
bench_auto_against_mipp = True
class Mul(Operator):
full_name = 'multiplication'
signature = 'v mul v v'
cxx_operator = '*'
domain = Domain('RxR')
categories = [DocBasicArithmetic]
bench_auto_against_std = True
bench_auto_against_mipp = True
class Addv(Operator):
full_name = 'horizontal sum'
signature = 's addv v'
domain = Domain('R')
categories = [DocMisc]
desc = 'Returns the sum of all the elements contained in v'
do_bench = False
types = common.ftypes
class Sub(Operator):
full_name = 'subtraction'
signature = 'v sub v v'
cxx_operator = '-'
domain = Domain('RxR')
categories = [DocBasicArithmetic]
bench_auto_against_std = True
bench_auto_against_mipp = True
class Add(Operator):
full_name = 'addition'
signature = 'v add v v'
cxx_operator = '+'
domain = Domain('RxR')
categories = [DocBasicArithmetic]
bench_auto_against_std = True
bench_auto_against_mipp = True
class Xorb(Operator):
full_name = 'bitwise xor'
signature = 'v xorb v v'
cxx_operator = '^'
domain = Domain('RxR')
categories = [DocBitsOperators]
#bench_auto_against_std = True ## TODO: Add check to floating-types
bench_auto_against_mipp = True
class Notb(Operator):
full_name = 'bitwise not'
signature = 'v notb v'
cxx_operator = '~'
domain = Domain('R')
categories = [DocBitsOperators]
#bench_auto_against_std = True ## TODO: Add check to floating-types
bench_auto_against_mipp = True
class Storela(Operator):
full_name = 'store vector of logicals'
signature = '_ storela * l'
load_store = True
categories = [DocLoadStore]
domain = Domain('R')
desc = 'Store SIMD vector of booleans into aligned memory. True is ' + \
'stored as 1 and False as 0.'
class Store4a(Operator):
full_name = 'store into array of structures'
signature = '_ store4a * v v v v'
load_store = True
domain = Domain('RxRxRxR')
categories = [DocLoadStore]
desc = 'Store 4 SIMD vectors as array of structures of 4 members into ' + \
'aligned memory.'
