示例#1
0
 def routel(layer, sigs):
     zsig = [bus.s(nm) for nm in sigs]
     for i, t in enumerate(zsig):
         t.setlayer(layer)
     cu.extend2(zsig)
     zsig0 = brd.enriver90(zsig, -90)
     return zsig0.wire()
示例#2
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文件: dip.py 项目: sturem/cuflow
 def escape(self):
     ii = cu.inches(.1) / 2
     q = math.sqrt((ii ** 2) + (ii ** 2))
     for p in self.pads[:4]:
         p.w("l 45").forward(q).left(45).forward(1)
     for p in self.pads[4:]:
         p.w("r 90 f 1")
     oo = list(sum(zip(self.pads[4:], self.pads[:4]), ()))
     cu.extend2(oo)
     return oo
示例#3
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文件: adapter.py 项目: sturem/cuflow
 def escape(self):
     ii = 1.27 / 2
     q = math.sqrt((ii**2) + (ii**2))
     for p in self.pads[4:]:
         p.w("i r 45").forward(q).left(45).forward(1)
     for p in self.pads[:4]:
         p.w("o f .2")
     oo = list(sum(zip(self.pads[4:], self.pads[:4]), ()))
     cu.extend2(oo)
     [p.wire() for p in oo]
     return oo
示例#4
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    def escape(self):
        self.setnames()
        pp = self.pads
        for i in (3, 13):
            pp[i].copy().w("i f 1").wire()
        pp[13].w("r 90 f 0.5 -")
        pp[8].goto(pp[9]).wire()
        pp[9].w("o f 0.5").wire()

        self.s("RTS").w("l 90")
        self.s("TXD").w("f 1 l 90")

        sigs = [self.s(nm) for nm in ("TXD", "RTS", "RXD", "CTS")]
        cu.extend2(sigs)
        r0 = self.board.enriver90(sigs, 90).wire()

        sigs = [self.s(nm) for nm in ("USBDP", "USBDM")]
        [t.w("o f 0.3") for t in sigs]
        r1 = self.board.enriver90(sigs, -90).wire()

        return (r0, r1)
示例#5
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    def escape1(self):
        self.setnames()

        banks = ([], [], [], [])
        for i, p in enumerate(self.pads[1:]):
            b = i // 5
            if p.name == "xVCC":
                p.forward(0.5).wire()
            elif p.name != "GND":
                p.forward(0.5).wire()
                banks[b].append(p)
        [cu.extend2(b) for b in banks]
        [t.wire() for t in self.pads]
        r0 = brd.enriver90(banks[0], -90).right(90).wire()
        r1 = brd.enriver90(banks[1], 90).wire()
        r0.join(r1).wire()

        return (r0, )
示例#6
0
    for p, nm in zip(ftdi.pads, ftdi_names):
        p.setname(nm)
        p.copy().w("l 90 f 2").text(nm)
    gnd(ftdi.s("GND"))
    i = ftdi.s("IN").w(
        "l 90 f 4 r 90 f 8 l 90 f 4 r 45 f 5 r 45 f 4 l 90 f 1 l 90")
    ftdi_in = brd.river1(i).wire()

    # ------------------------------ PS/2
    # MD-60S from CUI, Future Electronics $1.10
    # 1: DATA  5: CLOCK
    ps2 = MD_60Sb(brd.DC((6.2, 10)).right(90))
    dc = [ps2.s("6"), ps2.s("1")]
    ps2.s("5").w("f 0 r 180 f 1 -")
    ps2.s("3").newpath().setlayer('GBL').w("r 45 f 3").wire()
    cu.extend2(dc)
    ps2b = brd.enriver90([t.w("f 4") for t in dc], -90).wire()

    print(ftdi_in.tt)
    zbus = zd.join(za, 0.5).join(ps2b).join(ftdi_in).wire()

    daz = Dazzler(brd.DC((73, 26)).right(0), "nosw")

    if 0:
        (lvl_a, lvl_d, lvl_b) = cu.M74LVC245(brd.DC(
            (60, 37)).right(45)).escape2()
        lvl_a.w("l 45 f 3").wire()
        lvl_d.setname("VCC").w("o f 0.5").wire()
        lvl_b.w("l 45 r 90 f 5 r 90")
        lvl_b.through()
        lvl_b.through()
示例#7
0
def gen(target):
    brd = cu.Board(
        (90, 63),
        trace = cu.mil(6),
        space = cu.mil(6) * 2.0,
        via_hole = 0.3,
        via = 0.6,
        via_space = cu.mil(5),
        silk = cu.mil(6))
    brd.outline()
    brd.layers['GML'].union(sg.box(-9.8, 0, 0, 16))

    daz = Dazzler(brd.DC((28, 38)).left(90))
    if target == "pico":
        pico = Pico(brd.DC((70, 28)))
    elif target == "teensy":
        teensy = Teensy40(brd.DC((70, 28)))
        breakout(teensy)
    elif target == "feather":
        feather = Feather(brd.DC((70, 28)))
        breakout(feather)
    sd = SD(brd.DC((3, 12)).right(180))

    # ------------------------------ SD
    for nm in ("G1", "G2", "G3", "G4", "6"):
        sd.s(nm).w("r 90 f 1 -")
    sd.s("4").setname("VCC").w("r 90 f 2").wire()

    tt = [sd.s(c) for c in "1235789"]
    [t.left(90).forward(1) for t in tt]
    r0 = brd.enriver90(tt, 90).left(135).wire()

    tt = [daz.s(str(15 + i)) for i in range(7)]
    [t.w("o f .1") for t in tt]
    r1 = brd.enriver90(tt, 90).left(45).meet(r0)

    # ------------------------------ Wii
    def wii(i):
        y = 32.5 + 6 - i * 12
        return cu.WiiPlug(brd.DC((-5, y)).right(270)).escape()
    wii1 = wii(-1)
    wii2 = wii(1)
    wii1.w("r 90 f 2").wire()
    wii2.w("f 10 r 45 f 4 r 45").wire()
    wii = wii2.join(wii1, 0.5).wire()

    tt = [daz.s(str(i)) for i in (13, 12, 11, 10, 9, 8)]
    [t.w("i f 4") for t in tt]
    daz_i2cbus = brd.enriver90(tt, -90).wire()

    wii.w("f 9 r 90 f 3 /").meet(daz_i2cbus)

    # ------------------------------ Dazzler power
    daz.s("VCC").thermal(1).wire()
    for nm in ("GND", "GND1", "GND2"):
        daz.s(nm).inside().forward(2).wire(width = 0.5).w("-")

    daz_used = ("1", "2", "22", "23", "25", "26", "27", "28", "29", "PGM")
    tt = [daz.s(nm) for nm in daz_used]
    [p.w("i f 4").wire() for p in tt]
    daz.s("1").left(90)
    daz.s("2").forward(1).left(90)
    daz.s("PGM").right(90)
    cu.extend2(tt)
    b1 = brd.enriver90(tt[::-1], 90)

    if target == "pico":
        b1.w("l 90 f 2 r 45").wire()
        pico_used = (
            "GP0",
            "GP2", "GP3", "GP4", "GP5",
            "GP6", "GP7", "GP8", "GP9", "GP10"
        )
        tt = [pico.s(str(i)) for i in pico_used]
        [p.setlayer("GBL").w("r 180 f 2").wire() for p in tt]
        b0 = brd.enriver90(tt[::-1], -90).wire()

        b0.shuffle(b1, {         # Pico         Dazzler    
            "GP8": "1"  ,    # UART1 TX     CONSOLE IN 
            "GP9": "2"  ,    # UART1 RX     CONOLE OUT 
            "GP4": "22" ,    # SPI0 RX      MISO       
            "GP5": "25" ,    # GP5          GPU SEL    
            "GP6": "26" ,    # GP6          SD SEL     
            "GP7": "27" ,    # GP7          DAZZLER SEL
            "GP3": "28" ,    # SPI0 TX      MOSI       
            "GP2": "29" ,    # SPI0 SCK     SCK        
            "GP10":"PGM",    # GP10         PGM        
            "GP0": "23" ,    # UART0 TX     UART       
        }).w("f 9 l 45").meet(b1)
        daz.s("5V").setwidth(0.5).w("o f 1 l 90 f 7 r 90 f 14 r 90 f 2.5").goto(pico.s("VBUS")).wire()
    elif target == "teensy":
        b1.w("l 45 f 2 r 45").wire()
        teensy_used = (
            "1", "8", "9", "10", "11", "12",
            "13", "14", "15", "16"
        )
        tt = [teensy.s(str(i)) for i in teensy_used]
        [p.setlayer("GBL").w("l 90 f 2").wire() for p in tt]
        rv0 = brd.enriver90(tt[:6][::-1], -90).wire()
        rv1 = brd.enriver90(tt[6:][::-1], 90).wire()
        b0 = rv1.join(rv0, 1).forward(2).wire()
        b0.shuffle(b1, {    # Teensy       Dazzler
            "14": "1"  ,    # TX3          CONSOLE IN 
            "15": "2"  ,    # RX3          CONOLE OUT 
            "12": "22" ,    # MISO         MISO       
            "8" : "25" ,    # 8            GPU SEL    
            "9" : "26" ,    # 9            SD SEL     
            "10": "27" ,    # 10           DAZZLER SEL
            "11": "28" ,    # MOSI         MOSI       
            "13": "29" ,    # SCK          SCK        
            "16":"PGM" ,    # 16           PGM        
            "1" : "23" ,    # UART0 TX     UART       
        }).w("f 8").meet(b1)
        daz.s("5V").setwidth(0.5).w("o f 2 r 90 f 39 l 90 f 23").goto(teensy.s("VIN")).wire()
    elif target == "feather":
        mapping = {
#           Feather             Dazzler
            "SCK"   : "29" ,    # SCK        
            "MOSI"  : "28" ,    # MOSI       
            "MISO"  : "22" ,    # MISO       
            "TX"    : "23" ,    # UART       
            "D4"    : "25" ,    # GPU SEL    
            "D5"    : "26" ,    # SD SEL     
            "D6"    : "27" ,    # DAZZLER SEL
            "D9"    :"PGM" ,    # PGM        
            "D10"   : "2"  ,    # CONOLE OUT 
            "D12"   : "1"  ,    # CONSOLE IN 
        }
        b1.w("l 45 f 2 r 45").wire()
        used = mapping.keys()
        tt = [feather.s(str(i)) for i in used]
        [p.setlayer("GBL").w("l 90 f 2").wire() for p in tt]
        rv0 = brd.enriver90(tt[:5][::-1], -90).wire()
        rv1 = brd.enriver90(tt[5:][::-1], 90).wire()
        b0 = rv1.join(rv0, 1).forward(19).wire()
        b0.shuffle(b1, mapping).w("f 8").meet(b1)
        daz.s("5V").setwidth(0.5).w("o f 2 r 90 f 41 l 90 f 23").goto(feather.s("USB")).wire()

    if 1:
        im = Image.open("img/gameduino-mono.png")
        brd.logo(16, 4, im)

        im = Image.open("img/dazzler-logo.png")
        brd.logo(36, 4, im)

        if target == "pico":
            brd.logo(pico.center.xy[0], pico.center.xy[1] - 15, gentext("PICO"))
        else:
            brd.logo(70, 4, gentext(target))

        brd.logo(-5, 38.5 - 12, gentext("2").transpose(Image.ROTATE_270), scale = 0.9)
        brd.logo(-5, 38.5 + 12, gentext("1").transpose(Image.ROTATE_270), scale = 0.9)

        brd.logo(-4.8, 38.5, Image.open("img/oshw-logo-outline.png").transpose(Image.ROTATE_270), scale = 0.7)

        for i,s in enumerate(["(C) 2021", "EXCAMERA LABS", str(__VERSION__)]):
            brd.annotate(81, 60 - 1.5 * i, s)

    if 1:
        brd.fill_any("GTL", "VCC")
        brd.fill_any("GBL", "GL2")

    name = target + "_dazzler"
    brd.save(name)
    for n in brd.nets:
        print(n)
    svgout.write(brd, name + ".svg")
示例#8
0
    j1 = dip.HDR40(dc)
    for pin in "6 9 14 20 25 30 34 39".split():
        thermal(j1.s(pin), "GBL")
    for pin in "2 4".split():
        thermal(j1.s(pin), "GTL")

    route = (8, 12, 11, 32)
    tt = [j1.s(str(i)) for i in route]
    for t in tt:
        pn = int(t.name)
        if (pn % 2) == 0:
            t.left(45).forward(cu.inches(.0707)).left(45)
        else:
            t.left(90)
        t.forward(2)
    cu.extend2(tt)
    rv1 = brd.enriver90(tt, 90)
    rv1.w("l 90")
    rv1.wire()

    j2 = dip.Screw2(brd.DC((60, 42)).left(90))
    thermal(j2.s("1"), "GBL", 2)
    thermal(j2.s("2"), "GTL", 2)

    k1 = dip.ReedRelay(brd.DC((40, 36)).left(90))
    thermal(k1.pads[1], "GTL")

    r1 = dip.Res10W(brd.DC((34, 25)))
    k1.pads[0].left(90).setwidth(WW).setlayer("GBL").goto(r1.pads[0]).wire()

    rv = rv1
示例#9
0
    wii2.w("f 10 r 45 f 4 r 45").wire()
    wii = wii2.join(wii1, 0.5).wire()
    wii.w("f 3").wire()

    for nm in ("G1", "G2", "G3", "G4", "6"):
        sd.s(nm).w("r 90 f 1.5 -")

    daz.s("VCC").thermal(1).wire()
    for nm in ("GND", "GND1", "GND2"):
        daz.s(nm).inside().forward(2).wire(width=0.5).w("-")

    jtag_names = ('TDI', 'TDO', 'TCK', 'TMS')
    jtag = [daz.s(nm) for nm in jtag_names]
    for i, t in enumerate(jtag):
        t.inside().forward(8 + 1 * i).wire().via().setlayer('GBL').right(45)
    cu.extend2(jtag)
    jtag0 = brd.enriver(jtag, 45)

    jtag_port = padline(brd.DC((11.0, 51.33)).left(90).setlayer("GBL"), 4)
    jtag1 = jtag_port.escape().wire()
    jtag0.w("f 15 r 45 f 3").meet(jtag1)

    for p, nm in zip(jtag_port.pads, jtag_names):
        p.text(nm)

    uart_names = ('DTR', 'OUT', 'IN', '3V3', 'CTS', 'GND')

    uart0 = daz.escapesM(["1", "2", "3"][::-1], -90).w("r 90").wire()

    uart_port = padline(brd.DC((2.0, 39.0)).left(180).setlayer("GBL"), 6)
    for p, nm in zip(uart_port.pads, uart_names):
示例#10
0
    brd.hole((5.029, 33.122), 3.2, 7)

    bus = dip.SIL(brd.DC((2.54 * 19.5, 1.715)).right(270), "39")
    nms = "a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 gnd 5v m1 rst clk int mreq wr rd iorq d0 d1 d2 d3 d4 d5 d6 d7 tx rx u1 u2 u3".split(
    )
    for (nm, p) in zip(nms, bus.pads):
        p.setname(nm)
        p.copy().w("l 90 f 2").text(nm.upper())

    b_names = "d7 d6 d5 d4 d3 d2 d1 d0 iorq wr int clk m1 a0 a1 a2 a3 a4 a5 a6 a7".split(
    )
    b_names = "a0 a1 a2 a3 a4 a5 a6 a7".split()
    zsig = [bus.s(nm) for nm in b_names]
    for i, t in enumerate(zsig):
        t.setlayer('GTL').w("l 90 f 1")
    cu.extend2(zsig)
    zsig0 = brd.enriver90(zsig, -90)
    zsig0.wire()

    # PS/2 keyboard: MD-60S from CUI, Future Electronics $1.10

    daz = Dazzler(brd.DC((73, 26)).right(0))

    (lvl_a, lvl_d, lvl_b) = cu.M74LVC245(brd.DC((60, 37)).right(45)).escape2()
    lvl_a.w("l 45 f 3").wire()
    lvl_d.setname("VCC").w("o f 0.5").wire()
    lvl_b.w("l 45 r 90 f 5 r 90")
    lvl_b.through()
    lvl_b.through()
    """
    cu.C0402(brd.DC((65, 39.0)), '0.1 uF').escape_2layer()