def set_level(self, level):
"""
set GPIO output signal
:level: refer to GpioLevel
"""
logging.debug("set_level: set <%s>=%d" % (self.gpio, level))
assert level in cons_list(GpioLevel)
reg = self._regs.ctrl
val = reg.read(RegCtrl.GPIO_SWPORT_DR)
reg.write(RegCtrl.GPIO_SWPORT_DR, (val & (~(1<<self.pin))) | (level<<self.pin))
def set_level(self, level):
"""
set GPIO output signal
:level: refer to GpioLevel
"""
logging.debug("set_level: set <%s>=%d" % (self.gpio, level))
assert level in cons_list(GpioLevel)
reg = self._regs.ctrl
val = reg.read(RegCtrl.GPIO_SWPORT_DR)
reg.write(RegCtrl.GPIO_SWPORT_DR,
(val & (~(1 << self.pin))) | (level << self.pin))
def set_drv(self, drv):
"""
set GPIO drv
:drv: refer to GpioDrv
"""
logging.debug("set_drv: set <%s>=%d" % (self.gpio, drv))
assert drv in cons_list(GpioDrv)
try:
offset = get_drv_offset_bits(self.gpio)
except:
logging.warn("set_drv: unknow drv of <%s>" % (self.gpio))
return None
set_rk32_drv(self.pin, self._regs.drv, offset, drv)
def set_pull(self, pull):
"""
set GPIO pull
:pull: refer to GpioPull
"""
logging.debug("set_pull: set <%s>=%d" % (self.gpio, pull))
assert pull in cons_list(GpioPull)
try:
offset = get_pull_offset_bits(self.gpio)
except:
logging.warn("set_pull: unknow pull of <%s>" % (self.gpio))
return None
set_rk32_pull(self.pin, self._regs.pull, offset, pull)
def set_dir(self, dir):
"""
set GPIO direction
:dir: refer to GpioDir
"""
logging.debug("set_dir: set <%s>=%d" % (self.gpio, dir))
assert dir in cons_list(GpioDir)
self.set_mux(GpioMux.MUX_GPIO) #set iomux=gpio default
reg = self._regs.ctrl
val = reg.read(RegCtrl.GPIO_SWPORT_DDR)
val &= (~(1 << self.pin))
val |= (dir << self.pin)
reg.write(RegCtrl.GPIO_SWPORT_DDR, val)
def set_drv(self, drv):
"""
set GPIO drv
:drv: refer to GpioDrv
"""
logging.debug("set_drv: set <%s>=%d" % (self.gpio, drv))
assert drv in cons_list(GpioDrv)
try:
offset= get_drv_offset_bits(self.gpio)
except:
logging.warn("set_drv: unknow drv of <%s>" % (self.gpio))
return None
set_rk32_drv(self.pin, self._regs.drv, offset, drv)
def set_pull(self, pull):
"""
set GPIO pull
:pull: refer to GpioPull
"""
logging.debug("set_pull: set <%s>=%d" % (self.gpio, pull))
assert pull in cons_list(GpioPull)
try:
offset= get_pull_offset_bits(self.gpio)
except:
logging.warn("set_pull: unknow pull of <%s>" % (self.gpio))
return None
set_rk32_pull(self.pin, self._regs.pull, offset, pull)
def set_mux(self, mux):
"""
set GPIO mux
:mux: refer to GpioMux
"""
logging.debug("set_mux: set <%s>=%d" % (self.gpio, mux))
assert mux in cons_list(GpioMux)
try:
offset,bits = get_mux_offset_bits(self.gpio)
except:
logging.warn("set_mux: unknow mux of <%s>" % (self.gpio))
return None
set_rk32_iomux(self.bank, self.pin, self._regs.iomux, offset, bits, mux)
def set_dir(self, dir):
"""
set GPIO direction
:dir: refer to GpioDir
"""
logging.debug("set_dir: set <%s>=%d" % (self.gpio, dir))
assert dir in cons_list(GpioDir)
self.set_mux(GpioMux.MUX_GPIO) #set iomux=gpio default
reg = self._regs.ctrl
val = reg.read(RegCtrl.GPIO_SWPORT_DDR)
val &= (~(1<<self.pin))
val |= (dir<<self.pin)
reg.write(RegCtrl.GPIO_SWPORT_DDR, val)
def set_mux(self, mux):
"""
set GPIO mux
:mux: refer to GpioMux
"""
logging.debug("set_mux: set <%s>=%d" % (self.gpio, mux))
assert mux in cons_list(GpioMux)
try:
offset, bits = get_mux_offset_bits(self.gpio)
except:
logging.warn("set_mux: unknow mux of <%s>" % (self.gpio))
return None
set_rk32_iomux(self.bank, self.pin, self._regs.iomux, offset, bits,
mux)
