示例#1
0
import os
from gbt_config_lib import reg_write1b, reg_read32b, reg_read1b, reg_write32b, reg_write64b, reg_read64b
from gbt_config_lib import RegAddrTable
import numpy as np
import sys
import time

RegAddr = RegAddrTable()
#5592405

mod = int(sys.argv[1])

if mod == 1:
    print "aaa"
    reg_write64b(RegAddr.REG_TX_CXP1_FORMAT, 0x55555500555555)

    reg_write64b(RegAddr.REG_RX_CXP1_FORMAT, 0x55555500555555)

elif mod == 2:
    reg_write64b(RegAddr.REG_TX_CXP1_FORMAT, 0x00000000555555)

    reg_write64b(RegAddr.REG_RX_CXP1_FORMAT, 0x00000000555555)

else:
    print "bbb"
    reg_write64b(RegAddr.REG_TX_CXP1_FORMAT, 0x00000000000000)
    reg_write64b(RegAddr.REG_RX_CXP1_FORMAT, 0x00000000000000)

reg_write32b(RegAddr.REG_TXOPT_CXP1_LOW, 0x000000)
reg_write32b(RegAddr.REG_TXOPT_CXP2_LOW, 0x000000)
reg_write32b(RegAddr.REG_RXOPT_CXP1_LOW, 0x000000)
示例#2
0
reg_write32b(RegAddr.REG_GBTTXRST,0xFFF0FFF)
time.sleep(0.5)
reg_write32b(RegAddr.REG_GBTTXRST,0)
time.sleep(1)



reg_write32b(RegAddr.REG_RXOPT_CXP1_LOW,0x000)
reg_write32b(RegAddr.REG_RXOPT_CXP2_LOW,0x000)


reg_write32b(RegAddr.REG_GTHRXRST,0xFFF0FFF)
time.sleep(0.1)
reg_write32b(RegAddr.REG_GTHRXRST,0x0000000)

reg_write64b(RegAddr.REG_TX_CXP1_FORMAT,0x55555500555555)
reg_write64b(RegAddr.REG_RX_CXP1_FORMAT,0x55555500555555)



for ch in range(24):
    print ch
    os.system("python gbt_config.py " + str(23-ch))

print "GBT RX reset..."
reg_write32b(RegAddr.REG_GBTRXRST,0xFFF0FFF)
time.sleep(0.5)
reg_write32b(RegAddr.REG_GBTRXRST,0)
time.sleep(1)

reg_write32b(RegAddr.REG_TXTC_SEL,0x00000000)

print "Quad Softreset for all quads..."
reg_write32b(RegAddr.REG_SOFTRST_GTHTXRST,0x70007000)
time.sleep(0.5)
reg_write32b(RegAddr.REG_SOFTRST_GTHTXRST,0)
time.sleep(2)

print "Quad SoftTxreset for all quads..."
reg_write32b(RegAddr.REG_SOFTTXRST,0x70007000)
time.sleep(0.5)
reg_write32b(RegAddr.REG_SOFTTXRST,0)
time.sleep(2)

print "GBT TX Latency Optimization for all channels... "
reg_write64b(RegAddr.REG_TXOPT_LOW,0xFFFFFFFFFFFF)

print "GBT TX Reset for all channels..."
reg_write32b(RegAddr.REG_GBTTXRST,0xFFF0FFF)
time.sleep(0.5)
reg_write32b(RegAddr.REG_GBTTXRST,0)
time.sleep(1)

#### RX

print "GBT RX Latency Optimization for all channels..."
reg_write64b(RegAddr.REG_RXOPT_LOW,0x000000)

print "GTH RX reset for all channels..."
reg_write32b(RegAddr.REG_GTHRXRST,0xFFF0FFF)
time.sleep(0.1)
示例#4
0
reg_write32b(RegAddr.REG_TXTC_SEL, 0x00000000)

print "Quad Softreset for all quads..."
reg_write32b(RegAddr.REG_SOFTRST_GTHTXRST, 0x70007000)
time.sleep(0.5)
reg_write32b(RegAddr.REG_SOFTRST_GTHTXRST, 0)
time.sleep(2)

print "Quad SoftTxreset for all quads..."
reg_write32b(RegAddr.REG_SOFTTXRST, 0x70007000)
time.sleep(0.5)
reg_write32b(RegAddr.REG_SOFTTXRST, 0)
time.sleep(2)

print "GBT TX Latency Optimization for all channels... "
reg_write64b(RegAddr.REG_TXOPT_LOW, 0xFFFFFFFFFFFF)

print "GBT TX Reset for all channels..."
reg_write32b(RegAddr.REG_GBTTXRST, 0xFFF0FFF)
time.sleep(0.5)
reg_write32b(RegAddr.REG_GBTTXRST, 0)
time.sleep(1)

#### RX

print "GBT RX Latency Optimization for all channels..."
reg_write64b(RegAddr.REG_RXOPT_LOW, 0x000000)

print "GTH RX reset for all channels..."
reg_write32b(RegAddr.REG_GTHRXRST, 0xFFF0FFF)
time.sleep(0.1)
示例#5
0
#reg_write32b(RegAddr.REG_RXUSRRDY,0)

print "Quad Softreset for all quads..."
reg_write32b(RegAddr.REG_SOFTRST_GTHTXRST,0x70007000)
time.sleep(0.5)
reg_write32b(RegAddr.REG_SOFTRST_GTHTXRST,0)
time.sleep(2)

print "Quad SoftTxreset for all quads..."
reg_write32b(RegAddr.REG_SOFTTXRST,0x70007000)
time.sleep(0.5)
reg_write32b(RegAddr.REG_SOFTTXRST,0)
time.sleep(2)

print "Set the TX GBT encoding mode for all channels..."
reg_write64b(RegAddr.REG_TX_CXP1_FORMAT,0x0000000000000000)





print "GBT TX Latency Optimization for all channels... "
reg_write64b(RegAddr.REG_TXOPT_LOW,0x000000000000)


print "Set TX Timedomain Crossing method..."
## 1: can gurantee a fixed latency, but need more test to verify it
#reg_write32b(RegAddr.REG_TXTC_SEL,0x0FFF0FFF)

## 0:
reg_write32b(RegAddr.REG_TXTC_SEL,0x00000000)
示例#6
0
TOPBOT_MODE = int(sys.argv[3])

## The value from database
## anytime when cable length or board, or firmware is changed, let TOPBOT_MODE=0 to run one time
## If use software to Rx align, after the alignment, save 0x2510 to the database for this board
## If use FSM to Rx align, after the alignment, read 0x2760, save it to the database.
TOPBOT_DATA_BASE = 0x00060F42

DESMUX_MODE = 0

RegAddr = RegAddrTable()

timewait = 0.1

print "GBT RX Latency Optimization for all channels..."
reg_write64b(RegAddr.REG_RXOPT_LOW, 0x000000)

print "GTH RX reset for all channels..."
reg_write32b(RegAddr.REG_GTHRXRST, 0xFFF0FFF)
time.sleep(0.1)
reg_write32b(RegAddr.REG_GTHRXRST, 0x0000000)

print "Set the RX GBT encoding mode for all channels..."

reg_write64b(RegAddr.REG_RX_CXP1_FORMAT, 0x0000000000000000)

if RX_ALIGN_MODE == 0:
    if TOPBOT_MODE == 0:
        reg_write32b(RegAddr.REG_MODESEL, (0x0 + DESMUX_MODE))
        time.sleep(1)