def build(cls, unit: Unit, unique_name: str, build_dir: Optional[str], target_platform=DummyPlatform(), do_compile=True) -> "BasicRtlSimulatorVcd": """ Create a pycocotb.basic_hdl_simulator based simulation model for specified unit and load it to python :param unit: interface level unit which you wont prepare for simulation :param unique_name: unique name for build directory and python module with simulator :param target_platform: target platform for this synthesis :param build_dir: directory to store sim model build files, if None sim model will be constructed only in memory """ if unique_name is None: unique_name = unit._getDefaultName() _filter = SerializerFilterDoNotExclude() if build_dir is None or not do_compile: buff = StringIO() store_man = SaveToStream(SimModelSerializer, buff, _filter=_filter) else: if not os.path.isabs(build_dir): build_dir = os.path.join(os.getcwd(), build_dir) build_private_dir = os.path.join(build_dir, unique_name) store_man = SaveToFilesFlat(SimModelSerializer, build_private_dir, _filter=_filter) store_man.module_path_prefix = unique_name to_rtl(unit, name=unique_name, target_platform=target_platform, store_manager=store_man) if build_dir is not None: d = build_dir dInPath = d in sys.path if not dInPath: sys.path.insert(0, d) if unique_name in sys.modules: del sys.modules[unique_name] simModule = importlib.import_module( unique_name + "." + unique_name, package='simModule_' + unique_name) if not dInPath: sys.path.pop(0) else: simModule = ModuleType('simModule_' + unique_name) # python supports only ~100 opened brackets # if exceeded it throws MemoryError: s_push: parser stack overflow exec(buff.getvalue(), simModule.__dict__) model_cls = simModule.__dict__[unit._name] # can not use just function as it would get bounded to class return cls(model_cls, unit)
def build(cls, unit: Unit, unique_name: str, build_dir: Optional[str], target_platform=DummyPlatform(), do_compile=True): """ Create a verilator based simulation model for specified unit and load it to Python :param unit: interface level unit which you wont prepare for simulation :param unique_name: unique name for build directory and python module with simulator :param target_platform: target platform for this synthesis :param build_dir: directory to store sim model build files, if None temporary folder is used and then deleted :param do_compile: if false reuse existing build if exists [TODO] """ if build_dir is None: build_dir = os.path.join("tmp", unique_name) build_private_dir = os.path.join(os.getcwd(), build_dir, unique_name) store_man = SaveToFilesFlat(VerilogSerializer, build_private_dir, _filter=SerializerFilterDoNotExclude()) to_rtl(unit, name=unique_name, target_platform=target_platform, store_manager=store_man) sim_verilog = store_man.files accessible_signals = collect_signals(unit) used_names = {x[0] for x in accessible_signals} assert len(used_names) == len(accessible_signals), \ "All signal has to have unique names" if do_compile: verilatorCompile(sim_verilog, build_dir) sim_so = generatePythonModuleWrapper(unit._name, unique_name, build_dir, accessible_signals) else: sim_so = None file_pattern = './**/{0}.*.so'.format(unique_name) for filename in iglob(file_pattern, recursive=True): assert sim_so is None, ("Can not resolve simulation library", sim_so, filename) sim_so = filename # load compiled library into python sim_module = loadPythonCExtensionFromFile(sim_so, unique_name) sim_cls = getattr(sim_module, unique_name) return sim_cls
def toHdlConversion(self, top, topName: str, saveTo: str) -> List[str]: """ :param top: object which is represenation of design :param topName: name which should be used for ipcore :param saveTo: path of directory where generated files should be stored :return: list of file namens in correct compile order """ ser = self.serializer store = SaveToFilesFlat(ser, saveTo) to_rtl(top, name=topName, store_manager=store, target_platform=self.target_platform) return store.files
def generate_hwt_examples(u_cls, data_root): for _ser, (json_suffix, ref_file_suffix) in FromJsonToHdlTC.FILE_SUFFIX.items(): u = u_cls() ser = HDLCONVERTOAST_TO_HWT[_ser] j = hwt_to_json(u, ser.TO_HDL_AST) u_name = u._name with open(os.path.join(data_root, f"{u_name}{json_suffix}"), "w") as f: json.dump(j, f, sort_keys=True, indent=1) u = u_cls() with open(os.path.join(data_root, "ref", f"{u_name}{ref_file_suffix}"), "w") as f: store_man = SaveToStream(ser, f) to_rtl(u, store_man)
def assert_constraints_file_eq(self, u, file_name): THIS_DIR = os.path.dirname(os.path.realpath(self.__FILE__)) ref_f_name = os.path.join(THIS_DIR, file_name) with TemporaryDirectory() as build_root: saver = SaveToFilesFlat(Vhdl2008Serializer, build_root) to_rtl(u, saver) f_name = os.path.join(build_root, "constraints" + XdcSerializer.fileExtension) with open(f_name) as f: s = f.read() # with open(ref_f_name, "w") as f: # f.write(s) with open(ref_f_name) as f: ref_s = f.read() self.assertEqual(s, ref_s)
def save_file(unit, serializer, path, name): from hwt.synthesizer.utils import to_rtl import os os.makedirs(path, exist_ok=True) unit.logger.info(f"Worker healthcheck: PID {os.getpid()}") file_extension = serializer.fileExtension unit.logger.info(f"Process {unit.process_id} Layer {unit.layer_id} " f"Unit {unit.unit_id} Channel {unit.channel_id} WRITER") unit.logger.info( f"Converting to {file_extension} in {path}/{name}{file_extension}") if unit.top_entity: store_manager = SaveTopEntity(serializer, path, name) to_rtl(unit, store_manager) return store_manager.filepath else: store_manager = SaveToFilesFlat(serializer, path) to_rtl(unit, store_manager) # code = to_rtl_str(unit, serializer_cls=serializer) # with open(f"{path}/{name}{file_extension}", "w") as file: # file.write(code) return f"{path}/{name}{file_extension}"
def hwt_to_json(u: Unit, to_hdl_ast): store_manager = SaveHwtToJson(to_hdl_ast) to_rtl(u, store_manager) return store_manager.ctx