def DynamicRTILE(rtile, TILE_VLD_ext, n, cl, vars, RFS):
RFS = isl.Map(RFS).coalesce()
I0 = rtile.domain()
text_file = open("Output.txt", "w")
for i in range(0, 10000):
if (i == 0):
J0 = rtile.range()
FS0 = I0.subtract(J0).coalesce()
L0 = FS0
else:
L0 = Lay0.apply(rtile)
J0 = J0.subtract(Lay0)
D0 = J0.apply(rtile)
Lay0 = L0.subtract(D0).coalesce()
if (Lay0.is_empty()):
break
Lay = Lay0.insert_dims(isl.dim_type.set, 2 * n, 2 * n)
Lay = Lay.intersect(TILE_VLD_ext).coalesce()
Lay = Lay.apply(RFS).coalesce()
Lay = imperf_tile.SimplifySlice(Lay)
loop = iscc.isl_ast_codegen(Lay)
loop = loop.split('\n')
if 'for' in loop[0]:
if ((('int c1') in loop[0]) or (('int c3') in loop[0])
or (('int c5') in loop[0])):
loop.insert(0, "#pragma omp parallel for")
loop_str = RestoreStatements2(loop, cl, n, vars)
text_file.write(loop_str)
# for line in loop_str:
# if '#pragma' in line:
# print colored(line, 'green')
# else:
# print line
text_file.close()
def fs_rk1(rel, SIMPLIFY, indt):
rk = rel.power() #Rk
if (rk[1] == 0):
print "rk approximated..."
rk = rk[0].coalesce()
#print rk
rk = isl.Map(iscc.RepairRk(str(rk), 0)) # przesun k do symb
print "RK"
print rk
uds = rel.domain().subtract(rel.range()).coalesce()
# ADD INDEPENDENT TILES TO UDS
#uds = uds.union(indt).coalesce()
print "UDS"
print uds
rel_plus = rel.transitive_closure()[0]
sk = uds.apply(rk).subtract(uds.apply(rk).apply(rel_plus)).coalesce()
sk = sk.insert_dims(isl.dim_type.set, 0, 1)
sk = sk.set_dim_name(isl.dim_type.set, 0, "ink")
c = isl.Constraint.eq_from_names(sk.get_space(), {"k": -1, "ink": 1})
sk = sk.add_constraint(c)
sk = tiling_v3.Project(sk, ["k"])
uds = uds.insert_dims(isl.dim_type.set, 0, 1)
uds = uds.set_dim_name(isl.dim_type.set, 0, "ink")
c = isl.Constraint.eq_from_names(sk.get_space(), {1: 0, "ink": 1})
uds = uds.add_constraint(c)
#x = isl.Set("{ [0, 0, 0, 6]}")
#uds = uds.union(x).coalesce()
print "TUDS"
print uds
sk = sk.union(uds).coalesce()
if (SIMPLIFY):
sk = imperf_tile.SimplifySlice(sk)
return sk
def fs_new(rel, rel_plus, rtile, LPetit, dane, plik, SIMPLIFY, rap, exact,
isl_TILEbis, sym_exvars, maxl, step, isl_tilevld, vars):
codegen = 'isl'
# compute rtile_plus
# podmien exact, rel na tile, rel_plus na rtile_plus
#wq = rtile.transitive_closure()[0]
#print wp.subtract(wq).coalesce()
#print wq.subtract(wp).coalesce()
if (exact):
print 'R+ exact!'
else:
print 'R+ approximated. Iterate way...!'
r0p_plus = relation_util.oc_IterateClosure(rel)
rel_plus = r0p_plus
isl_relclosure = rel_plus
isl_ident = rel.identity(rel.get_space())
isl_relclosure = isl_relclosure.union(
isl_ident).coalesce() # R* = R+ u I
print 'Checking (the Pugh method)'
# R = R compose RINV
if (rel_plus.subtract(
rel_plus.apply_range(rel).union(rel)).coalesce().is_empty()):
print ' .... OK !!'
else:
print 'R+ failed.'
sys.exit(0)
#file = open('lu_rplus.txt', 'r')
#isl_relclosure = isl.Map(file.read())
#print isl_relclosure
wp = GetRTilePlus(rel_plus, isl_tilevld, sym_exvars, vars).coalesce()
rel = rtile
rel_plus = wp
print '## R'
print rel
print '## R+'
print wp
rel = rel.subtract(rel_plus.apply_range(rel))
print '### R = R - R+ compose R'
print rel
global_size = rel.dim(isl.dim_type.in_)
UDS = rel.domain().subtract(rel.range()).coalesce()
UDD = rel.range().subtract(rel.domain()).coalesce()
DOM_RAN = rel.range().union(rel.domain()).coalesce()
cl = clanpy.ClanPy()
cl.loop_path = plik
cl.Load()
cl.RunCandl()
IS = DOM_RAN
for i in range(0, len(cl.statements)):
IS_ = isl.Set(cl.statements[i].domain_map).coalesce()
print IS_
set_size = IS_.dim(isl.dim_type.set)
for j in range(set_size, global_size - 1):
IS_ = IS_.insert_dims(isl.dim_type.set, j, 1)
IS_ = IS_.set_dim_name(isl.dim_type.set, j, 'i' + str(j))
c = isl.Constraint.eq_from_names(
IS_.get_space(), {
IS_.get_dim_name(isl.dim_type.set, j): -1,
1: -1
})
IS_ = IS_.add_constraint(c).coalesce()
set_size = IS_.dim(isl.dim_type.set)
IS_ = IS_.insert_dims(isl.dim_type.set, set_size, 1)
IS_ = IS_.set_dim_name(isl.dim_type.set, set_size, "v")
#print cl.statements[i].body
c = isl.Constraint.eq_from_names(IS_.get_space(), {
"v": -1,
1: int(dane[i])
})
IS_ = IS_.add_constraint(c).coalesce()
if i == 0:
IS = IS_
else:
IS = IS.union(IS_).coalesce()
print "IS"
print IS
IND = IS.subtract(DOM_RAN).coalesce()
print "IND"
print IND
n = rel.dim(isl.dim_type.in_)
inp = []
outp = []
for i in range(0, n):
inp.append("i" + str(i))
outp.append("o" + str(i))
# Rlex
rlex = "{[" + ",".join(inp) + "] -> [" + ",".join(
outp) + "] : " + tiling_v3.CreateLex(outp, inp) + "}"
rlex = isl.Map(rlex)
rip = rel_plus.fixed_power_val(-1)
re_rel = isl.Map.from_domain_and_range(IS, IS)
#print re
print "### RE"
re_rel = re_rel.intersect(rlex.subtract(rel_plus).subtract(rip)).coalesce()
print re_rel
# oblicz Re1
#Re1 = GetRe1(re_rel, rel_plus)
#print "### RE2"
#re_rel = re_rel.subtract(Re1).coalesce()
#print re_rel
re2 = re_rel
W = re_rel.domain().union(re_rel.range()).coalesce()
D = re_rel.domain().subtract(re_rel.range()).coalesce()
rel_inv = rel.fixed_power_val(-1)
print "R^-1"
print rel_inv
# R = R compose RINV
#RR = rel.apply_range(rel_inv)
RR = rel_inv.apply_range(rel)
# ------ Jesli RCHECK ----------
if (1 == 0):
RRR1 = rel.fixed_power_val(2)
RRR2 = rel_inv.fixed_power_val(2)
RRR = RRR1.union(RRR2).coalesce()
RR = RR.union(RRR).coalesce()
# ------------------------------
RR = RR.intersect(rlex).coalesce()
print "### RR"
print RR
IND_lexmin = IND.lexmin()
IND0ToIND = isl.Map.from_domain_and_range(IND_lexmin, IND).coalesce()
RRPLUS = RR.transitive_closure()
RR_EXACT = RRPLUS[1]
RRPLUS = RRPLUS[0]
if not RR_EXACT:
print 'RR+ not exact'
#sys.exit(0)
# sprawdz dokladnosc
R2 = GetR2(re_rel, RRPLUS)
print '### RRPLUS'
print RRPLUS
print '### R2'
R2 = R2.coalesce()
print R2
RRstar = RRPLUS
RR_ident = RR.identity(RR.get_space())
RRstar = RRstar.union(RR_ident).coalesce() # R* = R+ u I
print "### Rstar"
print RRstar
REPR = D.union(DOM_RAN.subtract(W)).coalesce()
# poprawka
REPR = R2.domain().subtract(R2.range()).coalesce()
print '#REPR1'
print REPR
tmp = REPR.apply(RRstar).coalesce()
REPR2 = DOM_RAN.subtract(tmp).coalesce()
print '#REPR2'
print REPR2
REPR = REPR.union(REPR2).coalesce()
REPR = imperf_tile.SimplifySlice(REPR)
#####
#REPR1:= domain RE2 - range RE2;
#REPR2:= (domain R union R) -RR * (REPR1);
#REPR = REPR.intersect(IS)
print "### REPR"
print REPR
if (1 == 0):
Rtmp = REPR.polyhedral_hull()
if (Rtmp.subtract(REPR).coalesce().is_empty()
and REPR.subtract(Rtmp).coalesce().is_empty()):
print "upraszczanie"
REPR = Rtmp
R1 = RRstar.intersect_domain(REPR.coalesce())
# R1 = R1.intersect_range(IS)
print 'RSCHED obliczanie :'
print R1
print "IND0->IND"
print IND0ToIND
#print R3
print "i razem"
#RSCHED = R1.union(IND0ToIND).coalesce()
RSCHED = R1
#upraszczanie
if (SIMPLIFY and 1 == 0):
Rtmp = RSCHED.polyhedral_hull()
if (Rtmp.subtract(RSCHED).coalesce().is_empty()
and RSCHED.subtract(Rtmp).coalesce().is_empty()):
print "upraszczanie"
RSCHED = Rtmp
#RSCHED = imperf_tile.SimplifyMap(RSCHED)
print "### RSCHED"
print RSCHED
print "### Check "
Check_set = RSCHED.domain().union(RSCHED.range()).coalesce()
Check_set = IS.subtract(IND).subtract(Check_set).coalesce()
if Check_set.is_empty():
print "OK"
else:
print "ERROR ! " + str(Check_set)
sys.exit(0)
# generowanie kodu
D = RSCHED.domain()
#if(SIMPLIFY):
print "# DOMAIN RSCHED"
print D
D = D.apply(rap)
D = imperf_tile.SimplifySlice(D)
D = D.coalesce()
print rap
print D
if (codegen == 'barvinok'):
looprepr = iscc.iscc_communicate("L :=" + str(D) + "; codegen L;")
else: # isl
looprepr = iscc.isl_ast_codegen(D)
for i in range(0, 20):
looprepr = re.sub('\\b' + 'c' + str(i) + '\\b', 't' + str(i), looprepr)
print looprepr
looprepr = looprepr.split('\n')
st_reg = re.compile('\s*\(.*\);')
vecs = []
taby = []
for line in looprepr:
if (st_reg.match(line)):
vecs.append(line) #(isl.Set(iscc.s1_to_vec3(line, len(vecs))))
taby.append(iscc.correct.whites(line))
slices = []
for vec in vecs:
#vec = isl.Set("[g1,g2,g3] -> {[g1,g2,g3]}")
vec = GetConstraint(vec)
slice = vec
if (not RSCHED.is_empty()):
slice_ = slice.apply(RSCHED)
slice = slice.union(slice_).coalesce()
slice = slice_
print '-------- IS --------'
print IS
slice = slice.intersect(IS).coalesce()
print slice
#if(SIMPLIFY):
#slice = imperf_tile.SimplifySlice(slice)
# EKSPERIMENTAL CODE wywal z RE instrukcje nie nalezace do RE
if (1 == 0):
temp = slice.intersect(W).coalesce()
if (not temp.is_empty()):
slice = temp
slice = slice.apply(rap)
wlen = len(sym_exvars)
slice = slice.insert_dims(isl.dim_type.set, 2 * wlen, wlen * 2)
print slice
print isl_TILEbis
slice = slice.intersect(isl_TILEbis)
slices.append(slice.coalesce())
new_loop = []
i = 0
for line in looprepr:
if (st_reg.match(line)):
#print slices[i]
if (codegen == 'barvinok'):
petla = iscc.iscc_communicate("L :=" + str(slices[i]) +
"; codegen L;")
petla = petla.split('\n')
else: #isl
petla = iscc.isl_ast_codegen(slices[i]).split('\n')
petla = correct.Korekta('', petla) # dodaj { } do for
was_par = 0 # poprawic jak sie koncza petle i sa nowe
for s in petla:
if 'for (int c' in s and was_par == 0:
new_loop.append(taby[i] + imperf_tile.get_tab(s) +
'#pragma omp parallel for')
if "{" in s:
was_par = 1
new_loop.append(taby[i] + s)
if was_par > 0:
if "{" in s:
was_par = was_par + 1
if "}" in s:
was_par = was_par - 1
i = i + 1
else:
new_loop.append(line)
nloop = ""
for line in new_loop:
if line != '':
# if 'for (int c1' in line: # c0 przy perf, c1 przy imperf
# line = imperf_tile.get_tab(line) + "#pragma omp parallel for\n" +line
nloop = nloop + line + "\n"
nloop = nloop[:-1]
nloop = nloop.split('\n')
nloop = tiling_v3.postprocess_loop(nloop)
lines = nloop.split('\n')
loop = imperf_tile.RestoreStatements(lines, LPetit, dane, wlen, 1, [])
#loop = imperf_tile.RestoreStatements(lines, LPetit, dane, maxl, step, permutate_list)
print "=========================="
print "OUTPUT CODE"
print loop
print UDS
print UDS - REPR
TILE_VLD = TILE_VLD1
#######################################################################
Rapply = tiling_v3.GetRapply(['j', 'i', 'k'], ['jj', 'ii', 'kk'],
'jj,ii,kk,N,')
TILE_VLD_EXT1 = tiling_v3.Project(
TILE_VLD1.apply(Rapply).coalesce(), ['jj', 'ii', 'kk'])
Rmap = isl.Map(
'{[jj,ii,kk,j,i,k,9] -> [0, ii,0, jj,0, kk,0, j,0, i,0,k,9]; } ')
TILE_VLD_EXT1 = TILE_VLD_EXT1.apply(Rmap).coalesce()
TILE_VLD_EXT = TILE_VLD_EXT1
TILE_VLD_EXT = imperf_tile.SimplifySlice(TILE_VLD_EXT)
RSched = '[N] -> {[i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11,i12,i13]->[i1,i2+i4,i3,i4,i5,i6,i7,i8,i9,-i10,i11,i12,i13] : '
in_ = [
'i1', 'i2', 'i3', 'i4', 'i5', 'i6', 'i7', 'i8', 'i9', 'i10', 'i11', 'i12',
'i13'
]
RSched = RSched + copyconstr.GetConstrSet(in_, TILE_VLD_EXT) + "}"
Rsched = isl.Map(RSched)
print 'TILE_VLD_EXT'
print TILE_VLD_EXT
print 'RSCHED'
print Rsched
def tile_par3(isl_TILEbis, sym_exvars, isl_rel, isl_relplus, isl_relclosure,
Extend, _rap, Dodatek, SIMPLIFY, ii_SET):
#print isl_TILEbis
srepr, rucs = slicing.Create_Srepr(isl_rel, isl_relclosure)
fs = 0
ir = isl_rel.domain().union(isl_rel.range()).coalesce()
ir = ir.insert_dims(isl.dim_type.set, 0, len(sym_exvars))
for i in range(0, len(sym_exvars)):
ir = ir.set_dim_name(isl.dim_type.set, i, sym_exvars[i])
if (Extend):
for i in range(0, 2 * len(sym_exvars)):
ir = ir.insert_dims(isl.dim_type.set, 2 * i, 1)
srepr = srepr.insert_dims(isl.dim_type.set, 0, len(sym_exvars))
for i in range(0, len(sym_exvars)):
srepr = srepr.set_dim_name(isl.dim_type.set, i, sym_exvars[i])
if (Extend):
for i in range(0, 2 * len(sym_exvars)):
srepr = srepr.insert_dims(isl.dim_type.set, 2 * i, 1)
x = 1
if (Extend):
x = 2
#relacja do obliczenia poczatkow
Rel_Z = "{["
for i in range(0, 2 * x * len(sym_exvars)):
Rel_Z = Rel_Z + "i" + str(i) + ","
Rel_Z = Rel_Z + "m] -> ["
for i in range(0, x * len(sym_exvars)):
Rel_Z = Rel_Z + "i" + str(i) + ","
Rel_Z = Rel_Z[:-1] + "] };"
Rel_Z = isl.Map(Rel_Z)
#relacja do wylapania instrukcji z blokow
Rel_Y = "{["
for i in range(0, x * len(sym_exvars)):
Rel_Y = Rel_Y + "i" + str(i) + ","
for i in range(0, x * len(sym_exvars) + 1):
Rel_Y = Rel_Y + "j" + str(i) + ","
Rel_Y = Rel_Y[:-1] + "] -> ["
for i in range(0, x * len(sym_exvars)):
Rel_Y = Rel_Y + "i" + str(i) + ","
for i in range(0, x * len(sym_exvars) + 1):
Rel_Y = Rel_Y + "k" + str(i) + ","
Rel_Y = Rel_Y[:-1] + "] };"
Rel_Y = isl.Map(Rel_Y)
Rel_W = "{["
for i in range(0, x * len(sym_exvars)):
Rel_W = Rel_W + "i" + str(i) + ","
Rel_W = Rel_W + "m1] -> ["
for i in range(0, x * len(sym_exvars)):
Rel_W = Rel_W + "o" + str(i) + ","
Rel_W = Rel_W + "m2] : not ("
for i in range(0, x * len(sym_exvars)):
Rel_W = Rel_W + "i" + str(i) + " = " + "o" + str(i) + " and "
Rel_W = Rel_W[:-4] + ")}"
TILE_SOUR = isl_TILEbis.intersect(srepr).coalesce()
TILE_IND = isl_TILEbis.subtract(isl_TILEbis.intersect(ir)).coalesce()
indloop = iscc.iscc_communicate("L :=" + str(TILE_IND) + "; codegen L;")
if (TILE_SOUR.lexmax() == TILE_SOUR.lexmin()):
print "FS"
fs = 1
else:
print "========================================================================="
print "SLICING + TILING"
if (rucs.is_empty()):
isl_rel = isl_rel.union(rucs)
isl_relclosure = isl_relclosure.union(rucs)
isl_relplus = isl_relplus.union(rucs)
rplus = tiling_v3.ExtendMap(isl_relplus, sym_exvars, Extend)
rstar = tiling_v3.ExtendMap(isl_relclosure, sym_exvars, Extend)
rel_ = tiling_v3.ExtendMap(isl_rel, sym_exvars, Extend)
rucs = tiling_v3.ExtendMap(rucs, sym_exvars, Extend)
rbis = isl.Map.from_domain_and_range(isl_TILEbis, isl_TILEbis)
rs = rbis.intersect(rstar)
rs = rs.union(rucs.transitive_closure()[0].intersect(rbis)).coalesce()
Exp = True
TMP2 = TILE_SOUR
if (Exp and fs != 1):
rel_simple = rbis.intersect(rel_)
print rel_simple
rel_simple = rel_simple.project_out(isl.dim_type.in_,
x * len(sym_exvars),
x * len(sym_exvars))
rel_simple = rel_simple.project_out(isl.dim_type.out,
x * len(sym_exvars),
x * len(sym_exvars))
relw = isl.Map(Rel_W)
rel_simple = rel_simple.intersect(relw).coalesce()
rel_simple = rel_simple.coalesce()
print "RT"
print rel_simple
#independent tiles
indt = rel_simple.domain().union(rel_simple.range()).coalesce()
print indt
#print II_SET
#indt = ii_SET.subtract(indt).coalesce()
# II_SET z Clana
rel_simple_plus = rel_simple.transitive_closure()[0]
print "RT+"
print rel_simple_plus
srepr, rucs = slicing.Create_Srepr(rel_simple, rel_simple_plus)
print srepr
# NAPRAWIC
# !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
#add independent tiles for srepr
#srepr = srepr.union(indt).coalesce()
print "SREPR"
print srepr
print "RUCS"
print rucs
#sys.exit()
# srepr = imperf_tile.SimplifySlice(srepr)
srepr = srepr.insert_dims(isl.dim_type.set, x * len(sym_exvars),
x * len(sym_exvars))
TILE_SOUR = isl_TILEbis.intersect(srepr).coalesce()
TMP2 = TILE_SOUR
if (fs != 1):
if (rucs.is_empty()):
TILE_SOUR = TILE_SOUR.subtract(TILE_SOUR.apply(
rplus)).coalesce() # remove dependent blocks with srepr
TILE_RUCS = slicing.Create_RUCS(rel_, rs, TILE_SOUR, TILE_SOUR, 1,
Rel_Y)
TILE_SOUR = TILE_SOUR.subtract(TILE_RUCS.range()).coalesce()
print "TILE_RUCS"
print TILE_RUCS
print "TILE_SOUR"
print TILE_SOUR
TILE_SOUR = TMP2
z = TILE_SOUR.apply(Rel_Z).coalesce()
if (SIMPLIFY):
z = imperf_tile.SimplifySlice(z)
srepr_loop = iscc.iscc_communicate("L :=" + str(z) +
"; codegen L;") # albo omega
#srepr_loop = iscc.oc_communicate(z)
srepr_loop = srepr_loop.split('\n')
for i in range(0, len(srepr_loop)):
if "for" in srepr_loop[i]:
srepr_loop.insert(i, "#pragma omp parallel for")
break
#print srepr_loop
st_reg = re.compile('\s*\(.*\);')
vecs = []
taby = []
for line in srepr_loop:
if (st_reg.match(line)):
vecs.append(isl.Set(iscc.s1_to_vec2(line, len(vecs))))
taby.append(iscc.correct.whites(line))
#print vecs
permutate_maps = Dodatek[6]
permutate_list = Dodatek[5]
slices = []
for i in range(0, len(vecs)):
vecs[i] = vecs[i].intersect(z).coalesce()
for vec in vecs:
vec = vec.insert_dims(isl.dim_type.set, x * len(sym_exvars),
x * len(sym_exvars) + 1)
#vec = vec.insert_dims(isl.dim_type.set, x*len(sym_exvars), 1)
slice = vec #.apply(rs)
slice = slice.apply(Rel_Y)
slice = slice.apply(rs).coalesce()
#print slice
#print rs1
#slice = slice.apply(rs1).coalesce()
#slice = slice.insert_dims(isl.dim_type.set, x*len(sym_exvars), x*len(sym_exvars))
#slice = slice.intersect(isl_TILEbis).coalesce()
# experimental permutate
if (len(permutate_list) > 0):
print "Tiling + slicing + permutation - experimental"
RP = permutate_maps[0]
RIDENT = RP.identity(RP.get_space())
if (not RP.is_equal(RIDENT)
): #permute map is not an identity map
strRP = str(RP)
strh = ""
for i in range(0, x * len(sym_exvars)):
strh = strh + "xx" + str(i) + ","
if (Extend):
strkoma = strRP.split(",")
strRP = ""
for i in range(0, 2 * len(sym_exvars)):
strRP = strRP + strkoma[i] + ", yy" + str(
i % len(sym_exvars)) + ", "
strRP = strRP + strkoma[2 * len(sym_exvars)]
strRP = strRP.replace("[", "[" + strh)
RP = isl.Map(strRP)
slice = slice.apply(RP).coalesce()
# ---------------------------------------------------------
if (SIMPLIFY and False):
slice = imperf_tile.SimplifySlice(slice)
slices.append(slice)
#print slice
cmd = ""
for i in range(0, len(vecs)):
print "SLICE"
print slices[i]
cmd = cmd + "codegen " + str(slices[i]) + ';print "###";'
cmd = iscc.iscc_communicate(cmd)
cmd = cmd.split('"###"')
new_loop = []
i = 0
for line in srepr_loop:
if (st_reg.match(line)):
petla = cmd[i].split('\n')
for s in petla:
new_loop.append(taby[i] + s)
i = i + 1
else:
new_loop.append(line)
nloop = ""
for line in new_loop:
if line != '':
nloop = nloop + line + "\n"
nloop = nloop[:-1]
nloop = nloop + "// independent statements \n" + indloop
nloop = nloop.split('\n')
# Dodatek = [LPetit, dane, maxl, step, nazwapar, permutate_list, permutate_maps]
#permutate list
nloop = tiling_v3.postprocess_loop(nloop)
lines = nloop.split('\n')
loop = imperf_tile.RestoreStatements(lines, Dodatek[0], Dodatek[1],
Dodatek[2], Dodatek[3],
Dodatek[5])
text_file = open(Dodatek[4], "w")
text_file.write(loop)
text_file.close()
return ""
else:
rel_ = rbis.intersect(rel_)
rel_ = rel_.project_out(isl.dim_type.in_, x * len(sym_exvars),
x * len(sym_exvars))
rel_ = rel_.project_out(isl.dim_type.out, x * len(sym_exvars),
x * len(sym_exvars))
rel_ = rel_.coalesce()
relw = isl.Map(Rel_W)
rel_ = rel_.intersect(relw).coalesce()
print "REL"
print rel_
#independent tiles
#indt = rel_.domain().union(rel_.range()).coalesce()
#indt = ii_SET.subtract(indt).coalesce()
indt = ""
# FS z RK
sk = fs_rk.fs_rk1(rel_, SIMPLIFY, indt)
# FS bez RK
#sk = fs_karl.FSwithoutRG(rel_)
sk = sk.insert_dims(isl.dim_type.set,
x * len(sym_exvars) + 1, x * len(sym_exvars))
bis = isl_TILEbis.insert_dims(isl.dim_type.set, 0, 1)
sk = bis.intersect(sk).coalesce()
if (SIMPLIFY):
sk = imperf_tile.SimplifySlice(sk)
#sys.exit(0);
print "SK"
print sk
print "Codegen now..."
#fsloop = iscc.iscc_communicate("L :=" + str(sk) + "; codegen L;")
fsloop = iscc.isl_ast_codegen(sk)
print "Codegen done."
nloop = fsloop.split('\n')
nloop = tiling_v3.postprocess_loop(nloop)
lines = fs_pragma(nloop)
#Dodatek[2]+1 shift + 1 for k
#if extend first shift shoud be one smaller
if (Extend):
sh = 1
else:
sh = 0
loop = imperf_tile.RestoreStatements(lines, Dodatek[0], Dodatek[1],
Dodatek[2] + 1, Dodatek[3],
Dodatek[5], sh)
text_file = open(Dodatek[4], "w")
text_file.write(loop)
text_file.close()
return ""
def tile_par2(isl_TILEbis, sym_exvars, isl_rel, isl_relplus, isl_relclosure,
Extend, _rap, Dodatek, SIMPLIFY):
#with open('sources_of_slices.txt') as f:
# content = f.readlines()
# srepr = content[0]
#srepr = isl.Set(srepr)
#with open('rucs.txt') as f:
# content = f.readlines()
# rucs = content[0]
#_rel = _rel.remove_dims(isl.dim_type.in_, 0,1)
#_rel = _rel.remove_dims(isl.dim_type.out, 0,1)
#print _rel
'''
ir = isl_rel
print ir
ir = ir.insert_dims(isl.dim_type.in_, 0, len(sym_exvars))
ir = ir.insert_dims(isl.dim_type.out, 0, len(sym_exvars))
print ir
ir2 = ir.from_domain_and_range(isl_TILEbis, isl_TILEbis).coalesce()
ir = ir2.intersect(ir).coalesce()
print ir
ir = ir.remove_dims(isl.dim_type.in_, len(sym_exvars),len(sym_exvars))
ir = ir.remove_dims(isl.dim_type.out, len(sym_exvars),len(sym_exvars))
ir = ir.coalesce()
print ir
sys.exit(0);
'''
srepr, rucs = slicing.Create_Srepr(isl_rel, isl_relclosure)
print srepr
ir = isl_rel.domain().union(isl_rel.range()).coalesce()
ir = ir.insert_dims(isl.dim_type.set, 0, len(sym_exvars))
for i in range(0, len(sym_exvars)):
ir = ir.set_dim_name(isl.dim_type.set, i, sym_exvars[i])
if (Extend):
for i in range(0, 2 * len(sym_exvars)):
ir = ir.insert_dims(isl.dim_type.set, 2 * i + 1, 1)
srepr = srepr.insert_dims(isl.dim_type.set, 0, len(sym_exvars))
for i in range(0, len(sym_exvars)):
srepr = srepr.set_dim_name(isl.dim_type.set, i, sym_exvars[i])
if (Extend):
for i in range(0, 2 * len(sym_exvars)):
srepr = srepr.insert_dims(isl.dim_type.set, 2 * i + 1, 1)
x = 1
if (Extend):
x = 2
#relacja do obliczenia poczatkow
Rel_Z = "{["
for i in range(0, 2 * x * len(sym_exvars)):
Rel_Z = Rel_Z + "i" + str(i) + ","
Rel_Z = Rel_Z + "m] -> ["
for i in range(0, x * len(sym_exvars)):
Rel_Z = Rel_Z + "i" + str(i) + ","
Rel_Z = Rel_Z[:-1] + "] };"
Rel_Z = isl.Map(Rel_Z)
#relacja do wylapania instrukcji z blokow
Rel_Y = "{["
for i in range(0, x * len(sym_exvars)):
Rel_Y = Rel_Y + "i" + str(i) + ","
for i in range(0, x * len(sym_exvars) + 1):
Rel_Y = Rel_Y + "j" + str(i) + ","
Rel_Y = Rel_Y[:-1] + "] -> ["
for i in range(0, x * len(sym_exvars)):
Rel_Y = Rel_Y + "i" + str(i) + ","
for i in range(0, x * len(sym_exvars) + 1):
Rel_Y = Rel_Y + "k" + str(i) + ","
Rel_Y = Rel_Y[:-1] + "] };"
Rel_Y = isl.Map(Rel_Y)
TILE_SOUR = isl_TILEbis.intersect(srepr).coalesce()
TILE_IND = isl_TILEbis.subtract(isl_TILEbis.intersect(ir)).coalesce()
indloop = iscc.iscc_communicate("L :=" + str(TILE_IND) + "; codegen L;")
fs = 0
if (TILE_SOUR.lexmax() == TILE_SOUR.lexmin()):
print "FS"
fs = 1
else:
print "SLICING"
if (rucs.is_empty()):
isl_rel = isl_rel.union(rucs)
isl_relclosure = isl_relclosure.union(rucs)
isl_relplus = isl_relplus.union(rucs)
rplus = tiling_v3.ExtendMap(isl_relplus, sym_exvars, Extend)
rstar = tiling_v3.ExtendMap(isl_relclosure, sym_exvars, Extend)
rel_ = tiling_v3.ExtendMap(isl_rel, sym_exvars, Extend)
#rucs = tiling_v3.ExtendMap(rucs, sym_exvars, Extend)
rbis = isl.Map.from_domain_and_range(isl_TILEbis, isl_TILEbis)
rs = rbis.intersect(rstar)
rt_red = rbis.intersect(rplus)
if (fs != 1):
if (rucs.is_empty()):
TILE_SOUR = TILE_SOUR.subtract(TILE_SOUR.apply(
rplus)).coalesce() # remove dependent blocks with srepr
TILE_RUCS = slicing.Create_RUCS(rel_, rs, TILE_SOUR, TILE_SOUR, 1,
Rel_Y)
TILE_SOUR = TILE_SOUR.subtract(TILE_RUCS.range()).coalesce()
z = TILE_SOUR.apply(Rel_Z).coalesce()
if (SIMPLIFY):
z = imperf_tile.SimplifySlice(z)
srepr_loop = iscc.iscc_communicate("L :=" + str(z) +
"; codegen L;") # albo omega
#srepr_loop = iscc.oc_communicate(z)
print srepr_loop
srepr_loop = srepr_loop.split('\n')
for i in range(0, len(srepr_loop)):
if "for" in srepr_loop[i]:
srepr_loop.insert(i, "#pragma omp parallel for")
break
st_reg = re.compile('\s*\(.*\);')
vecs = []
taby = []
for line in srepr_loop:
if (st_reg.match(line)):
vecs.append(isl.Set(iscc.s1_to_vec2(line, len(vecs))))
taby.append(iscc.correct.whites(line))
#print vecs
permutate_maps = Dodatek[6]
permutate_list = Dodatek[5]
slices = []
for i in range(0, len(vecs)):
vecs[i] = vecs[i].intersect(z).coalesce()
for vec in vecs:
vec = vec.insert_dims(isl.dim_type.set, x * len(sym_exvars),
x * len(sym_exvars) + 1)
slice = vec #.apply(rs)
slice = slice.apply(Rel_Y)
slice = slice.apply(rs).coalesce()
# experimental permutate
if (len(permutate_list) > 0):
print "Tiling + slicing + permutation - experimental"
RP = permutate_maps[0]
RIDENT = RP.identity(RP.get_space())
if (not RP.is_equal(RIDENT)
): #permute map is not an identity map
strRP = str(RP)
strh = ""
for i in range(0, x * len(sym_exvars)):
strh = strh + "xx" + str(i) + ","
if (Extend):
strkoma = strRP.split(",")
strRP = ""
for i in range(0, 2 * len(sym_exvars)):
strRP = strRP + strkoma[i] + ", yy" + str(
i % len(sym_exvars)) + ", "
strRP = strRP + strkoma[2 * len(sym_exvars)]
strRP = strRP.replace("[", "[" + strh)
RP = isl.Map(strRP)
slice = slice.apply(RP).coalesce()
# ---------------------------------------------------------
if (SIMPLIFY):
slice = imperf_tile.SimplifySlice(slice)
slices.append(slice)
print slice
cmd = ""
for i in range(0, len(vecs)):
cmd = cmd + "codegen " + str(slices[i]) + ';print "###";'
cmd = iscc.iscc_communicate(cmd)
cmd = cmd.split('"###"')
new_loop = []
i = 0
for line in srepr_loop:
if (st_reg.match(line)):
petla = cmd[i].split('\n')
for s in petla:
new_loop.append(taby[i] + s)
i = i + 1
else:
new_loop.append(line)
nloop = ""
for line in new_loop:
if line != '':
nloop = nloop + line + "\n"
nloop = nloop[:-1]
#nloop = nloop + indloop
nloop = nloop.split('\n')
# Dodatek = [LPetit, dane, maxl, step, nazwapar, permutate_list, permutate_maps]
#permutate list
nloop = tiling_v3.postprocess_loop(nloop)
lines = nloop.split('\n')
loop = imperf_tile.RestoreStatements(lines, Dodatek[0], Dodatek[1],
Dodatek[2], Dodatek[3],
Dodatek[5])
text_file = open(Dodatek[4], "w")
text_file.write(loop)
text_file.close()
return ""
else:
print "fs (EXPERIMENTAL) ..."
sym_tmp = []
rlex = "{["
for s in sym_exvars:
rlex = rlex + s + ","
sym_tmp.append(s + "'")
rlex = rlex[:-1] + '] -> ['
for s in sym_exvars:
rlex = rlex + s + "',"
rlex = rlex[:-1] + '] : '
rlex = rlex + tiling_v3.CreateLex(sym_tmp, sym_exvars) + "};"
rlex = isl.Map(rlex)
rlex = rlex.insert_dims(isl.dim_type.in_, len(sym_exvars),
len(sym_exvars) + 1)
rlex = rlex.insert_dims(isl.dim_type.out, len(sym_exvars),
len(sym_exvars) + 1)
UDS = isl_rel.domain().subtract(isl_rel.range())
UDS = UDS.insert_dims(isl.dim_type.set, 0, len(sym_exvars))
for i in range(0, len(sym_exvars)):
UDS = UDS.set_dim_name(isl.dim_type.set, i, sym_exvars[i])
if (Extend):
for i in range(0, 2 * len(sym_exvars)):
UDS = UDS.insert_dims(isl.dim_type.set, 2 * i + 1, 1)
rlex = rlex.insert_dims(isl.dim_type.in_, 2 * i + 1, 1)
rlex = rlex.insert_dims(isl.dim_type.out, 2 * i + 1, 1)
tuds = UDS.intersect(isl_TILEbis).coalesce()
#tuds = tuds.insert_dims(isl.dim_type.set, len(sym_exvars), len(sym_exvars)+1)
rt_red = rt_red.intersect(rlex).coalesce()
rk = rt_red.power()
rk = rk[0]
rk = isl.Map(iscc.RepairRk(str(rk), 0))
rp = rt_red.transitive_closure()[0]
sk = tuds.apply(rk).subtract(tuds.apply(rk).apply(rp)).coalesce()
sk = sk.apply(Rel_Y).intersect(isl_TILEbis)
sk = sk.insert_dims(isl.dim_type.set, 0, 1)
sk = sk.set_dim_name(isl.dim_type.set, 0, "ink")
c = isl.Constraint.eq_from_names(sk.get_space(), {"k": -1, "ink": 1})
sk = sk.add_constraint(c)
sk = tiling_v3.Project(sk, ["k"])
tuds = tuds.apply(Rel_Y).intersect(isl_TILEbis)
tuds = tuds.insert_dims(isl.dim_type.set, 0, 1)
tuds = tuds.set_dim_name(isl.dim_type.set, 0, "ink")
c = isl.Constraint.eq_from_names(sk.get_space(), {1: 0, "ink": 1})
tuds = tuds.add_constraint(c)
sk = sk.union(tuds)
print sk
fsloop = iscc.iscc_communicate("L :=" + str(sk) + "; codegen L;")
nloop = fsloop.split('\n')
nloop = tiling_v3.postprocess_loop(nloop)
lines = fs_pragma(nloop)
#Dodatek[2]+1 shift + 1 for k
#if extend first shift shoud be one smaller
if (Extend):
sh = 1
else:
sh = 0
loop = imperf_tile.RestoreStatements(lines, Dodatek[0], Dodatek[1],
Dodatek[2] + 1, Dodatek[3],
Dodatek[5], sh)
text_file = open(Dodatek[4], "w")
text_file.write(loop)
text_file.close()
return ""
def tile(plik,
block,
permute,
output_file="",
L="0",
SIMPLIFY="False",
perfect_mode=False,
parallel_option=False,
rplus_file=''):
SIMPLIFY = False
DEBUG = True
schedule_mode = parallel_option
#print "********** another version **************"
LPetit = "tmp/tmp_petit" + L + ".t"
LDeps = "tmp/deps" + L + ".txt"
# strong perfect
if (DEBUG):
if perfect_mode:
print 'Perfectly nested loop mode: enabled'
simpl_ub = False
BLOCK = block.split(',')
par_tiling = False
for i in range(len(BLOCK), 10):
BLOCK.append(BLOCK[len(BLOCK) - 1])
if (not BLOCK[1].isdigit()):
par_tiling = True
linestring = open(plik, 'r').read()
lines = linestring.split('\n')
if simpl_ub:
petit_loop = convert_loop.convert_loop(lines, BLOCK)
else:
petit_loop = convert_loop.convert_loop(lines)
file = open(LPetit, 'w')
imperf = 0
endloop = 0
startloop = 0
for line in petit_loop:
#sprawdz przy okazji jaka petla idealnie czy nie
if 'for' in line and not 'endfor' in line:
if startloop == 2:
imperf = 1
startloop = 1
else:
if startloop == 1:
startloop = 2
if 'endfor' in line:
endloop = 1
if endloop == 1 and 'endfor' not in line and not line.isspace(
) and line != '':
imperf = 1
file.write(line + '\n')
file.close()
cmd = gen.path_petit + " " + LPetit + " > " + LDeps
process = subprocess.Popen(cmd, shell=True, stdout=subprocess.PIPE)
process.wait()
lines = linestring.split('\n')
stuff = []
for_level = 0
for line in lines:
if 'endfor' in line:
for_level = for_level - 1
else:
if 'for' in line:
if simpl_ub:
stuff.append(functions.Loop(line, BLOCK[for_level]))
else:
stuff.append(functions.Loop(line))
for_level = for_level + 1
# na podstawie stuff zbuduj tablice inkrementacji i dekremnatacji poziomu
#if(schedule_mode == 0):
# flag = 1
#else:
flag = 1
# Proba prywatyzacji zmiennych w instrukcjach w gniazdach
priv_stuff = priv_engine.PrivEng(LDeps)
priv_box = 1
if (imperf == 0):
priv_box = 1
dane = []
sts = imperf_tile.Get_ST(LPetit, dane)
dane = dane + sts
combo = loop_tools.ReadStatementNests(LPetit, dane)
instrukcje = combo[0]
for pp in priv_stuff[3]:
for i in instrukcje:
a = set(i['st'])
b = set(pp[1])
if (a & b) and (
b -
a): # nie wszystkie instrukcje skalara sa w gniezdzie
priv_box = 0
# ==========
# jesli zmienne prywatne sa w obrebie jednego S1 to mozna
start = time.time()
if ((imperf == 0 and priv_box == 0)):
dane = gen.RelPrint(LPetit, flag)
else:
if (len(priv_stuff[1]) > 0):
dane = gen.RelPrint_WithPriv(LPetit, priv_stuff[1])
else:
dane = gen.RelPrint(LPetit, flag)
output = process.stdout.read()
end = time.time()
elapsed = end - start
print "Dependence analysis: time taken: ", elapsed, "seconds."
if (DEBUG):
print dane
dane = dane.split("#")
rel = dane[0]
rel2 = rel
print rel
dane.remove(rel)
dane = list(set(dane))
if (DEBUG):
print rel
# Create LD
Dependence.Create_LD_petit(L, petit_loop)
# -------------------------------------------------------
# script for barvinok
# gdy nie ma zaleznosci
# problemy do rozwiazania
# zmienne symboliczne nie wiadomo skad wziasc
# numery instrukcji
nodeps = 0
if (rel == ''):
nodeps = 1
LD_inp = "tmp/LD_petit_loop_" + L + ".t"
dane2 = gen.RelPrint(LD_inp, 1)
dane2 = dane2.split("#")
rel2 = dane2[0]
try:
isl_rel2 = isl.Map(str(rel2))
isl_symb = isl_rel2.get_var_names(isl.dim_type.param)
symb = isl_symb
except:
print "Internal error."
sys.exit()
rel = "[" + ",".join(symb) + "] -> {["
for i in range(0, len(stuff)):
rel = rel + "i" + str(i) + ","
rel = rel + "v] -> ["
for i in range(0, len(stuff)):
rel = rel + "i" + str(i) + "',"
rel = rel + "v'] : false }"
#loop_tools.MakeLDPetit("tmp/tmp_petit.t", "tmp/tmp_ld_petit.t")
#dane2.remove(rel2)
#dane2 = list(set(dane2))
#for i in range(0, len(dane2)):
# dane2[i] = str(int(dane2[i]) - 1)
for s in dane:
if "UNKNOWN" in s:
dane.remove(s)
# dodaj dane bez relacji
sts = imperf_tile.Get_ST(LPetit, dane)
dane = dane + sts
combo = loop_tools.ReadStatementNests(LPetit, dane)
instrukcje = combo[0]
nest_loop = combo[1]
if len(instrukcje) == 0:
print 'blad - brak instrukcji'
sys.exit()
# wczytaj wszystkie
# eksperymentalnie kasowanie innych poziomow
stuff_reduced = stuff[:] #osobna kopia
do_kas = []
for i in range(1, max(nest_loop) + 1):
dups = duplicates(nest_loop, i)
for s in dups:
if s != min(dups):
do_kas.append(s)
for item in do_kas:
stuff_reduced[item] = '!'
for i in range(0, stuff_reduced.count('!')):
stuff_reduced.remove('!') # remove
# -------------------------------
global maxl
maxl = 0
for item in instrukcje:
if item['max_loop'] > maxl:
maxl = item['max_loop']
start = time.time()
tmp_st = []
if (perfect_mode):
firstst = str(instrukcje[0]['st'][0])
#print rel
rel = re.sub(r"v = \d+", "v = " + firstst, rel)
rel = re.sub(r"v' = \d+", "v' = " + firstst, rel)
#print rel
tmp_st = instrukcje[0]['st']
instrukcje[0]['st'] = [instrukcje[0]['st'][0]]
#print instrukcje[0]['st']
# wywal reszte zapisz gdzies tablice
# exit(1)
# strong perfect mode
isl_rel = isl.Map(str(rel))
isl_ident = isl_rel.identity(isl_rel.get_space())
# k6 only
#print isl_rel
#rel_plus = isl_rel.transitive_closure()[0]
#isl_rel = isl_rel.subtract(rel_plus.apply_range(isl_rel))
#rel = isl.Map(str("{[i,j,v]->[i,j',v]}"))
#isl_rel = isl_rel.subtract(rel)
#print isl_rel
#exit(0)
# -------------
if (perfect_mode):
if (DEBUG):
print "Removing internal dependences for perfect nested loop"
isl_rel = isl_rel.subtract(isl_ident)
if (DEBUG):
print isl_rel
z = isl_rel.dim(isl.dim_type.out)
zz = maxl - z + 1
if (zz > 0):
if (DEBUG):
print "Error. Dimensions of dependencies are not equal to an amount of loop nests"
print "Relations will be extended."
isl_rel = isl_rel.insert_dims(isl.dim_type.in_, z - 1, zz)
isl_rel = isl_rel.insert_dims(isl.dim_type.out, z - 1, zz)
# jesli ktorys z blokow ma 1 wywal te zaleznosci
# w slicgu mozna tak jesli zewn petla tylko zapisuje zmienne prywatne
if (BLOCK[0] == '1' and schedule_mode == 0):
z = isl_rel.dim(isl.dim_type.out)
rtmp = "{["
for i in range(0, z):
rtmp = rtmp + "i" + str(i) + ","
rtmp = rtmp[:-1] + "] -> ["
for i in range(0, z):
rtmp = rtmp + "o" + str(i) + ","
rtmp = rtmp[:-1] + "] : i0 = o0 };"
rtmp = isl.Map(rtmp)
isl_rel = isl_rel.intersect(rtmp).coalesce()
# lata na petle ktore nie ma w relacjach
#if maxl > isl_rel:
start = time.time()
if (DEBUG):
print '!!!!!!!!!!'
# **************************************************************************
exact_rplus = '-1'
islrp = False
isl_relclosure = isl_rel
if (rplus_file != ''):
with open(rplus_file, "r") as myfile:
data = myfile.read().replace('\n', '')
isl_relclosure = isl.Map(str(data))
else:
if islrp:
isl_relclosure = isl_rel.transitive_closure()
exact_rplus = isl_relclosure[1]
isl_relclosure = isl_relclosure[0]
else:
isl_relclosure = relation_util.oc_IterateClosure(isl_rel)
exact_rplus = True
isl_relplus = isl_relclosure
end = time.time()
elapsed = end - start
print "Transitive closure: time taken: ", elapsed, "seconds."
isl_ident = isl_rel.identity(isl_rel.get_space())
if (DEBUG):
print 'R+'
print isl_relclosure
#isl_relclosure = rpp
print "!! exact_rplus " + str(exact_rplus)
isl_relclosure = isl_relclosure.union(isl_ident).coalesce() # R* = R+ u I
if (_debug_):
if (DEBUG):
print "R*"
print isl_relclosure
print exact_rplus
# **************************************************************************
isl_symb = isl_rel.get_var_names(isl.dim_type.param)
symb = isl_symb
end = time.time()
if (DEBUG):
print end - start
vars = [] # i
exvars = [] # ii'
sym_exvars = [] # ii
varsprim = [] # i'
par_vars = [] # iib
p_vars = [] #iib bez plusa lb
p_symb = []
im_par_vars = []
# moze warto do iloczynu dodac lb a do floor N - lb
# do testowania +'+'+s['lb']
i = 0
for s in stuff_reduced:
vars.append(s['var'])
sym_exvars.append(s['var'] * 2)
exvars.append(s['var'] * 2 + "'")
varsprim.append(s['var'] + "'")
if par_tiling:
par_vars.append(s['var'] * 2 + 'b' + '+' + s['lb'])
p_vars.append(s['var'] * 2 + 'b')
else:
par_vars.append(s['var'] * 2 + "*" + BLOCK[i] + '+' + s['lb'])
i = i + 1
# codegen.calculate_position(1, instrukcje, len(sym_exvars))
for s in stuff:
if s['var'] in vars:
i = vars.index(s['var'])
if par_tiling:
im_par_vars.append(s['var'] * 2 + 'b' + '+' + s['lb'])
else:
im_par_vars.append(s['var'] * 2 + "*" + BLOCK[i] + '+' +
s['lb'])
_SYM = ""
for s in sym_exvars:
_SYM = _SYM + s + ","
for i in range(len(vars), 10):
BLOCK.pop()
if (par_tiling):
for s in p_vars:
_SYM = _SYM + s + ","
p_symb.append(s)
for s in set(BLOCK): #remove duplicates
_SYM = _SYM + s + ","
p_symb.append(s)
for s in symb:
_SYM = _SYM + s + ","
# wektory same 0 - mozesz dac parallel
# prywatyzuj calosc, tam gdzie zapis seq, same 0 to parallel bloki (tylko odczyt)
par_tiled = 0
delta = isl_rel.deltas()
chkc = isl.Set("{[0," + ",".join(vars) + "]}")
delta = delta.subtract(chkc)
if (delta.is_empty()):
par_tiled = 1
if (DEBUG):
print "Parallel tiling detected."
########################################################################
cl = clanpy.ClanPy()
cl.loop_path = plik
cl.Load()
cl.RunCandl()
j = 0
if (len(cl.statements) > 0):
for i in range(0, len(instrukcje)):
instrukcje[i]['scatter'] = cl.statements[j].scatering[:]
j = j + len(instrukcje[i]['st'])
Rapply = GetRapply(vars, sym_exvars, _SYM)
isl_TILE = []
isl_TILE_LT = []
isl_TILE_GT = []
isl_TILE1 = []
isl_TILE2 = []
isl_TILEprim = []
isl_TILEbis = []
isl_TILEorig = []
permutate_list = []
permutate_maps = []
FFF_lines = []
FFF_idx = []
FFF_headers = []
FFF_headers_idx = []
for i in range(0, len(instrukcje)):
Bij = MakeBij(_SYM, vars, sym_exvars, im_par_vars, stuff, BLOCK,
instrukcje[i], par_tiling)
print Bij
print "oooooooooooooooooooooooooooooooooooooooooooooooooooo"
isl_TILE.append(isl.Set(str(Bij).replace("_Bij := ", "")))
if (DEBUG):
print 'T --------------------------------------------'
print stuff
print isl_TILE[i]
# oblicz II_SET
if (False):
if (len(symb) > 0):
ii_set = '[' + ','.join(symb) + '] -> '
else:
ii_set = ''
ii_set = ii_set + '{[' + ','.join(sym_exvars) + '] : '
for l in range(0, len(sym_exvars)):
ii_set = ii_set + sym_exvars[l] + ' >= 0 and '
ii_set = ii_set + BLOCK[l] + '*' + sym_exvars[
l] + ' + ' + stuff[l]['lb'] + ' <= ' + stuff[l][
'ub'] + ' and '
ii_set = ii_set + ' 1=1}'
if (DEBUG):
print ii_set
ii_set = isl.Set(ii_set)
if (DEBUG):
print 'II_SET ' + str(ii_set)
print 'CARD II_SET ' + test_isl.StringToCard(str(ii_set))
# ------------------------------
bltc = 0 # czy juz liczono blt
bgtc = 0 # -- || -- bgt
for j in range(0, len(instrukcje)):
BLGT = MakeBLTandBGT_v2(
_SYM, vars, sym_exvars, im_par_vars, varsprim, exvars, stuff,
BLOCK, instrukcje[j], instrukcje[i],
par_tiling) # porownaj zagniezdzenia instrukcji
if (DEBUG):
print '-------LT ----------'
print BLGT[0]
print '-------GT ----------'
print BLGT[1]
print BLGT[0]
isltmp = isl.Set(str(BLGT[0]).replace("_BLT := ", ""))
if (bltc == 0):
print isltmp
sys.exit(0)
isl_TILE_LT.append(isltmp)
bltc = 1
else:
isl_TILE_LT[i] = isl_TILE_LT[i].union(isltmp).coalesce()
isltmp = isl.Set(str(BLGT[1]).replace("_BGT := ", ""))
if (bgtc == 0):
isl_TILE_GT.append(isltmp)
bgtc = 1
else:
isl_TILE_GT[i] = isl_TILE_GT[i].union(isltmp).coalesce()
if (DEBUG):
print "s" + str(i)
print "LT"
print isl_TILE_LT[i]
print "GT"
print isl_TILE_GT[i]
X = isl_TILE_GT[i].apply(isl_relclosure).coalesce()
isl_BCUR = isl_TILE[i].subtract(X).coalesce()
isl_TILE1.append(isl_BCUR)
if (DEBUG):
print '---------bcur-----'
print isl_BCUR.apply(isl_relclosure)
isl_BPREV = isl_BCUR.apply(isl_relclosure).intersect(
isl_TILE_LT[i]).coalesce()
isl_BPREV = isl_BPREV.subtract(
X).coalesce() # changed according to ACM TOPLAS reviewer
if (DEBUG):
print isl_BPREV
print '---'
isl_TILE2.append(isl_BPREV)
#isl_TILEprim.append(isl_TILE1[i])
isl_TILEprim.append(isl_TILE1[i].union(isl_TILE2[i]).coalesce())
#poprawka intersect z IS - EKSPERYMENTALNA !!!!
IS = getIS(plik, isl_rel, dane)
DOMRAN = isl_rel.domain().union(isl_rel.range()).coalesce()
INDDD = IS.subtract(DOMRAN).coalesce()
if (DEBUG):
print '----------'
print INDDD
print IS
#print IS
# sys.exit(0)
#isl_TILEprim[i] = isl_TILEprim[i].intersect(IS).coalesce()
#for ll in range(0,i):
# isl_TILEprim[i] = isl_TILEprim[i].subtract(isl_TILEprim[ll]).coalesce()
#############################
print '^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^'
#isl_TILEprim.append(isl_TILE[i])
# print isl_TILEprim[0]
isl_TILEbis.append(
Project(isl_TILEprim[i].apply(Rapply).coalesce(),
sym_exvars).coalesce())
isl_TILEorig.append(
Project(isl_TILE[i].apply(Rapply).coalesce(),
sym_exvars).coalesce())
############################################################################
if (par_tiling):
idx_bylo = []
if (len(symb) > 0):
S = "[" + ",".join(symb) + ","
else:
S = "["
S1 = "{[" + ",".join(sym_exvars) + "," + ",".join(vars) + ",v] :"
for j in range(0, len(instrukcje[i]['path'])):
idx = str(instrukcje[i]['path'][j])
liniabb = " = floord(" + stuff[instrukcje[i]['path'][j]][
'ub'] + "-" + stuff[instrukcje[i]['path']
[j]]['lb'] + " ," + BLOCK[j] + ");"
if 1 == 1 or liniabb not in FFF_headers: # always true,
FFF_headers.append(liniabb)
FFF_headers_idx.append(idx)
linia = "int fff" + idx + liniabb
linia = linia.replace("floord( ", "floord(")
FFF_lines.append(linia)
else:
idx = FFF_headers_idx[FFF_headers.index(liniabb)]
if str({'id': idx, 'j': j}) not in FFF_idx:
FFF_idx.append({'id': idx, 'j': j})
if idx not in idx_bylo:
S = S + "fff" + idx + ","
idx_bylo.append(idx)
S1 = S1 + " " + sym_exvars[j] + "<= fff" + idx + " and "
S = S[:-1] + "] -> " + S1 + " true }"
if (DEBUG):
print S
S = isl.Set(S)
isl_TILEbis[i] = isl_TILEbis[i].intersect(S).coalesce()
#########################################################################
if (permute):
RP = imperf_tile.PermuteBlock(LDeps,
isl_TILEprim[i], instrukcje[i], symb,
len(sym_exvars), permutate_list)
if (isinstance(RP, isl.Map)):
print "Permutation experimental enabled:"
permutate_maps.append(RP)
isl_TILEprim[i] = isl_TILEprim[i].apply(RP)
#print isl_TILEprim[i]
if (_debug_):
if (DEBUG):
print "TILE"
print isl_TILE[i]
print "TILE_LT"
print isl_TILE_LT[i]
print "TILE_GT"
print isl_TILE_GT[i]
print "TILE_ITR (TILE1)"
print isl_TILE1[i]
print "TVLD_LT (TILE2)"
print isl_TILE2[i]
print "TILE_VLD (TILE')"
print isl_TILEprim[i]
# print "card"
# print test_isl.StringToCard(str(isl_TILEprim[i]))
print "TILE_VLD_ext (TILE'')"
print isl_TILEbis[i]
# correct upper bounds for simpl_ub
if simpl_ub:
cor_set = ''
if (len(symb) > 0):
cor_set = '[' + ','.join(symb) + '] -> '
else:
cor_set = ''
cor_set = cor_set + '{[' + ','.join(sym_exvars) + ',' + ','.join(
vars) + ',' + 'v] : '
for j in range(0, len(instrukcje[i]['path'])):
cor_set = cor_set + vars[j] + " <= " + stuff[
instrukcje[i]['path'][j]]['ub'] + " - " + BLOCK[j] + " && "
cor_set = cor_set + "("
for v in instrukcje[i]['st']:
cor_set = cor_set + " v = " + str(v) + " or"
cor_set = cor_set[:-2] + ")}"
cor_set = isl.Set(cor_set)
#print cor_set
#sys.exit(0)
isl_TILEbis[i] = isl_TILEbis[i].intersect(cor_set).coalesce()
isl_TILEorig[i] = isl_TILEorig[i].intersect(cor_set).coalesce()
if (SIMPLIFY):
isl_TILEbis[i] = imperf_tile.SimplifySlice(isl_TILEbis[i])
#print "TILE''" + "dla s" + str(i) + "\n" + str(isl_TILEbis[i])
#eksepeymentalnie dodaj pozycje do tilebis jesli wiele gniazd na roznych poziomach
Extend = False
if (imperf == 1):
Extend = True
#Extend = MultiNest(instrukcje)
#Extend = True
#print imperf
#vis3dimperf.imperf_vis(isl_TILEbis, isl_rel)
_rap = GetRapply4(vars, sym_exvars, _SYM, instrukcje, 0)
print _rap
#vis.Vis(isl_TILEbis[0], stuff, cl.deps, isl.Set(cl.statements[0].domain_map), True)
#sys.exit(0)
# zne takie jak z ale bez ext
if (Extend):
z = isl_TILEbis[0].apply(_rap)
zne = isl_TILEbis[0]
else:
z = isl_TILEbis[0]
for j in range(1, len(isl_TILEbis)):
_rap = GetRapply4(vars, sym_exvars, _SYM, instrukcje, j)
print _rap
if (DEBUG):
print _rap
if (Extend):
z = z.union(isl_TILEbis[j].apply(_rap))
zne = zne.union(isl_TILEbis[j])
else:
z = z.union(isl_TILEbis[j])
if (not Extend):
zne = z
print z
# -----------------------------------------------------------------
_rap = GetRapply4(vars, sym_exvars, _SYM, instrukcje, 0)
if (Extend):
zorig = isl_TILEorig[0].apply(_rap)
else:
zorig = isl_TILEorig[0]
for j in range(1, len(isl_TILEorig)):
_rap = GetRapply4(vars, sym_exvars, _SYM, instrukcje, j)
if (Extend):
zorig = zorig.union(isl_TILEorig[j].apply(_rap))
else:
zorig = zorig.union(isl_TILEorig[j])
zorig = zorig.coalesce()
# ---------------------------------------------------------------
z = z.coalesce()
z = z.remove_redundancies()
z = z.detect_equalities()
# z = imperf_tile.SimplifySlice(z)
#calculate II_SET
ii_SET = z.remove_dims(isl.dim_type.set,
int(isl_TILEbis[i].dim(isl.dim_type.set) / 2),
int(isl_TILEbis[i].dim(isl.dim_type.set) /
2)).coalesce()
if (_debug_):
print "II_SET"
print ii_SET
step = 0
if Extend:
step = 1
nazwa = ""
nazwapar = ""
filePaths = glob.glob(plik)
if (output_file != ""):
nazwa = output_file
nazwapar = output_file
else:
for filePath in filePaths:
base = os.path.basename(filePath)
nazwa = os.path.splitext(base)[0] + "_tiling" + os.path.splitext(
base)[1]
nazwapar = os.path.splitext(
base)[0] + "_partiling" + os.path.splitext(base)[1]
if (perfect_mode):
if (DEBUG):
print z
chang = str(tmp_st[0]) + "]"
if (DEBUG):
print chang
for i in range(1, len(tmp_st)):
zz = str(z).replace(chang, str(tmp_st[i]) + "]")
zz = isl.Set(zz)
z = z.union(zz).coalesce()
instrukcje[0]['st'] = tmp_st # correct statements
#z1 = isl.Set('[n,b] -> {[i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11,i12,i13] : n+2 = 2*b && b > 2 && n > 8 }')
# z1 = isl.Set('[n,b] -> {[i3,i4,i5,i6,i9,i10,i11,i12,i13] : n+2 = 2*b && b > 2 && n > 8 }')
#z = z.intersect(z1)
if (not schedule_mode or par_tiled):
print "Cloog start..."
start = time.time()
isl_ast = False
barv = 1
if (barv == 1):
if (isl_ast):
loop_x = iscc.isl_ast_codegen(z)
else:
loop_x = iscc.iscc_communicate("L :=" + str(z) +
"; codegen L;")
else: #cloog
#loop_x = codegen.tile_gen_short(vars, sym_exvars, symb,z,instrukcje, Extend)
with open('loopx', "r") as myfile:
loop_x = myfile.read()
#loop_x = iscc.oc_communicate(z)
#loop_x = codegen.tile_gen(vars, sym_exvars, symb, isl_TILEbis, instrukcje, "", [], stuff)
end = time.time()
elapsed = end - start
print "Code generation: time taken: ", elapsed, "seconds."
########################################################################
loop_x = postprocess_loop(loop_x.split('\n'))
loop = loop_x
lines = loop.split('\n')
loop = imperf_tile.RestoreStatements(lines, LPetit, dane, maxl, step,
permutate_list)
if par_tiled:
loop = "#pragma omp parallel for\n" + loop
for i in range(0, 5):
if (loop[-1] == '\n'):
loop = loop[:-1]
loop = loop + "\n"
new_gen = True
if (not new_gen):
gen.ParsePrint2("tmp/tmp_petit.t", len(sym_exvars))
if (new_gen):
text_file = open(nazwa, "w")
text_file.write(loop)
text_file.close()
if par_tiling:
lines = FFF_lines + correct.Korekta(nazwa)
for i in range(0, len(lines)):
if "for" in lines[i] and "fff" in lines[i]:
reg = re.compile("\=.*")
linia = reg.sub("", lines[i])
reg = re.compile(".*\(")
cc = reg.sub("", linia)
cc = cc.replace(" ", "")
for FF_item in FFF_idx:
if "fff" + FF_item['id'] in lines[i]:
lines[i] = lines[i] + "\n" + correct.whites(
lines[i]) + " register int " + sym_exvars[
FF_item['j']] + "b = " + BLOCK[
FF_item['j']] + "*" + cc + ";"
break
lines[i] = lines[i] + "\n"
text_file = open(nazwa, "w")
text_file.writelines(lines)
text_file.close()
if schedule_mode:
text_file = open(nazwapar, "w")
text_file.writelines(lines)
text_file.close()
if (output_file != ""):
return ""
if (not schedule_mode and 1 == 0):
rtile = tiling_schedule.get_RTILE(z, sym_exvars, isl_rel,
Extend)
print "RTILE:"
print rtile
tiling_schedule.get_RCYCLE(rtile, 0)
rtileorig = tiling_schedule.get_RTILE(zorig, sym_exvars,
isl_rel, Extend)
print "RTILE_ORIG:"
print rtileorig
tiling_schedule.get_RCYCLE(rtileorig, 1)
# =====================================================================================================================
# PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Dodatek = [
LPetit, dane, maxl, step, nazwapar, permutate_list, permutate_maps
]
par_tiled = 0
if (DEBUG):
print '!!!!'
print zorig
if (schedule_mode and par_tiled != 1):
if (False):
tiling_schedule.tile_par(isl_TILEprim, isl_TILEbis, sym_exvars,
symb, isl_rel, isl_relplus,
isl_relclosure)
else:
# Rk
#tiling_schedule.tile_par3(z, sym_exvars, isl_rel, isl_relplus, isl_relclosure, Extend, _rap, Dodatek,SIMPLIFY, ii_SET)
# fsnew
rtile = tiling_schedule.get_RTILE(zne, sym_exvars, isl_rel, False)
#rtileplus = rtile.transitive_closure()
rapp = _rap
rapp = rapp.remove_dims(isl._isl.dim_type.in_, 0, len(sym_exvars))
rapp = rapp.remove_dims(isl._isl.dim_type.out, 0,
len(sym_exvars) * 2)
if not Extend:
z = z.apply(_rap)
fsnew_tiletry.fs_new(isl_rel, isl_relplus, rtile, LPetit, dane,
plik, SIMPLIFY, rapp, exact_rplus, z,
sym_exvars, maxl, step, isl_TILEprim, vars)
# przelec po blokach znajdz relacje jak nie ma to parallel
def sfs(plik, L=0, SIMPLIFY=False, fs=0, acc=False):
LPetit = "tmp/tmp_petit" + str(L) + ".t"
LDeps = "tmp/deps" + str(L) + ".txt"
linestring = open(plik, 'r').read()
lines = linestring.split('\n')
petit_loop = convert_loop.convert_loop(lines)
petit_loop.insert(0, "! start")
file = open(LPetit, 'w')
for line in petit_loop:
file.write(line + '\n')
file.close()
loop = Dependence.Kernel_Loop(LPetit)
#cmd = gen.path_petit + " " + LPetit + " > " + LDeps
#process = subprocess.Popen(cmd, shell=True, stdout=subprocess.PIPE)
#process.wait()
#dane = gen.RelPrint(LPetit, 1)
dane = loop.dane
isl_rel = loop.isl_rel
new_rel = relation_util.ReduceR(isl_rel)
#isl_rel = new_rel
#experimental
instrukcje = loop.instrukcje
# ------------------------
#dane2 = []
#sts = imperf_tile.Get_ST(LPetit, dane2)
#dane2 = dane2 + sts
#combo = loop_tools.ReadStatementNests(LPetit, dane2)
# Create LD
# isl_rel2 = Dependence.Create_LD_petit(str(L), petit_loop)
# ld_rel = isl_rel2.identity(isl_rel2.get_space())
# s1 = isl_rel2.domain()
# s2 = isl_rel2.range()
# s_all = s1.union(s2).coalesce()
# s1 = isl_rel.domain()
# s2 = isl_rel.range()
# s_rel = s1.union(s2).coalesce()
# ind = s_all.subtract(s_rel).coalesce()
# print ind
#sys.exit(0)
# ------------------------
#print dane
#dane = dane.split("#")
#rel = dane[0]
#dane.remove(rel)
#dane = list(set(dane))
#isl_rel = isl.Map(str(rel)).coalesce()
#print isl_rel
SQ = False
if (SQ):
#print isl_rel
RR = isl.Map("{[i,j,k,v] -> [i,j',k',v']}")
isl_rel = isl_rel.intersect(RR).coalesce()
#isl_rel = isl_rel.set_dim_name(isl.dim_type.in_, 0, "i")
#isl_rel = isl_rel.set_dim_name(isl.dim_type.out, 0, "i'")
#c= isl.Constraint.eq_from_names(isl_rel.get_space(), {"i": 1, "i'":-1})
#isl_rel = isl_rel.add_constraint(c).coalesce()
#rel_= isl.Map(str('{[i,j,k,v]->[i,jj,kk,v]}'))
#isl_rel = isl_rel.intersect(rel_).coalesce()
isl_relclosure = isl_rel.transitive_closure()
exact = isl_relclosure[1]
isl_relclosure = isl_relclosure[0]
isl_relplus = isl_relclosure
isl_ident = isl_rel.identity(isl_rel.get_space())
isl_relclosure = isl_relclosure.union(isl_ident).coalesce() # R* = R+ u I
# ------------------------------
vars = []
for i in range(0, isl_rel.dim(isl.dim_type.in_) - 1):
vars.append('i' + str(i))
rap = GetRapply(vars, instrukcje, len(instrukcje) - 1)
# ------------------------------
if (fs == 1):
fs_rk.fs_rk(isl_rel, isl_relplus, Create_UDS(isl_rel), LPetit, dane,
plik, SIMPLIFY, rap, acc, loop)
sys.exit()
if (fs == 2): # na samym R+
fs_new.fs_new(isl_rel, isl_relplus, isl_relclosure,
Create_UDS(isl_rel), LPetit, dane, plik, SIMPLIFY, rap,
acc, loop, exact)
sys.exit()
srepr = Create_Srepr(isl_rel, isl_relclosure)
rucs = srepr[1]
srepr = srepr[0]
#experimetnal
# !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
# srepr = srepr.union(ind).coalesce()
srepr_loop = iscc.iscc_communicate("L :=" + str(srepr) + "; codegen L;")
print srepr_loop
srepr_loop = srepr_loop.split('\n')
for i in range(0, len(srepr_loop)):
if "for" in srepr_loop[i]:
srepr_loop.insert(i, "#pragma omp parallel for")
break
st_reg = re.compile('\s*\(.*\);')
vecs = []
taby = []
for line in srepr_loop:
if (st_reg.match(line)):
vecs.append(isl.Set(iscc.s1_to_vec2(line, len(vecs))))
taby.append(iscc.correct.whites(line))
#print srepr_loop
rucs_s = rucs.transitive_closure()[0].coalesce()
for i in range(0, len(vecs)):
vecs[i] = isl_rel.domain().intersect(vecs[i]).coalesce()
slices = []
for vec in vecs:
slice = vec
if (not rucs.is_empty()):
slice_ = slice.apply(rucs_s)
slice = slice.union(slice_).coalesce()
slice = slice.apply(isl_relclosure)
if (SIMPLIFY):
slice = imperf_tile.SimplifySlice(slice)
slice = slice.apply(rap)
slices.append(slice.coalesce())
cmd = ""
for i in range(0, len(vecs)):
print slices[i]
cmd = cmd + "codegen " + str(slices[i]) + ';print "###";'
cmd = iscc.iscc_communicate(cmd)
cmd = cmd.split('"###"')
#print cmd
new_loop = []
i = 0
for line in srepr_loop:
if (st_reg.match(line)):
petla = cmd[i].split('\n')
for s in petla:
new_loop.append(taby[i] + s)
i = i + 1
else:
new_loop.append(line)
nloop = ""
for line in new_loop:
if line != '':
nloop = nloop + line + "\n"
nloop = nloop[:-1]
nloop = nloop.split('\n')
nloop = tiling_v3.postprocess_loop(nloop)
print nloop
lines = nloop.split('\n')
if (acc):
lines = openacc.CreateACCCode(lines, loop.var_st)
loop = imperf_tile.RestoreStatements(lines, LPetit, dane, 0, 1, [])
for i in range(0, 5):
if (loop[-1] == '\n'):
loop = loop[:-1]
loop = loop + "\n"
base = os.path.basename(plik)
nazwa = os.path.splitext(base)[0] + "_slicing" + os.path.splitext(base)[1]
text_file = open(nazwa, "w")
text_file.write(loop)
text_file.close()
print nazwa + ' was created.'
def fs_rk(rel, rel_plus, uds, LPetit, dane, plik, SIMPLIFY, rap, acc, loop):
aprox = 0
rk = rel.power() #Rk
if (rk[1] == 0):
print "rk approximated..."
aprox = 1
rk = rk[0].coalesce()
rk = isl.Map(iscc.RepairRk(str(rk), 0)) # przesun k do symb
sk = uds.apply(rk).subtract(uds.apply(rk).apply(rel_plus)).coalesce()
sq_sk = sk
sk = sk.insert_dims(isl.dim_type.set, 0, 1)
sk = sk.set_dim_name(isl.dim_type.set, 0, "ink")
c = isl.Constraint.eq_from_names(sk.get_space(), {"k": -1, "ink": 1})
sk = sk.add_constraint(c)
sk = tiling_v3.Project(sk, ["k"])
sq_sk2 = sk
SQ = False
if (SQ):
sk = get_sq(sq_sk, sq_sk2, uds)
else:
uds = uds.insert_dims(isl.dim_type.set, 0, 1)
uds = uds.set_dim_name(isl.dim_type.set, 0, "ink")
c = isl.Constraint.eq_from_names(sk.get_space(), {1: 0, "ink": 1})
uds = uds.add_constraint(c)
sk = sk.union(uds).coalesce()
#if(SIMPLIFY):
sk = imperf_tile.SimplifySlice(sk)
rap = rap.insert_dims(isl.dim_type.in_, 0, 1)
rap = rap.insert_dims(isl.dim_type.out, 0, 1)
rap = rap.set_dim_name(isl.dim_type.in_, 0, 'ik1')
rap = rap.set_dim_name(isl.dim_type.out, 0, 'ok1')
c = isl.Constraint.eq_from_names(rap.get_space(), {'ik1': -1, 'ok1': 1})
rap = rap.add_constraint(c)
rap = rap.coalesce()
#print rap
sk = sk.apply(rap)
print sk
if (aprox == 1):
if (sk.is_bounded()):
print "Approximation (no perfect FS) but Sk is bounded"
else:
print "Sk is not bounded. The result may not be valid!"
else:
print 'Rk exact'
if (sk.is_bounded()):
print 'Sk bounded.'
else:
print 'Sk NOT bounded'
nloop = iscc.iscc_communicate("L :=" + str(sk) + "; codegen L;")
# CODEGEN
nloop = tiling_v3.postprocess_loop(nloop.split('\n'))
lines = tiling_schedule.fs_pragma(nloop)
if (acc):
lines = openacc.CreateACCCode(lines, loop.var_st)
loop = imperf_tile.RestoreStatements(lines, LPetit, dane, 1, 1, [], 1)
for i in range(0, 5):
if (loop[-1] == '\n'):
loop = loop[:-1]
loop = loop + "\n"
base = os.path.basename(plik)
nazwa = os.path.splitext(base)[0] + "_fs" + os.path.splitext(base)[1]
text_file = open(nazwa, "w")
text_file.write(loop)
text_file.close()
print nazwa + ' was created.'
def tile(plik,
block,
permute,
output_file="",
L="0",
SIMPLIFY="False",
perfect_mode=False,
parallel_option=False,
rplus_mode='',
cpus=2):
print ''
print colored('/\__ _\ /\ == \ /\ __ \ /\ ___\ /\ __ \ ',
'green')
print colored('\/_/\ \/ \ \ __< \ \ __ \ \ \ \____ \ \ \/\ \ ',
'green')
print colored(' \ \_\ \ \_\ \_\ \ \_\ \_\ \ \_____\ \ \_____\ ',
'green')
print colored(' \/_/ \/_/ /_/ \/_/\/_/ \/_____/ \/_____/ ',
'green')
print ''
print ' An Automatic Parallelizer and Optimizer'
print 'based on the ' + colored('TRA', 'green') + 'nsitive ' + colored(
'C', 'green') + 'l' + colored('O',
'green') + 'sure of dependence graphs'
print ' traco.sourceforge.net '
print ''
DEBUG = True
AGGRESSIVE_SIMPLIFY = False # TODO simpl_ub
VALIDATION = 0 # levels
FSSCHEDULE = 1 # RTILE expermiental
INVERSE_TILING = 0
LPetit = "tmp/tmp_petit" + L + ".t"
BLOCK = block.split(',')
for i in range(len(BLOCK), 10):
BLOCK.append(BLOCK[len(BLOCK) - 1])
BLOCK2 = [0, 6, 6]
# BLOCK2 = BLOCK
linestring = open(plik, 'r').read()
lines = linestring.split('\n')
if AGGRESSIVE_SIMPLIFY:
petit_loop = convert_loop.convert_loop(lines, BLOCK2)
BLOCK2 = map(str, BLOCK2)
else:
petit_loop = convert_loop.convert_loop(lines)
file = open(LPetit, 'w')
imperf = 0
endloop = 0
startloop = 0
for line in petit_loop:
#sprawdz przy okazji jaka petla idealnie czy nie
if 'for' in line and not 'endfor' in line:
if startloop == 2:
imperf = 1
startloop = 1
else:
if startloop == 1:
startloop = 2
if 'endfor' in line:
endloop = 1
if endloop == 1 and 'endfor' not in line and not line.isspace(
) and line != '':
imperf = 1
file.write(line + '\n')
file.close()
start = time.time()
loop = Dependence.Kernel_Loop(LPetit)
loop.Load_Deps()
loop.Load_instrukcje()
loop.Preprocess('0')
loop.Get_Arrays()
end = time.time()
elapsed = end - start
print "Dependence analysis: time taken: ", elapsed, "seconds."
print colored('R', 'green')
print loop.isl_rel
print colored('domain R', 'green')
print loop.isl_rel.domain()
print colored('range R', 'green')
print loop.isl_rel.range()
IS = loop.isl_rel.domain().union(loop.isl_rel.range())
#s = IS.compute_schedule(loop.isl_rel, loop.isl_rel)
#print s
#sys.exit(0)
print loop.dane
cl = clanpy.ClanPy()
cl.loop_path = plik
cl.Load()
##################################
# move to clanpy
# combine clan with Dependence
arr = map(int, loop.dane)
arr = sorted(list(set(arr)))
i = 0
for i in range(0, len(cl.statements)):
cl.statements[i].petit_line = arr[i]
cl.statements[i].bounds = GetBounds(petit_loop,
cl.statements[i].petit_line,
BLOCK2, AGGRESSIVE_SIMPLIFY)
i = i + 1
############################################################
### R^+
isl_rel = loop.isl_rel
#for i in range(0, len(cl.statements)):
# print cl.statements[i].petit_line
start = time.time()
# **************************************************************************
RPLUSUNION = True
#RPLUSUNION = False # NESTED strong experimental with Pugh only Valid why?
exact_rplus = '-1'
isl_relclosure = isl_rel
if (RPLUSUNION):
islrp = True
if (rplus_mode == 'iterate'):
islrp = False
exact_rplus = True
if not isl_rel.is_empty() and rplus_mode != 'remote':
if islrp:
isl_relclosure = isl_rel.transitive_closure()
exact_rplus = isl_relclosure[1]
isl_relclosure = isl_relclosure[0]
else:
isl_relclosure = relation_util.oc_IterateClosure(isl_rel)
exact_rplus = True
else: #R_UNDER still experimental, requires testing
#############################################################################
print colored('R_UNDER', 'green')
stline = []
subgraphs = []
isl_relclosure = isl.Map('{[i]->[i] : 1=0}').coalesce()
for st in cl.statements:
stline.append(st.petit_line)
stline.sort()
for i in range(0, len(stline)):
w = 0
for sg in subgraphs:
if stline[i] in sg: # it was used
w = 1
if (w == 1):
continue
mylist = []
mylist.append(stline[i])
for j in range(i + 1, len(stline)):
cutrel = '{[' + ','.join([
"a%d" % l for l in range(0, loop.maxl)
]) + ',' + str(stline[i]) + ']->[' + ','.join([
"b%d" % l for l in range(0, loop.maxl)
]) + ',' + str(stline[j]) + '];'
cutrel += '[' + ','.join([
"a%d" % l for l in range(0, loop.maxl)
]) + ',' + str(stline[j]) + ']->[' + ','.join([
"b%d" % l for l in range(0, loop.maxl)
]) + ',' + str(stline[i]) + ']}'
cutrel = isl.Map(cutrel)
cutrel = isl_rel.intersect(cutrel).coalesce()
if not cutrel.is_empty():
mylist.append(stline[j])
#mylist.append(maxst)
subgraphs.append(mylist)
print subgraphs
for item in stline:
count = 0
for sg in subgraphs:
if item in sg:
count = count + 1
if count > 1 and item != max(stline):
print 'R_UNDER untested, switch RPLUSUNION to true'
#exit(1)
ii = 0
for sg in subgraphs: # calculate R_UNDER and its R+
ii = ii + 1
print str(ii) + "/" + str(len(subgraphs))
grel = '{'
for i in sg:
for j in sg:
grel += '[' + ','.join([
"a%d" % l for l in range(0, loop.maxl)
]) + ',' + str(i) + ']->[' + ','.join(
["b%d" % l
for l in range(0, loop.maxl)]) + ',' + str(j) + '];'
grel += '}'
grel = isl.Map(grel)
grel = isl_rel.intersect(grel).coalesce()
gp = grel.transitive_closure()
if not gp[1]:
print "NOT EXEACT R+"
# print "iterate required"
# gp = relation_util.oc_IterateClosure(grel) # iterate
#else:
gp = gp[0]
if isl_relclosure.is_empty():
isl_relclosure = gp
else:
isl_relclosure = isl_relclosure.union(gp).coalesce()
#############################################################################
if rplus_mode == 'remote':
isl_relclosure, exact_rplus = agent.remote_tc(isl_rel)
# **************************************************************************
isl_relplus = isl_relclosure
print 'Rplus before'
print isl_relplus
# lata Pugh - eksperymentalnie
#isl_rel = isl_rel.subtract(isl_relplus.apply_range(isl_rel))
print isl_rel
#isl_relclosure = isl_rel.transitive_closure()[0]
#isl_relplus = isl_relclosure
# ---------
print 'Rplus after'
print isl_relplus
end = time.time()
elapsed = end - start
print "Transitive closure: time taken: ", elapsed, "seconds."
isl_ident = isl_rel
if not isl_rel.is_empty:
isl_ident = isl_rel.identity(isl_rel.get_space())
if (DEBUG and 1 == 0):
print 'R+'
print isl_relclosure
#isl_relclosure = rpp
if (DEBUG):
color = 'red'
if (exact_rplus):
color = 'yellow'
print colored("!! exact_rplus " + str(exact_rplus), color)
isl_relclosure = isl_relclosure.union(isl_ident).coalesce() # R* = R+ u I
if (INVERSE_TILING):
isl_relclosure = isl_relclosure.fixed_power_val(-1).coalesce()
if (DEBUG):
print colored("R*", 'green')
print isl_relclosure
# **************************************************************************
start = time.time()
B = (["b%d" % i for i in range(0, loop.maxl)])
vars = []
for st in cl.statements:
if (len(st.original_iterators) == loop.maxl):
vars = st.original_iterators
break
if (len(vars) == 0):
print 'error 12, propably clan does not work'
exit(12)
# TODO to make abstract variubles bounds with variables must be also corrected
sym_exvars = []
sym_exvars_p = []
print vars
for v in vars:
sym_exvars.append(v * 2)
sym_exvars_p.append(v * 2 + 'p')
if (DEBUG and 1 == 0):
print sym_exvars
print vars
isl_symb = isl_rel.get_var_names(isl.dim_type.param)
BLOCK = block.split(',')
for i in range(len(BLOCK), 10):
BLOCK.append(BLOCK[len(BLOCK) - 1])
# **************************************************************************
TILE = [] #isl
TILE_STR = [] #string
for st in cl.statements:
if len(isl_symb) == 0:
isl_symb = isl.Map(st.domain_map).get_var_names(isl.dim_type.param)
tile = MakeTile(st, vars, sym_exvars, isl_symb, B)
tile = ReplaceB(tile, BLOCK)
TILE_STR.append(tile)
tile = isl.Set(tile)
# if statements before st
domainv = isl.Set(st.domain_map)
print domainv
#if len(TILE) == 0:
# domainv = isl.Set('[N] -> {[i, j, k, m]: N > 0 and 0 <= i <= -2 + N and 2 + i <= j < N and i < k <= -2 + j and k < m <= -3 - i + j + k and m < j and k < m and j-m < 30}')
dimdom = domainv.dim(isl.dim_type.set)
domainv = domainv.insert_dims(isl.dim_type.set, dimdom,
loop.maxl + 1 - dimdom)
tile = tile.intersect(domainv).coalesce()
TILE.append(tile)
if (DEBUG):
DebugPrint('TILE', TILE, cl.statements)
# **************************************************************************
TILE_LT = []
TILE_GT = []
for i in range(0, len(cl.statements)):
TILE_LT_I = ''
TILE_GT_I = ''
for j in range(0, len(cl.statements)):
l = CompareScat(cl.statements[i].scatering,
cl.statements[j].scatering, len(vars))
tile_j = TILE_STR[j]
PARTS = tile_j.split(':')
for k in range(0, len(sym_exvars)):
PARTS[1] = PARTS[1].replace(sym_exvars[k], sym_exvars_p[k])
PARTS[1] = PARTS[1].replace('}', ')}')
lex_s_lt = MakeCustomLex(
sym_exvars, sym_exvars_p, 'LT', l,
cl.statements[i].petit_line > cl.statements[j].petit_line)
lex_s_gt = MakeCustomLex(
sym_exvars, sym_exvars_p, 'GT', l,
cl.statements[i].petit_line < cl.statements[j].petit_line)
join_LT = ': exists ' + ','.join(
sym_exvars_p) + ' : ( ' + lex_s_lt
join_GT = ': exists ' + ','.join(
sym_exvars_p) + ' : ( ' + lex_s_gt
TILE_LT_IJ = PARTS[0] + join_LT + PARTS[1]
TILE_GT_IJ = PARTS[0] + join_GT + PARTS[1]
#print TILE_LT_IJ
TILE_LT_IJ = isl.Set(TILE_LT_IJ)
TILE_GT_IJ = isl.Set(TILE_GT_IJ)
if (j == 0):
TILE_LT_I = TILE_LT_IJ
TILE_GT_I = TILE_GT_IJ
else:
TILE_LT_I = TILE_LT_I.union(TILE_LT_IJ).coalesce()
TILE_GT_I = TILE_GT_I.union(TILE_GT_IJ).coalesce()
TILE_LT.append(TILE_LT_I)
TILE_GT.append(TILE_GT_I)
if (DEBUG):
DebugPrint('TILE_LT', TILE_LT, cl.statements)
DebugPrint('TILE_GT', TILE_GT, cl.statements)
if (INVERSE_TILING):
tmpx = TILE_LT[:]
TILE_LT = TILE_GT
TILE_GT = tmpx
# **************************************************************************
TILE_ITR = []
for i in range(0, len(cl.statements)):
if not isl_relclosure.is_empty():
TILE_ITRI = TILE[i].subtract(
TILE_GT[i].apply(isl_relclosure)).coalesce()
else:
TILE_ITRI = TILE[i]
if (SIMPLIFY):
TILE_ITRI = imperf_tile.SimplifySlice(TILE_ITRI)
TILE_ITR.append(TILE_ITRI)
#print 'R+(TILE_GT)*TILE[i]'
#print i
# print TILE_GT[i].apply(isl_relclosure).intersect(TILE[i])
if (DEBUG):
DebugPrint('TILE_ITR', TILE_ITR, cl.statements)
# **************************************************************************
TVLD_LT = []
if not isl_relclosure.is_empty():
for i in range(0, len(cl.statements)):
TVLD_LTI = (TILE_LT[i].intersect(
TILE_ITR[i].apply(isl_relclosure))).subtract(
TILE_GT[i].apply(isl_relclosure)).coalesce()
TVLD_LT.append(TVLD_LTI)
if (DEBUG):
DebugPrint('TVLD_LT', TVLD_LT, cl.statements)
# **************************************************************************
TILE_VLD = []
for i in range(0, len(cl.statements)):
if not isl_relclosure.is_empty():
TILE_VLDI = TVLD_LT[i].union(TILE_ITR[i]).coalesce()
else:
TILE_VLDI = TILE_ITR[i]
if (SIMPLIFY):
TILE_VLDI = imperf_tile.SimplifySlice(TILE_VLDI)
TILE_VLD.append(TILE_VLDI)
if (DEBUG):
DebugPrint('TILE_VLD', TILE_VLD, cl.statements)
# **************************************************************************
TILE_VLD_EXT = []
Rapply = tiling_v3.GetRapply(vars, sym_exvars,
','.join(isl_symb + sym_exvars) + ',')
for i in range(0, len(cl.statements)):
TILE_VLD_EXTI = tiling_v3.Project(TILE_VLD[i].apply(Rapply).coalesce(),
sym_exvars)
#####################################################################################################################
if AGGRESSIVE_SIMPLIFY:
cor_set = ''
if (len(isl_symb) > 0):
cor_set = '[' + ','.join(isl_symb) + '] -> '
else:
cor_set = ''
cor_set = cor_set + '{[' + ','.join(sym_exvars) + ',' + ','.join(
vars) + ',' + 'v] : '
for k in range(0, i + 1):
for j in range(0, len(cl.statements[k].bounds)):
compar = ' <= '
add1 = ' - '
add2 = ' + '
if cl.statements[k].bounds[j]['step'] == '-1':
add1 = ' + '
add2 = ' - '
compar = ' >= '
cor_set = cor_set + vars[j] + compar + cl.statements[
k].bounds[j]['ub'] + add1 + BLOCK2[j] + " && "
cor_set = cor_set + cl.statements[k].bounds[j][
'lb'] + add2 + BLOCK2[j] + compar + vars[j] + " && "
cor_set = cor_set + "("
cor_set = cor_set + " v = " + str(
cl.statements[i].petit_line) + " "
cor_set = cor_set + ")}"
print cor_set
cor_set = isl.Set(cor_set)
print '**************************'
TILE_VLD_EXTI = TILE_VLD_EXTI.intersect(cor_set)
#####################################################################################################################
TILE_VLD_EXT.append(TILE_VLD_EXTI)
if (DEBUG):
DebugPrint('TILE_VLD_EXT', TILE_VLD_EXT, cl.statements)
# **************************************************************************
# TIME TO SCATTER - TO HONOUR ORDER OF STATEMENTS IN IMPERFECTLY NESTED LOOPS
RMaps = []
for i in range(0, len(cl.statements)):
RMap = '{'
lbx = 0
ubx = i + 1
if (INVERSE_TILING):
lbx = i
ubx = len(cl.statements)
for j in range(lbx,
ubx): # to przy odwrotnym tilngu moze trzeba poprawic
RMap = RMap + '[' + ','.join(sym_exvars + vars) + ',' + str(
cl.statements[j].petit_line) + '] -> ['
scati = fix_scat(cl.statements[i].scatering, loop.maxl)
scatj = fix_scat(cl.statements[j].scatering, loop.maxl)
combo = [
x for t in zip(scati + scatj, sym_exvars + vars) for x in t
] # obled
RMap = RMap + ','.join(combo) + ',' + str(
cl.statements[j].petit_line) + ']; '
# normalize j
RMap = RMap[:-2] + '}'
Rmap = isl.Map(RMap)
RMaps.append(Rmap)
if (DEBUG):
DebugPrint('RMaps', RMaps, cl.statements)
# **************************************************************************
for i in range(0, len(cl.statements)):
TILE_VLD_EXT[i] = TILE_VLD_EXT[i].apply(RMaps[i]).coalesce()
if (DEBUG):
DebugPrint('TILE_VLD_EXT after Map', TILE_VLD_EXT, cl.statements)
TILE_VLD_EXT_union = TILE_VLD_EXT[0]
for i in range(1, len(cl.statements)):
TILE_VLD_EXT_union = TILE_VLD_EXT_union.union(
TILE_VLD_EXT[i]).coalesce()
if (DEBUG):
print colored('TILE_VLD_EXT to CodeGen', 'green')
print TILE_VLD_EXT_union
#if(SIMPLIFY):
#TILE_VLD_EXT_union= imperf_tile.SimplifySlice(TILE_VLD_EXT_union)
# **************************************************************************
# Optional Schedule
s = ','.join(["i%d" % i for i in range(1, loop.maxl * 4 + 2)])
# RFS
ss = s
in_ = s.split(',')
symb = ''
if (len(isl_symb) > 0):
symb += '[' + ','.join(isl_symb) + ']' + '->'
RSched = symb + '{[' + s + '] -> ['
RValid = RSched
# RFS
RFS = RSched
# ***************************************************** LOOP SKEWING
print colored('Loop skewing testing...', 'green')
sdel = isl_rel.deltas()
inp = []
for i in range(0, sdel.dim(isl.dim_type.set)):
inp.append("i" + str(i))
stest = "{[" + ",".join(inp) + "] : " + inp[1] + " < 0 }"
stest = isl.Set(stest)
sdel = stest.intersect(sdel).coalesce()
if (sdel.is_empty()):
print colored('Found: i2 -> i2 + i4', 'yellow')
s = s.replace('i2', 'i2 + i4')
else:
print colored('Failed.', 'yellow')
#s = s.replace('i4', 'i6')
#s = s.replace('i2', 'i2 + 2*i4')
#s = s.replace('i', 'i8')
#s = s.replace('i10', 'i10 + i8')
#s = s.replace('i6', '2*i2 + i4 + i6')
# ***************************************************** LOOP SKEWING
# ***************************************************** DECREMENTATION
index_arr = numpy.zeros(shape=(len(cl.statements), loop.maxl))
for k in range(0, loop.maxl):
for i in range(0, len(cl.statements)):
if (k < len(cl.statements[i].bounds)):
index_arr[i][k] = cl.statements[i].bounds[k]['step']
print colored('step array (st,loop)', 'green')
print numpy.matrix(index_arr)
for k in range(0, loop.maxl):
vec = index_arr[:, k]
dec = 1
for i in range(0, len(cl.statements)):
if (vec[i] != -1):
dec = 0
break
if (dec == 0):
continue
ind = str(2 * loop.maxl + 2 * (k + 1))
print colored('decrementation on ' + str(k + 1) + ' loop', 'yellow')
s = s.replace('i' + ind, '-i' +
ind) # TODO rozdzielic na gniazda i v w przyszlosci
# *****************************************************
RSched += s + '] : '
RFS += ss + '] : 1=1 }'
RSched = RSched + copyconstr.GetConstrSet(in_, TILE_VLD_EXT_union) + " }"
print 'RSCHEDULE'
print RSched
Rsched = isl.Map(RSched)
print 'VALIDATION CHECKING '
if (not isl_rel.is_empty() and 1 == 1):
s_in = ','.join(["i%d" % i for i in range(1, loop.maxl * 4 + 2)])
sout = ','.join(["i%d'" % i for i in range(1, loop.maxl * 4 + 2)])
out_ = sout.split(',')
i1 = in_[2 * loop.maxl + 1:4 * loop.maxl + 1:2] + [in_[loop.maxl * 4]]
i2 = out_[2 * loop.maxl + 1:4 * loop.maxl + 1:2] + [in_[loop.maxl * 4]]
RValid += sout + '] : '
DomR = isl_rel.domain()
RValid += copyconstr.GetConstrSet(
i1, DomR) + ' && ' + copyconstr.GetConstr(i1, i2, isl_rel)
s_in_ex = ','.join(["ex%d" % i for i in range(1, loop.maxl * 4 + 2)])
s_out_ex = ','.join(["ex%d'" % i for i in range(1, loop.maxl * 4 + 2)])
ex_sin = s_in_ex.split(',')
ex_sout = s_out_ex.split(',')
RValid += ' && exists ' + s_in_ex + ',' + s_out_ex + ' : ('
RValid += ' ( ' + tiling_v3.CreateLex(ex_sin, ex_sout) + ' ) && '
RValid += ' ( ' + copyconstr.GetConstr(in_, ex_sin, Rsched) + ' ) && '
RValid += ' ( ' + copyconstr.GetConstr(out_, ex_sout, Rsched) + ' ) '
RValid += ' ) }'
RValid = isl.Map(RValid).coalesce()
if (RValid.is_empty()):
print colored('*** VALIDATION OK ***', 'green')
else:
print colored('*** VALIDADION FAILED ***', 'red')
print colored(RValid, 'green')
if (FSSCHEDULE == 0):
print RValid
sys.exit(0)
for st in cl.statements:
z = st.domain_map
z = isl.Set(z)
# czy wszystkie z domain sa w TVLD_EXT VLDUNION RELATION == v
# I nalezy do TVLD_EXT and exists i,j,v i nalezy do domain_map i i,j,v != I ma byc pusty
VLD_VAL = Rsched.range()
if (VALIDATION > 0):
tiling5_valid.Valid1(Rsched, symb, in_, out_, s_in, sout, loop)
else:
print "OK"
# **************************************************************************
#### DISCOVER PARALLELISM -- empty
# ii, jj -> ii, jj' : not jj = jj'
print colored('Parallelism searching', 'green')
s = ','.join(["i%d" % i for i in range(1, loop.maxl * 4 + 2)])
in_ = s.split(',')
sprim = ','.join(["i%d'" % i for i in range(1, loop.maxl * 4 + 2)])
out_ = sprim.split(',')
Rel_base = symb + '{[' + s + '] -> [' + sprim + '] : '
#i1 = domain R 12 = R(i1) ii,i1 nalezy do VLD_EXT i'i',i2 nalezy do VLDEXT i ogr. ponizej np ii2 <> ii2' ii1 = ii1' relacja
par_loop = []
if (not isl_rel.is_empty() and 1 == 1):
delta = isl_rel.deltas()
chkc = isl.Set("{[0," + ",".join(vars) + "]}")
delta = delta.subtract(chkc)
for i in range(0, loop.maxl * 4, 2):
j = -1
print 'c' + str(i + 1),
Rel = Rel_base
tmp = ''
for j in range(0, i):
tmp += in_[j] + ' = ' + out_[j] + ' && '
tmp += ' not ( ' + in_[j + 1] + ' = ' + out_[
j + 1] + ' && ' + in_[j + 2] + ' = ' + out_[j + 2] + ' ) && '
Rel += tmp
Rel += copyconstr.GetConstrSet(
i1, DomR) + ' && ' + copyconstr.GetConstr(i1, i2, isl_rel)
Rel += ' && ( ' + copyconstr.GetConstrSet(in_, VLD_VAL) + ' ) && '
Rel += ' ( ' + copyconstr.GetConstrSet(out_, VLD_VAL) + ' ) '
Rel += ' }'
#print Rel
Rel = isl.Map(Rel)
if (i == 0):
Rel = delta
if (Rel.is_empty()):
print colored('found!', 'green')
par_loop.append('c' + str(i + 1))
# break
else:
print 'no!'
end = time.time()
elapsed = end - start
print "Algorithm: time taken: ", elapsed, "seconds."
# **************************************************************************
vars = map(str, vars)
start = time.time()
ast = 0
if (ast == 1):
loop_x = iscc.isl_ast_codegen_map(Rsched)
else:
loop_x = iscc.iscc_communicate("L :=" + str(Rsched) + "; codegen L;")
print loop_x
# **************************************************************************
lines = loop_x.split('\n')
loop_str = []
for line in lines:
if line.endswith(');'):
tab = imperf_tile.get_tab(line)
line = line.replace(' ', '')
line = line[:-2]
line = line[1:]
arr = line.split(',')
petit_st = arr[4 * loop.maxl]
s = ''
for i in range(0, len(cl.statements)):
# TODO if petit_st has 'c' get all statements make if from petit_line and insert to s, solution for loop over st
if 'c' in petit_st:
combo_st = '{'
for j in range(0, len(cl.statements)):
combo_st += '\n' + tab
combo_st += 'if( ' + petit_st + ' == ' + str(
cl.statements[j].petit_line
) + ' ) ' + cl.statements[j].body
s = combo_st + '\n' + tab + '}'
elif cl.statements[i].petit_line == int(
petit_st): # st.petit_line
s = cl.statements[i].body
for i in range(
0, len(vars)
): # todo oryginal iterators for loops with mixed indexes
subt = arr[2 * loop.maxl + 2 * i + 1]
if (('+' in subt) or ('-' in subt)):
subt = '(' + subt + ')'
s = re.sub(r'\b' + vars[i] + r'\b', subt, s)
loop_str.append(tab + s)
else:
line = line.replace('for (int', 'for(')
loop_str.append(line)
end = time.time()
elapsed = end - start
print "Code Generation: time taken: ", elapsed, "seconds.\n\n"
#loop_str = '\n'.join(loop_str)
filePaths = glob.glob(plik)
if (output_file != ""):
nazwa = output_file
else:
for filePath in filePaths:
base = os.path.basename(filePath)
nazwa = os.path.splitext(base)[0] + "_tiling" + os.path.splitext(
base)[1]
text_file = open(nazwa, "w")
for line in loop_str:
if (len(par_loop) > 0):
if ('for( ' + par_loop[0] + ' ' in line):
print imperf_tile.get_tab(line) + colored(
'#pragma omp parallel for', 'green')
text_file.write(
imperf_tile.get_tab(line) + '#pragma omp parallel for' +
'\n')
print line
text_file.write(line + '\n')
text_file.close()
print 'Output written to: ' + nazwa
for d in loop.Deps:
del d.Relation
sys.exit(0)
###################################################################################################
if (FSSCHEDULE):
rtile = tiling_schedule.get_RTILE(TILE_VLD_EXT_union, sym_exvars,
isl_rel, True) #Rsched.Range()
rtile_ii = rtile
#print rtile_ii
for i in range(0, loop.maxl):
rtile_ii = rtile_ii.remove_dims(isl.dim_type.in_,
2 * loop.maxl - i * 2 - 2, 1)
rtile_ii = rtile_ii.remove_dims(isl.dim_type.out,
2 * loop.maxl - i * 2 - 2, 1)
print colored('RTILE', 'green')
print rtile
sys.exit(0)
if islrp:
rtileplus, exact = rtile.transitive_closure()
else:
rtileplus = relation_util.oc_IterateClosure(rtile)
exact = 1
print colored('RTILE+', 'green')
print rtileplus
if (exact != 1):
print colored('RTILE+ approx', 'yellow')
else:
print colored('RTILE+ exact', 'green')
# tiling_v2.DynamicRTILE(rtile, Rsched.range(), loop.maxl, cl, vars, RFS)
try:
p = int(cpus) # or int
except ValueError:
print 'Bad cpus parameter. '
sys.exit(0)
FI = symb + ' {[' + ','.join(
sym_exvars) + ',v] -> [p] : (exists k : ('
item = ''
for i in range(0, p):
item = item + ' (p=' + str(i) + ' ' + ' && ' + sym_exvars[
0] + ' - (2k + ' + str(i) + ') = 0 ) || '
FI += item[:-3] + ' )) &&'
vv = ["i%d" % i for i in range(1, loop.maxl * 4 + 2)]
s_in = ','.join(vv)
s_out = ','.join(["i%d" % i for i in range(2, loop.maxl * 2 + 1, 2)
]) + ',' + vv[len(vv) - 1]
rmap_fi = '{[' + s_in + '] -> [' + s_out + ']}'
rmap_fi = isl.Map(rmap_fi)
II_SET = TILE_VLD_EXT_union.apply(rmap_fi).coalesce()
print colored('II_SET', 'green')
print II_SET
FI += copyconstr.GetConstrSet(sym_exvars + ['v'], II_SET) + '}'
FI = isl.Map(FI).coalesce()
print colored('FI', 'green')
print FI
RPROC = symb + '{[' + ','.join(sym_exvars) + ',v] -> [' + ','.join(
sym_exvars_p) + ',vp] : '
domRTILE = rtile_ii.domain().coalesce()
RPROC += copyconstr.GetConstrSet(
sym_exvars + ['v'], domRTILE) + ' && ' + copyconstr.GetConstr(
sym_exvars + ['v'], sym_exvars_p + ['vp'], rtile_ii)
RPROC += ' && exists p,pp : ( not(p=pp) && ' + copyconstr.GetConstr(
sym_exvars + ['v'], ['p'], FI) + ' && ' + copyconstr.GetConstr(
sym_exvars_p + ['vp'], ['pp'], FI) + ' ) }'
#print RPROC
RPROC = isl.Map(RPROC).coalesce()
print colored('RPROC', 'green')
print RPROC
s = ','.join(["i%d" % i for i in range(0, loop.maxl + 1)])
sv = s.split(',')
s1 = ','.join(["o%d" % i for i in range(0, loop.maxl + 1)])
sv1 = s1.split(',')
s2 = ','.join(["ex%d" % i for i in range(0, loop.maxl + 1)])
sve = s2.split(',')
R_RESIDUAL = symb + '{[' + s + '] -> [' + s1 + '] : '
R_RESIDUAL += copyconstr.GetConstrSet(
sv,
RPROC.domain().coalesce()) + '&& '
R_RESIDUAL += copyconstr.GetConstr(
sv, sv1, RPROC) + '&& not exists ' + s2 + ' : ('
R_RESIDUAL += tiling_v3.CreateLex(
sve, sv) + ' && ' + copyconstr.GetConstr(sve, sv1, RPROC) + ')}'
R_RESIDUAL = isl.Map(R_RESIDUAL).coalesce()
print colored('R_RESIDUAL', 'green')
print R_RESIDUAL
irp = R_RESIDUAL.fixed_power_val(-1)
R_P_RESIDUAL = symb + '{[' + ','.join(
sym_exvars) + ',v] -> [p,' + ','.join(sym_exvars_p) + ',vp] : '
R_P_RESIDUAL += copyconstr.GetConstr(
sym_exvars_p + ['vp'], ['p'], FI) + ' && ' + copyconstr.GetConstr(
sym_exvars + ['v'], sym_exvars_p + ['vp'], irp) + ' }'
R_P_RESIDUAL = isl.Map(R_P_RESIDUAL)
print colored('R_P_RESIDUAL', 'green')
print R_P_RESIDUAL