示例#1
0
def main():
    parser = argparse.ArgumentParser(description="Build the Hack a Day Supercon 2019 Badge firmware")
    parser.add_argument(
        "-D", "--document-only", action="store_true", help="don't build software or gateware, only build documentation",
    )
    parser.add_argument(
        "--sim", help="generate files for simulation", action="store_true"
    )
    args = parser.parse_args()

    compile_gateware = True
    compile_software = True

    if args.sim:
        compile_gateware = False
        compile_software = False
        platform = CocotbPlatform()
        CocotbPlatform.add_fsm_state_names()
    else:
        platform = BadgePlatform()

    if args.document_only:
        compile_gateware = False
        compile_software = False

    soc = BaseSoC(platform, is_sim=args.sim)
    builder = Builder(soc, output_dir="build",
                            csr_csv="build/csr.csv",
                            compile_software=compile_software,
                            compile_gateware=compile_gateware)
    vns = builder.build()
    soc.do_exit(vns)
    lxsocdoc.generate_docs(soc, "build/documentation", project_name="Hack a Day Supercon 2019 Badge", author="Sean \"xobs\" Cross")
示例#2
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def main():
    parser = argparse.ArgumentParser(
        description="Build Xoulon Development SoC Gateware")
    parser.add_argument("--seed", default=0, help="seed to use in nextpnr")
    parser.add_argument(
        "--document-only",
        default=False,
        action="store_true",
        help="Don't build gateware or software, only build documentation")
    args = parser.parse_args()

    soc = XoulonSoC("evt",
                    cpu_type="vexriscv",
                    cpu_variant="min+debug",
                    usb_bridge=True,
                    pnr_seed=args.seed)
    builder = Builder(soc,
                      output_dir="build",
                      csr_csv="build/csr.csv",
                      compile_software=False,
                      compile_gateware=not args.document_only)
    vns = builder.build()
    soc.do_exit(vns)
    lxsocdoc.generate_docs(soc,
                           "build/documentation/",
                           project_name="Xoulon Test MCU",
                           author="Sean \"xobs\" Cross")
    lxsocdoc.generate_svd(soc, "build/software", vendor="Foosn", name="Xoulon")
示例#3
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def main():
    global _io

    if os.environ['PYTHONHASHSEED'] != "1":
        print( "PYTHONHASHEED must be set to 1 for consistent validation results. Failing to set this results in non-deterministic compilation results")
        exit()

    parser = argparse.ArgumentParser(description="Build the Betrusted SoC")
    parser.add_argument(
        "-D", "--document-only", default=False, action="store_true", help="Build docs only"
    )
    parser.add_argument(
        "-u", "--uart-swap", default=False, action="store_true", help="swap UART pins (GDB debug bridge <-> console)"
    )
    parser.add_argument(
        "-e", "--encrypt", default=False, action="store_true", help="Format output for encryption using the dummy key. Image is re-encrypted at sealing time with a secure key."
    )

    args = parser.parse_args()
    compile_gateware = True
    compile_software = False

    if args.document_only:
        compile_gateware = False
        compile_software = False

    platform = Platform(encrypt=args.encrypt)
    if args.uart_swap:
        platform.add_extension(_io_uart_debug_swapped)
    else:
        platform.add_extension(_io_uart_debug)
    soc = BetrustedSoC(platform)
    builder = Builder(soc, output_dir="build", csr_csv="test/csr.csv", compile_software=compile_software, compile_gateware=compile_gateware)
    vns = builder.build()
    soc.do_exit(vns)
    lxsocdoc.generate_docs(soc, "build/documentation", note_pulses=True)
    lxsocdoc.generate_svd(soc, "build/software", name="Betrusted SoC", description="Primary UI Core for Betrusted", filename="soc.svd", vendor="Betrusted-IO")

    # generate the rom-inject library code
    if ~args.document_only:
        with open('sw/rom-inject/src/lib.rs', 'w') as libfile:
            subprocess.call(['./key2bits.py', '-c', '-k../../keystore.bin', '-r../../rom.db'], cwd='deps/rom-locate', stdout=libfile)

    # now re-encrypt the binary if needed
    if args.encrypt:
        # check if we need to re-encrypt to a set key
        # my.nky -- indicates the fuses have been burned on the target device, and needs re-encryption
        # keystore.bin -- indicates we want to initialize the on-chip key ROM with a set of known values
        if Path('my.nky').is_file():
            print('Found my.nky, re-encrypting binary to the specified fuse settings.')
            keystore_args = ''
            if Path('keystore.bin').is_file():
                print('Found keystore.bin, patching bitstream to contain specified keystore values.')
                with open('keystore.patch', 'w') as patchfile:
                    subprocess.call(['./key2bits.py', '-k../../keystore.bin', '-r../../rom.db'], cwd='deps/rom-locate', stdout=patchfile)
                    keystore_args = '-pkeystore.patch'
            enc = ['deps/encrypt-bitstream-python/encrypt-bitstream.py', '-fbuild/gateware/top.bin', '-idummy.nky', '-kmy.nky', '-oencrypted'] + [keystore_args]
            subprocess.call(enc)
示例#4
0
def main():
    cpu_type = "vexriscv"
    cpu_variant = "linux+debug"

    if False:
        cpu_type = None
        cpu_variant = None

    platform = BadgePlatform()
    soc = BaseSoC(platform,
                  is_sim=False,
                  debug=True,
                  cpu_type=cpu_type,
                  cpu_variant=cpu_variant,
                  csr_address_width=16,
                  sao0_disable=True,
                  sao1_disable=True,
                  genio_disable=True,
    )

    sao0_pwmgroup = PWMGroup(soc, "sao0", platform.request("sao", 0))
    sao1_pwmgroup = PWMGroup(soc, "sao1", platform.request("sao", 1))

    platform.add_extension(pmod_cubed)
    soc.submodules.pmod2 = GPIOBidirectional(platform.request("pmod2"))
    soc.add_csr("pmod2")
    soc.submodules.pmod3 = GPIOBidirectional(platform.request("pmod3"))
    soc.add_csr("pmod3")
    soc.submodules.pmod4 = GPIOBidirectional(platform.request("pmod4"))
    soc.add_csr("pmod4")

    
    builder = Builder(soc,
                      output_dir="build",
                      csr_csv="csr.csv",
                      compile_software=True,
                      compile_gateware=True)
    for package in builder.software_packages:
        if package[0] == "bios":
            builder.software_packages.remove(package)
            break
    builder.add_software_package("bios", src_dir="../../../sw")
    vns = builder.build()
    soc.do_exit(vns)
    lxsocdoc.generate_docs(soc,
                           builder.output_dir + "/documentation",
                           project_name="Hack a Day Supercon 2019 Badge", author="was Sean \"xobs\" Cross")
示例#5
0
def main():
    parser = argparse.ArgumentParser(
        description="Build Fomu Main Gateware")
    parser.add_argument(
        "--boot-source", choices=["spi", "rand", "bios"], default="bios",
        help="where to have the CPU obtain its executable code from"
    )
    parser.add_argument(
        "--document-only", default=False, action="store_true",
        help="Don't build gateware or software, only build documentation"
    )
    parser.add_argument(
        "--revision", choices=["evt", "dvt", "pvt", "hacker"], required=True,
        help="build foboot for a particular hardware revision"
    )
    parser.add_argument(
        "--bios", help="use specified file as a BIOS, rather than building one"
    )
    parser.add_argument(
        "--with-debug", help="enable debug support", choices=["usb", "uart", "spi", None]
    )
    parser.add_argument(
        "--with-dsp", help="use dsp inference in yosys (not all yosys builds have -dsp)", action="store_true"
    )
    parser.add_argument(
        "--no-cpu", help="disable cpu generation for debugging purposes", action="store_true"
    )
    parser.add_argument(
        "--placer", choices=["sa", "heap"], default="heap", help="which placer to use in nextpnr"
    )
    parser.add_argument(
        "--seed", default=0, help="seed to use in nextpnr"
    )
    parser.add_argument(
        "--export-random-rom-file", help="Generate a random ROM file and save it to a file"
    )
    args = parser.parse_args()

    output_dir = 'build'

    if args.export_random_rom_file is not None:
        size = 0x2000
        def xorshift32(x):
            x = x ^ (x << 13) & 0xffffffff
            x = x ^ (x >> 17) & 0xffffffff
            x = x ^ (x << 5)  & 0xffffffff
            return x & 0xffffffff

        def get_rand(x):
            out = 0
            for i in range(32):
                x = xorshift32(x)
                if (x & 1) == 1:
                    out = out | (1 << i)
            return out & 0xffffffff
        seed = 1
        with open(args.export_random_rom_file, "w", newline="\n") as output:
            for d in range(int(size / 4)):
                seed = get_rand(seed)
                print("{:08x}".format(seed), file=output)
        return 0

    compile_software = False
    if (args.boot_source == "bios" or args.boot_source == "spi") and args.bios is None:
        compile_software = True

    cpu_type = "vexriscv"
    cpu_variant = "min"
    if args.with_debug:
        cpu_variant = cpu_variant + "+debug"

    if args.no_cpu:
        cpu_type = None
        cpu_variant = None

    compile_gateware = True
    if args.document_only:
        compile_gateware = False
        compile_software = False

    warmboot_offsets = [
        160,
        160,
        157696,
        262144,
        262144 + 32768,
    ]

    os.environ["LITEX"] = "1" # Give our Makefile something to look for
    platform = Platform(revision=args.revision)
    soc = BaseSoC(platform, cpu_type=cpu_type, cpu_variant=cpu_variant,
                            debug=args.with_debug, boot_source=args.boot_source,
                            bios_file=args.bios,
                            use_dsp=args.with_dsp, placer=args.placer,
                            pnr_seed=int(args.seed),
                            output_dir=output_dir,
                            warmboot_offsets=warmboot_offsets[1:])
    builder = Builder(soc, output_dir=output_dir, csr_csv="build/csr.csv",
                      compile_software=compile_software, compile_gateware=compile_gateware)
    if compile_software:
        builder.software_packages = [
            ("bios", os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "sw")))
        ]
    vns = builder.build()
    soc.do_exit(vns)
    lxsocdoc.generate_docs(soc, "build/documentation/", project_name="Fomu Bootloader", author="Sean Cross")
    lxsocdoc.generate_svd(soc, "build/software", vendor="Foosn", name="Fomu")

    if not args.document_only:
        make_multiboot_header(os.path.join(output_dir, "gateware", "multiboot-header.bin"),
                            warmboot_offsets)

        with open(os.path.join(output_dir, 'gateware', 'multiboot-header.bin'), 'rb') as multiboot_header_file:
            multiboot_header = multiboot_header_file.read()
            with open(os.path.join(output_dir, 'gateware', 'top.bin'), 'rb') as top_file:
                top = top_file.read()
                with open(os.path.join(output_dir, 'gateware', 'top-multiboot.bin'), 'wb') as top_multiboot_file:
                    top_multiboot_file.write(multiboot_header)
                    top_multiboot_file.write(top)

        print(
    """Foboot build complete.  Output files:
        {}/gateware/top.bin             Bitstream file.  Load this onto the FPGA for testing.
        {}/gateware/top-multiboot.bin   Multiboot-enabled bitstream file.  Flash this onto FPGA ROM.
        {}/gateware/top.v               Source Verilog file.  Useful for debugging issues.
        {}/software/include/generated/  Directory with header files for API access.
        {}/software/bios/bios.elf       ELF file for debugging bios.
    """.format(output_dir, output_dir, output_dir, output_dir, output_dir))
示例#6
0
def main():
    parser = argparse.ArgumentParser(
        description="Build the Hack a Day Supercon 2019 Badge firmware")
    parser.add_argument(
        "-D",
        "--document-only",
        action="store_true",
        help="don't build software or gateware, only build documentation",
    )
    parser.add_argument("--sim",
                        help="generate files for simulation",
                        action="store_true")
    parser.add_argument("--no-cpu",
                        help="don't generate a cpu",
                        action="store_true")
    parser.add_argument("--no-debug",
                        help="don't generate the debug bus",
                        action="store_true")
    parser.add_argument("--sao0-disable-i2c",
                        help="Disable i2c on sao0",
                        action="store_true")
    parser.add_argument("--sao1-disable-i2c",
                        help="Disable i2c on sao1",
                        action="store_true")
    args = parser.parse_args()

    compile_gateware = True
    compile_software = True

    if args.sim:
        compile_gateware = False
        compile_software = False
        platform = CocotbPlatform()
        CocotbPlatform.add_fsm_state_names()
    else:
        platform = BadgePlatform()

    if args.document_only:
        compile_gateware = False
        compile_software = False

    cpu_type = "vexriscv"
    cpu_variant = "min+debug"
    if args.no_debug:
        cpu_variant = "min"

    if args.no_cpu or args.sim:
        cpu_type = None
        cpu_variant = None

    soc = BaseSoC(
        platform,
        is_sim=args.sim,
        debug=not args.no_debug,
        cpu_type=cpu_type,
        cpu_variant=cpu_variant,
        sao0_disable=False,
        sao0_disable_i2c=args.sao0_disable_i2c,
        sao1_disable=False,
        sao1_disable_i2c=args.sao1_disable_i2c,
        genio_disable=False,
    )
    builder = Builder(soc,
                      output_dir="build",
                      csr_csv="build/csr.csv",
                      csr_json="build/csr.json",
                      compile_software=compile_software,
                      compile_gateware=compile_gateware)
    # # If we comile software, pull the code from somewhere other than
    # # the built-in litex "bios" binary, which makes assumptions about
    # # what peripherals are available.
    # if compile_software:
    #     builder.software_packages = [
    #         ("bios", os.path.abspath(os.path.join(os.path.dirname(__file__), "rom")))
    #     ]
    vns = builder.build()
    soc.do_exit(vns)

    lxsocdoc.generate_docs(soc,
                           builder.output_dir + "/documentation",
                           project_name="Hack a Day Supercon 2019 Badge",
                           author="Sean \"xobs\" Cross")
    lxsocdoc.generate_svd(soc,
                          "build/software",
                          vendor="Foosn",
                          name="Fomu",
                          description="Hack a Day Supercon 2019 Badge")