def main():
argList = get_args()
print (argList)
handle = fl.FLHandle()
try:
fl.flInitialise(0)
vp = argList.v[0]
print("Attempting to open connection to FPGALink device {}...".format(vp))
try:
handle = fl.flOpen(vp)
except fl.FLException as ex:
handle = ids(vp, argList)
# if ( argList.d ):
# print("Configuring ports...")
# rb = "{:0{}b}".format(fl.flMultiBitPortAccess(handle, argList.d[0]), 32)
# print("Readback: 28 24 20 16 12 8 4 0\n {} {} {} {} {} {} {} {}".format(
# rb[0:4], rb[4:8], rb[8:12], rb[12:16], rb[16:20], rb[20:24], rb[24:28], rb[28:32]))
# fl.flSleep(100)
if argList.c:
isNeroCapable, isCommCapable = conduit_selection(int(argList.c[0]))
else:
isNeroCapable, isCommCapable = conduit_selection()
jtag_chain(isNeroCapable, argList, vp, handle)
configure(argList, isNeroCapable, handle, vp)
if argList.f and not isCommCapable:
raise fl.FLException("Data file load requested but device at {} does not support CommFPGA".format(vp))
if isCommCapable and fl.flIsFPGARunning(handle):
fpga = NodeFPGA(handle)
# define channels
writechannel = 0x02
statuschannel = 0x05
resetchannel = 0x08
if argList.ppm:
M = int(eval(argList.ppm[0]))
print ("Setting PPM order to",M)
fpga.setPPM_M(M)
writedelay,num_bytes,trackingbyte = fpga.setModulatorParams(M)
if not argList.f:
fpga.setTrackingMode(writechannel,trackingbyte,M)
if argList.txdel:
delay = int(eval(argList.txdel[0]))
print ("Setting transmitter loopback delay to %i (0x%X)"%(delay,delay))
fpga.setTXdelay(delay)
if argList.dac:
dacval = int(eval(argList.dac[0]))
print ("Setting DAC value to %i (0x%X)"%(dacval,dacval))
fpga.writeDAC(dacval)
if argList.prbs:
# dacval = int(eval(argList.dac[0]))
# print ("Setting DAC value to %i (0x%X)"%(dacval,dacval))
print ("Enabling PRBS")
fpga.usePRBS()
else:
print ("Disabling PRBS")
fpga.usePRBS(False)
if argList.peak:
obslength = float(argList.peak)
print ("Measuring peak power...")
peakDAC = fpga.binSearchPeak(M,target=1.0/M,obslength=obslength)
print (" DAC = %i"%peakDAC)
if argList.ser:
obslength = float(argList.ser)
print ("Measuring slot error rate...")
cycles,errors,ones,ser = fpga.measureSER(obslength=obslength)
print (" cycles = 0x%-12X"%(cycles))
print (" errors = 0x%-12X"%(errors))
print (" ones = 0x%-12X target=0x%-12X"%(ones,cycles/M))
print (" SlotER = %e"%(ser))
data_to_write(argList, fpga, writechannel, resetchannel, statuschannel, writedelay, vp, M, num_bytes)
except fl.FLException as ex:
print(ex)
finally:
fl.flClose(handle)
def main():
argList = get_args()
print(argList)
handle = fl.FLHandle()
try:
fl.flInitialise(0)
vp = argList.v[0]
print("Attempting to open connection to FPGALink device {}...".format(
vp))
try:
handle = fl.flOpen(vp)
except fl.FLException as ex:
handle = ids(vp, argList)
if argList.c:
isNeroCapable, isCommCapable = conduit_selection(int(argList.c[0]))
else:
isNeroCapable, isCommCapable = conduit_selection()
jtag_chain(isNeroCapable, argList, vp, handle)
configure(argList, isNeroCapable, handle, vp)
if argList.f and not isCommCapable:
raise fl.FLException(
"Data file load requested but device at {} does not support CommFPGA"
.format(vp))
if isCommCapable and fl.flIsFPGARunning(handle):
fpga = NodeFPGA(handle)
if argList.ppm:
M = int(eval(argList.ppm[0]))
print("Setting PPM order to: ", M)
fpga.setPPM_M(M)
if argList.txdel:
delay = int(eval(argList.txdel[0]))
print("Setting transmitter loopback delay to %i (0x%X)" %
(delay, delay))
fpga.setTXdelay(delay)
if argList.dac:
dacval = int(eval(argList.dac[0]))
print("Setting DAC value to %i (0x%X)" % (dacval, dacval))
fpga.writeDAC(dacval)
if argList.prbs:
print("Enabling PRBS")
fpga.usePRBS()
else:
print("Disabling PRBS")
fpga.usePRBS(False)
if argList.peak:
obslength = float(argList.peak)
print("Measuring peak power...")
peakDAC = fpga.binSearchPeak(M,
target=1.0 / M,
obslength=obslength)
print(" DAC = %i" % peakDAC)
#alg testing goes here, but alg is not up to date!!
opt_alg(argList, fpga)
except fl.FLException as ex:
print(ex)
finally:
fl.flClose(handle)
def NODECTRLmain():
argList = get_args()
handle = fl.FLHandle()
try:
fl.flInitialise(0)
vp = argList.v[0]
print("Attempting to open connection to FPGALink device {}...".format(vp))
try:
handle = fl.flOpen(vp)
except fl.FLException as ex:
handle = ids(vp, argList)
if argList.c:
isNeroCapable, isCommCapable = conduit_selection(int(argList.c[0]))
else:
isNeroCapable, isCommCapable = conduit_selection()
jtag_chain(isNeroCapable, argList, vp, handle)
configure(argList, isNeroCapable, handle, vp)
if argList.f and not isCommCapable:
raise fl.FLException("Data file load requested but device at {} does not support CommFPGA".format(vp))
if isCommCapable and fl.flIsFPGARunning(handle):
fpga = NodeFPGA(handle)
# define channels
##must update these channels
writechannel = 0x02
statuschannel = 0x05
resetchannel = 0x08
writedelay,num_bytes,trackingbyte = fpga.setModulatorParams(M)
if argList.ppm:
M = int(eval(argList.ppm[0]))
print ("Setting PPM order to: ",M)
fpga.setPPM_M(M)
if not argList.f:
fpga.setTrackingMode(writechannel,trackingbyte,M)
if argList.txdel:
delay = int(eval(argList.txdel[0]))
print ("Setting transmitter loopback delay to %i (0x%X)"%(delay,delay))
fpga.setTXdelay(delay)
if argList.dac:
dacval = int(eval(argList.dac[0]))
print ("Setting DAC value to %i (0x%X)"%(dacval,dacval))
fpga.writeDAC(dacval)
if argList.prbs:
print ("Enabling PRBS")
fpga.usePRBS()
else:
print ("Disabling PRBS")
fpga.usePRBS(False)
if argList.peak:
obslength = float(argList.peak)
print ("Measuring peak power...")
peakDAC = fpga.binSearchPeak(M,target=1.0/M,obslength=obslength)
print (" DAC = %i"%peakDAC)
if argList.ser:
obslength = float(argList.ser)
print ("Measuring slot error rate...")
cycles,errors,ones,ser = fpga.measureSER(obslength=obslength)
print (" cycles = 0x%-12X"%(cycles))
print (" errors = 0x%-12X"%(errors))
print (" ones = 0x%-12X target=0x%-12X"%(ones,cycles/M))
print (" SlotER = %e"%(ser))
data_to_write(argList, fpga, writechannel, resetchannel, statuschannel, writedelay, vp, M, num_bytes)
#alg testing goes here, but alg is not up to date!!
#opt_alg(argList, fpga)
except fl.FLException as ex:
print(ex)
finally:
fl.flClose(handle)