def test_portgraph_connected_edges(): pg = PortGraph() vid1 = pg.add_vertex() vid2 = pg.add_vertex() vid3 = pg.add_vertex() assert_raises(InvalidPort, lambda: tuple(pg.connected_edges(0))) pid1 = pg.add_in_port(vid1, 0) pid2 = pg.add_in_port(vid1, 1) pid3 = pg.add_out_port(vid2, 0) pid4 = pg.add_out_port(vid3, 0) # test vertices and ports are created without connections for pid in (pid1, pid2, pid3, pid4): assert len(tuple(pg.connected_edges(pid))) == 0 eid1 = pg.connect(pid3, pid1) assert tuple(pg.connected_edges(pid3)) == (eid1,) assert tuple(pg.connected_edges(pid1)) == (eid1,) for pid in (pid2, pid4): assert len(tuple(pg.connected_edges(pid))) == 0 eid2 = pg.connect(pid4, pid1) assert tuple(pg.connected_edges(pid3)) == (eid1,) assert tuple(pg.connected_edges(pid4)) == (eid2,) assert sorted(pg.connected_edges(pid1)) == sorted((eid1, eid2)) assert len(tuple(pg.connected_edges(pid2))) == 0 eid3 = pg.connect(pid4, pid2) assert tuple(pg.connected_edges(pid3)) == (eid1,) assert sorted(pg.connected_edges(pid4)) == sorted((eid2, eid3)) assert sorted(pg.connected_edges(pid1)) == sorted((eid1, eid2)) assert tuple(pg.connected_edges(pid2)) == (eid3,)
def test_portgraph_connect(): pg = PortGraph() vid1 = pg.add_vertex() vid2 = pg.add_vertex() # invalid ports assert_raises(InvalidPort, lambda: pg.connect(0, 1)) # invalid source port pid1 = pg.add_in_port(vid1, "in") assert_raises(InvalidPort, lambda: pg.connect(pid1 + 1, pid1)) # invalid out port pid2 = pg.add_out_port(vid2, "out") assert_raises(InvalidPort, lambda: pg.connect(pid2, pid1 + pid2 + 1)) # edge connection from in to out raise error assert_raises(InvalidPort, lambda: pg.connect(pid1, pid2)) eid = pg.connect(pid2, pid1) assert pg.source_port(eid) == pid2 assert pg.target_port(eid) == pid1 assert tuple(pg.connected_edges(pid1)) == (eid,) assert tuple(pg.connected_edges(pid2)) == (eid,) assert pid1 in pg.connected_ports(pid2) assert pid2 in pg.connected_ports(pid1) # can not duplicate edge assert_raises(InvalidEdge, lambda: pg.connect(pid2, pid1, eid))
def test_portgraph_big(): pg = PortGraph() vid1 = pg.add_vertex() pid11 = pg.add_out_port(vid1, "out") vid2 = pg.add_vertex() pid21 = pg.add_out_port(vid2, "out") vid3 = pg.add_vertex() pid31 = pg.add_in_port(vid3, "in1") pid32 = pg.add_in_port(vid3, "in2") pid33 = pg.add_out_port(vid3, "res") vid4 = pg.add_vertex() pid41 = pg.add_in_port(vid4, "in") eid1 = pg.connect(pid11, pid31) eid2 = pg.connect(pid21, pid32) pg.connect(pid33, pid41) assert pg.source_port(eid1) == pid11 assert pg.target_port(eid2) == pid32 assert set(pg.out_ports(vid1)) == {pid11} assert set(pg.in_ports(vid3)) == {pid31, pid32} assert set(pg.ports(vid3)) == {pid31, pid32, pid33} assert pg.is_in_port(pid31) assert pg.is_out_port(pid11) assert pg.vertex(pid11) == vid1 assert set(pg.connected_ports(pid11)) == {pid31} assert set(pg.connected_edges(pid21)) == {eid2} assert pg.out_port(vid1, "out") == pid11 assert pg.in_port(vid3, "in1") == pid31 assert_raises(InvalidPort, lambda: pg.connect(pid11, pid33)) pg.remove_port(pid33) assert set(pg.connected_ports(pid41)) == set() assert set(pg.out_edges(vid3)) == set() assert_raises(InvalidPort, lambda: pg.is_in_port(pid33))