def test_if_else(self):
config_fn = os.path.join(curdir, 'hardware_config_cc_light.json')
platform = ql.Platform('seven_qubits_chip', config_fn)
num_qubits = 5
num_cregs = 10
p = ql.Program('test_if_else', platform, num_qubits, num_cregs)
sweep_points = [1, 2]
p.set_sweep_points(sweep_points)
k1 = ql.Kernel('aKernel1', platform, num_qubits, num_cregs)
k2 = ql.Kernel('aKernel2', platform, num_qubits, num_cregs)
# create classical registers
rd = ql.CReg()
rs1 = ql.CReg()
rs2 = ql.CReg()
# quanutm operations
k1.gate('x', [0])
k2.gate('y', [0])
# simple if
p.add_if_else(k1, k2, ql.Operation(rs1, '==', rs2))
p.compile()
QISA_fn = os.path.join(output_dir, p.name + '.qisa')
assemble(QISA_fn)
def test_do_while_nested_for(self):
self.setUpClass()
config_fn = os.path.join(curdir, 'hardware_config_cc_light.json')
platform = ql.Platform('seven_qubits_chip', config_fn)
num_qubits = 5
num_cregs = 10
p = ql.Program('test_do_while_nested_for', platform, num_qubits,
num_cregs)
sweep_points = [1, 2]
p.set_sweep_points(sweep_points)
sp1 = ql.Program('subprogram1', platform, num_qubits, num_cregs)
sp2 = ql.Program('subprogram2', platform, num_qubits, num_cregs)
k1 = ql.Kernel('aKernel1', platform, num_qubits, num_cregs)
k2 = ql.Kernel('aKernel2', platform, num_qubits, num_cregs)
# create classical registers
rd = ql.CReg()
rs1 = ql.CReg()
rs2 = ql.CReg()
# quanutm operations
k1.gate('x', [0])
k2.gate('y', [0])
sp1.add_do_while(k1, ql.Operation(rs1, '>=', rs2))
sp2.add_for(sp1, 100)
p.add_program(sp2)
p.compile()
QISA_fn = os.path.join(output_dir, p.name + '.qisa')
assemble(QISA_fn)
def test_classical(self):
self.setUpClass()
config_fn = os.path.join(curdir, 'hardware_config_cc_light.json')
platform = ql.Platform('seven_qubits_chip', config_fn)
num_qubits = 5
num_cregs = 32
p = ql.Program('test_classical', platform, num_qubits, num_cregs)
sweep_points = [1, 2]
p.set_sweep_points(sweep_points)
k1 = ql.Kernel('aKernel1', platform, num_qubits, num_cregs)
# quanutm operations
k1.gate('x', [0])
k1.gate('cz', [0, 2])
# # create classical registers
rd = ql.CReg()
rs1 = ql.CReg()
rs2 = ql.CReg()
# add/sub/and/or/xor
k1.classical(rd, ql.Operation(rs1, '+', rs2))
# not
k1.classical(rd, ql.Operation('~', rs2))
# comparison
k1.classical(rd, ql.Operation(rs1, '==', rs2))
# initialize (r1 = 2)
k1.classical(rs1, ql.Operation(2))
# assign (r1 = r2)
k1.classical(rs1, ql.Operation(rs2))
# measure
k1.gate('measure', [0], rs1)
# add kernel
p.add_kernel(k1)
p.compile()
QISA_fn = os.path.join(output_dir, p.name + '.qisa')
assemble(QISA_fn)
def test_stateful_behavior(self):
self.setUpClass()
ql.set_option('optimize', 'no')
ql.set_option('scheduler', 'ALAP')
config_fn = os.path.join(curdir, 'hardware_config_cc_light.json')
platform = ql.Platform("myPlatform", config_fn)
sweep_points = [1]
nqubits = 3
nregs = 3
p = ql.Program("statelessProgram", platform, nqubits, nregs)
p.set_sweep_points(sweep_points)
k = ql.Kernel("aKernel", platform, nqubits, nregs)
k.prepz(0)
k.gate('rx180', [0])
k.measure(0)
rd = ql.CReg()
rs1 = ql.CReg()
rs2 = ql.CReg()
k.classical(rs1, ql.Operation(3))
k.classical(rs1, ql.Operation(4))
k.classical(rd, ql.Operation(rs1, '+', rs2))
p.add_kernel(k)
NCOMPILES = 50
QISA_fn = os.path.join(output_dir, p.name + '.qisa')
for i in range(NCOMPILES):
p.compile()
self.setUpClass()
QISA_fn_i = os.path.join(output_dir,
p.name + '_' + str(i) + '.qisa')
os.rename(QISA_fn, QISA_fn_i)
for i in range(NCOMPILES - 1):
QISA_fn_1 = os.path.join(output_dir,
p.name + '_' + str(i) + '.qisa')
QISA_fn_2 = os.path.join(output_dir,
p.name + '_' + str(i + 1) + '.qisa')
self.assertTrue(file_compare(QISA_fn_1, QISA_fn_2))
def test_classical(self):
platform = ql.Platform(platform_name, config_fn)
p = ql.Program('test_classical', platform, num_qubits, num_cregs)
k1 = ql.Kernel('aKernel1', platform, num_qubits, num_cregs)
# quantum operations
k1.gate('x', [6])
k1.gate('cz', [6, 7])
# create classical registers
rd = ql.CReg()
rs1 = ql.CReg()
rs2 = ql.CReg()
if 0:
# add/sub/and/or/xor
k1.classical(rd, ql.Operation(rs1, '+', rs2))
# not
k1.classical(rd, ql.Operation('~', rs2))
# comparison
k1.classical(rd, ql.Operation(rs1, '==', rs2))
# initialize (r1 = 2)
k1.classical(rs1, ql.Operation(2))
# assign (r1 = r2)
k1.classical(rs1, ql.Operation(rs2))
# measure
k1.gate('measure', [6], rs1)
k1.gate('measure', [7], rs2)
# add kernel
p.add_kernel(k1)
p.compile()
def test_qec(self):
ql.set_option('output_dir', output_dir)
ql.set_option('optimize', 'no')
ql.set_option('scheduler', 'ALAP')
ql.set_option('scheduler_uniform', 'yes')
ql.set_option('log_level', 'LOG_WARNING')
platform = ql.Platform(platform_name, config_fn)
p = ql.Program('test_qec', platform, num_qubits, num_cregs)
k = ql.Kernel('kernel_0', platform, num_qubits, num_cregs)
# pipelined QEC: [
# see: R. Versluis et al., Phys. Rev. A 8, 034021 (2017)
# - nw, ne, sw, se] -> [n, e, w, s] because we rotate grid
# - H -> rym90, ry90, see Fig 2 of reference
#
# class SurfaceCode, qubits, tiles, width, getNeighbourN, getNeighbourE, getNeighbourW, getNeighbourS, getX, getZ, getData
# define qubit aliases:
# FIXME: neighbours make no sense anymore
x = 7
xN = x - 5
xE = x + 1
xS = x + 5
xW = x - 1
z = 11
zN = z - 5
zE = z + 1
zS = z + 5
zW = z - 1
# create classical registers
rdX = ql.CReg()
rdZ = ql.CReg()
# X stabilizers
k.gate("rym90", [x])
k.gate("rym90", [xN])
k.gate("rym90", [xE])
k.gate("rym90", [xW])
k.gate("rym90", [xS])
k.wait(all_qubits, 0)
# k.wait({x, xN, xE, xW, xS}, 0)
k.gate("cz", [x, xE])
k.gate("cz", [x, xN])
k.gate("cz", [x, xS])
k.gate("cz", [x, xW])
k.wait(all_qubits, 0)
# k.wait({x, xN, xE, xW, xS}, 0)
k.gate("ry90", [x])
k.gate("ry90", [xN])
k.gate("ry90", [xE])
k.gate("ry90", [xW])
k.gate("ry90", [xS])
k.wait(all_qubits, 0)
# k.wait({x, xN, xE, xW, xS}, 0)
k.gate("measure", [x], rdX)
# k.wait(all_qubits, 0)
k.wait([x], 0)
# Z stabilizers
k.gate("rym90", [z])
k.gate("cz", [z, zE])
k.gate("cz", [z, zS])
k.gate("cz", [z, zN])
k.gate("cz", [z, zW])
k.gate("ry90", [z])
k.gate("measure", [z], rdZ)
p.add_kernel(k)
p.compile()
