示例#1
0
    def visit_FuncCall(self,node):
        funcSym = self.symTab.lookupSymbol(node.name.name)
        funcType = funcSym.type
        finalArgs = []
        if node.args:
            processingVarArgs = False
            for i,arg in enumerate(node.args.exprs):
                finalArg = self.inFunctionDispatch(arg)
                
                self.assertNonVoid(finalArg)
                
                if not processingVarArgs:
                    if type(funcType.args[i]) == types.VarArgType:
                        processingVarArgs = True
                
                if finalArg.type.isInt:
                    finalArg = operatorgen.promoteToInt(self.curBasicBlock,finalArg)
                
                if not processingVarArgs:
                    if not finalArg.type.strictTypeMatch(funcType.args[i]):
                        raise Exception("type mismatch in funcall %s %s incompatible with %s" % (funcSym.name,finalArg.type,funcType.args[i]))


                
                finalArg = operatorgen.removeLValness(self.curBasicBlock,finalArg);
                
                finalArgs.append(finalArg)
                
        else:
            if len(funcType.args) != 0:
                raise Exception(("calling function %s with no args when it" \
                        + " requires args") % funcSym.name)

        retType = funcType.rettype.clone()
        retV = ValTracker(False,retType,None)
        retV.createVirtualReg()
        callinst = ir.Call(node.name.name)
        callinst.read = list(map(lambda v : v.reg,finalArgs))
        if retV.reg != None:
            callinst.assigned = [retV.reg]
        else:
            callinst.assigned = []
        self.curBasicBlock.append(callinst)
        return retV
示例#2
0
def test_promotetoint1():
    t = types.Int(signed=True)
    v = valtracker.ValTracker(False,t,None)
    v.createVirtualReg()
    bb = basicblock.BasicBlock()
    newv = operatorgen.promoteToInt(bb,v)
    
    assert(newv == v)
    assert(len(bb) == 0)
    
    t = types.Int(signed=False)
    v = valtracker.ValTracker(False,t,None)
    v.createVirtualReg()
    bb = basicblock.BasicBlock()
    newv = operatorgen.promoteToInt(bb,v)
    
    assert(newv == v)
    assert(len(bb) == 0)
    
    t = types.Int(signed=False)
    v = valtracker.ValTracker(True,t,None)
    v.createVirtualReg()
    bb = basicblock.BasicBlock()
    newv = operatorgen.promoteToInt(bb,v)
    
    assert(type(bb[0]) == ir.Deref)
    assert(len(bb) == 1)
    
    
    t = types.Char(signed=False)
    v = valtracker.ValTracker(False,t,None)
    v.createVirtualReg()
    assert(type(v.reg) == ir.I8)
    bb = basicblock.BasicBlock()
    newv = operatorgen.promoteToInt(bb,v)
    
    assert(len(bb) == 1)
    assert(newv.type.signed == True)
    assert(type(newv.type) == types.Int)
    assert(type(bb[0]) == ir.Unop)
    assert(bb[0].read[0] == v.reg)
    assert(bb[0].assigned[0] == newv.reg)
    assert(bb[0].op == 'zx')
    assert(len(bb) == 1)

    t = types.Char(signed=True)
    v = valtracker.ValTracker(False,t,None)
    v.createVirtualReg()
    assert(type(v.reg) == ir.I8)
    bb = basicblock.BasicBlock()
    newv = operatorgen.promoteToInt(bb,v)
    
    assert(len(bb) == 1)
    assert(newv.type.signed == True)
    assert(type(newv.type) == types.Int)
    assert(type(bb[0]) == ir.Unop)
    assert(bb[0].read[0] == v.reg)
    assert(bb[0].assigned[0] == newv.reg)
    assert(bb[0].op == 'sx')
    assert(len(bb) == 1)

    t = types.ShortInt(signed=False)
    v = valtracker.ValTracker(False,t,None)
    v.createVirtualReg()
    assert(type(v.reg) == ir.I16)
    bb = basicblock.BasicBlock()
    newv = operatorgen.promoteToInt(bb,v)
    
    assert(len(bb) == 1)
    assert(newv.type.signed == True)
    assert(type(newv.type) == types.Int)
    assert(type(bb[0]) == ir.Unop)
    assert(bb[0].read[0] == v.reg)
    assert(bb[0].assigned[0] == newv.reg)
    assert(bb[0].op == 'zx')
    assert(len(bb) == 1)

    t = types.ShortInt(signed=True)
    v = valtracker.ValTracker(False,t,None)
    v.createVirtualReg()
    assert(type(v.reg) == ir.I16)
    bb = basicblock.BasicBlock()
    newv = operatorgen.promoteToInt(bb,v)
    
    assert(len(bb) == 1)
    assert(newv.type.signed == True)
    assert(type(newv.type) == types.Int)
    assert(type(bb[0]) == ir.Unop)
    assert(bb[0].read[0] == v.reg)
    assert(bb[0].assigned[0] == newv.reg)
    assert(bb[0].op == 'sx')
    assert(len(bb) == 1)