def test_write_data_spec():
unittest_setup()
# UGLY but the mock transceiver NEED generate_on_machine to be False
AbstractGenerateConnectorOnMachine.generate_on_machine = say_false
machine = virtual_machine(2, 2)
p.setup(1.0)
load_config()
p.set_number_of_neurons_per_core(p.IF_curr_exp, 100)
pre_pop = p.Population(10,
p.IF_curr_exp(),
label="Pre",
additional_parameters={
"splitter":
SplitterAbstractPopulationVertexSlice()
})
post_pop = p.Population(10,
p.IF_curr_exp(),
label="Post",
additional_parameters={
"splitter":
SplitterAbstractPopulationVertexSlice()
})
proj_one_to_one_1 = p.Projection(pre_pop, post_pop, p.OneToOneConnector(),
p.StaticSynapse(weight=1.5, delay=1.0))
proj_one_to_one_2 = p.Projection(pre_pop, post_pop, p.OneToOneConnector(),
p.StaticSynapse(weight=2.5, delay=2.0))
proj_all_to_all = p.Projection(
pre_pop, post_pop, p.AllToAllConnector(allow_self_connections=False),
p.StaticSynapse(weight=4.5, delay=4.0))
from_list_list = [(i, i, i, (i * 5) + 1) for i in range(10)]
proj_from_list = p.Projection(pre_pop, post_pop,
p.FromListConnector(from_list_list),
p.StaticSynapse())
app_graph = globals_variables.get_simulator().original_application_graph
context = {"ApplicationGraph": app_graph}
with (injection_context(context)):
delay_support_adder(app_graph)
machine_graph, _ = spynnaker_splitter_partitioner(
app_graph, machine, 100)
allocator = ZonedRoutingInfoAllocator()
n_keys_map = edge_to_n_keys_mapper(machine_graph)
routing_info = allocator.__call__(machine_graph,
n_keys_map,
flexible=False)
post_vertex = next(iter(post_pop._vertex.machine_vertices))
post_vertex_slice = post_vertex.vertex_slice
post_vertex_placement = Placement(post_vertex, 0, 0, 3)
temp_spec = tempfile.mktemp()
spec = DataSpecificationGenerator(io.FileIO(temp_spec, "wb"), None)
synaptic_matrices = SynapticMatrices(post_vertex_slice,
n_synapse_types=2,
all_single_syn_sz=10000,
synaptic_matrix_region=1,
direct_matrix_region=2,
poptable_region=3,
connection_builder_region=4)
synaptic_matrices.write_synaptic_data(
spec,
post_pop._vertex.incoming_projections,
all_syn_block_sz=10000,
weight_scales=[32, 32],
routing_info=routing_info)
spec.end_specification()
with io.FileIO(temp_spec, "rb") as spec_reader:
executor = DataSpecificationExecutor(spec_reader, 20000)
executor.execute()
all_data = bytearray()
all_data.extend(bytearray(executor.get_header()))
all_data.extend(bytearray(executor.get_pointer_table(0)))
for r in range(MAX_MEM_REGIONS):
region = executor.get_region(r)
if region is not None:
all_data.extend(region.region_data)
transceiver = MockTransceiverRawData(all_data)
report_folder = mkdtemp()
try:
connections_1 = numpy.concatenate(
synaptic_matrices.get_connections_from_machine(
transceiver, post_vertex_placement,
proj_one_to_one_1._projection_edge,
proj_one_to_one_1._synapse_information))
# Check that all the connections have the right weight and delay
assert len(connections_1) == post_vertex_slice.n_atoms
assert all([conn["weight"] == 1.5 for conn in connections_1])
assert all([conn["delay"] == 1.0 for conn in connections_1])
connections_2 = numpy.concatenate(
synaptic_matrices.get_connections_from_machine(
transceiver, post_vertex_placement,
proj_one_to_one_2._projection_edge,
proj_one_to_one_2._synapse_information))
# Check that all the connections have the right weight and delay
assert len(connections_2) == post_vertex_slice.n_atoms
assert all([conn["weight"] == 2.5 for conn in connections_2])
assert all([conn["delay"] == 2.0 for conn in connections_2])
connections_3 = numpy.concatenate(
synaptic_matrices.get_connections_from_machine(
transceiver, post_vertex_placement,
proj_all_to_all._projection_edge,
proj_all_to_all._synapse_information))
# Check that all the connections have the right weight and delay
assert len(connections_3) == 100
assert all([conn["weight"] == 4.5 for conn in connections_3])
assert all([conn["delay"] == 4.0 for conn in connections_3])
connections_4 = numpy.concatenate(
synaptic_matrices.get_connections_from_machine(
transceiver, post_vertex_placement,
proj_from_list._projection_edge,
proj_from_list._synapse_information))
# Check that all the connections have the right weight and delay
assert len(connections_4) == len(from_list_list)
list_weights = [values[2] for values in from_list_list]
list_delays = [values[3] for values in from_list_list]
assert all(list_weights == connections_4["weight"])
assert all(list_delays == connections_4["delay"])
finally:
shutil.rmtree(report_folder, ignore_errors=True)
def _do_allocation(self, one_to_one_groups, same_chip_vertex_groups,
machine, plan_n_timesteps, machine_graph, progress):
"""
:param list(set(MachineVertex)) one_to_one_groups:
Groups of vertexes that would be nice on same chip
:param same_chip_vertex_groups:
Mapping of Vertex to the Vertex that must be on the same Chip
:type same_chip_vertex_groups:
dict(MachineVertex, collection(MachineVertex))
:param ~spinn_machine.Machine machine:
The machine with respect to which to partition the application
graph
:param int plan_n_timesteps: number of timesteps to plan for
:param MachineGraph machine_graph: The machine_graph to place
:param ~spinn_utilities.progress_bar.ProgressBar progress:
:rtype: Placements
"""
placements = Placements()
resource_tracker = ResourceTracker(
machine, plan_n_timesteps, self._generate_radial_chips(machine))
all_vertices_placed = set()
# RadialPlacementFromChipConstraint won't work here
for vertex in machine_graph.vertices:
for constraint in vertex.constraints:
if isinstance(constraint, RadialPlacementFromChipConstraint):
raise PacmanPlaceException(
"A RadialPlacementFromChipConstraint will not work "
"with the OneToOnePlacer algorithm; use the "
"RadialPlacer algorithm instead")
# Find and place vertices with hard constraints
for vertex in machine_graph.vertices:
if isinstance(vertex, AbstractVirtual):
virtual_p = 0
while placements.is_processor_occupied(vertex.virtual_chip_x,
vertex.virtual_chip_y,
virtual_p):
virtual_p += 1
placements.add_placement(
Placement(vertex, vertex.virtual_chip_x,
vertex.virtual_chip_y, virtual_p))
all_vertices_placed.add(vertex)
elif locate_constraints_of_type(vertex.constraints,
ChipAndCoreConstraint):
self._allocate_same_chip_as_group(vertex, placements,
resource_tracker,
same_chip_vertex_groups,
all_vertices_placed,
progress, machine_graph)
for grouped_vertices in one_to_one_groups:
# Get unallocated vertices and placements of allocated vertices
unallocated = list()
chips = list()
for vert in grouped_vertices:
if vert in all_vertices_placed:
placement = placements.get_placement_of_vertex(vert)
chips.append((placement.x, placement.y))
else:
unallocated.append(vert)
if 0 < len(unallocated) <=\
resource_tracker.get_maximum_cores_available_on_a_chip():
# Try to allocate all vertices to the same chip
self._allocate_one_to_one_group(resource_tracker, unallocated,
progress, placements, chips,
all_vertices_placed,
machine_graph)
# if too big or failed go on to other groups first
# check all have been allocated if not do so now.
for vertex in machine_graph.vertices:
if vertex not in all_vertices_placed:
self._allocate_same_chip_as_group(vertex, placements,
resource_tracker,
same_chip_vertex_groups,
all_vertices_placed,
progress, machine_graph)
progress.end()
return placements
def test_local_verts_go_to_local_lpgs(self):
machine = virtual_machine(width=12, height=12, with_wrap_arounds=True)
graph = MachineGraph("Test")
default_params = {
'use_prefix': False,
'key_prefix': None,
'prefix_type': None,
'message_type': EIEIOType.KEY_32_BIT,
'right_shift': 0,
'payload_as_time_stamps': True,
'use_payload_prefix': True,
'payload_prefix': None,
'payload_right_shift': 0,
'number_of_packets_sent_per_time_step': 0,
'hostname': None,
'port': None,
'strip_sdp': None,
'board_address': None,
'tag': None
}
# data stores needed by algorithm
live_packet_gatherers = dict()
extended = dict(default_params)
extended.update({'partition_id': "EVENTS"})
default_params_holder = LivePacketGatherParameters(**extended)
live_packet_gatherers[default_params_holder] = list()
live_packet_gatherers_to_vertex_mapping = dict()
live_packet_gatherers_to_vertex_mapping[default_params_holder] = dict()
placements = Placements()
# add LPG's (1 for each Ethernet connected chip)
for chip in machine.ethernet_connected_chips:
extended = dict(default_params)
extended.update({'label': 'test'})
vertex = LivePacketGatherMachineVertex(**extended)
graph.add_vertex(vertex)
placements.add_placement(
Placement(x=chip.x, y=chip.y, p=2, vertex=vertex))
live_packet_gatherers_to_vertex_mapping[default_params_holder][
chip.x, chip.y] = vertex
# tracker of wirings
verts_expected = defaultdict(list)
positions = list()
positions.append([0, 0, 0, 0])
positions.append([4, 4, 0, 0])
positions.append([1, 1, 0, 0])
positions.append([2, 2, 0, 0])
positions.append([8, 4, 8, 4])
positions.append([11, 4, 8, 4])
positions.append([4, 11, 4, 8])
positions.append([4, 8, 4, 8])
positions.append([0, 11, 8, 4])
positions.append([11, 11, 4, 8])
positions.append([8, 8, 4, 8])
positions.append([4, 0, 0, 0])
positions.append([7, 7, 0, 0])
# add graph vertices which reside on areas of the machine to ensure
# spread over boards.
for x, y, eth_x, eth_y in positions:
vertex = SimpleMachineVertex(resources=ResourceContainer())
graph.add_vertex(vertex)
live_packet_gatherers[default_params_holder].append(vertex)
verts_expected[eth_x, eth_y].append(vertex)
placements.add_placement(Placement(x=x, y=y, p=5, vertex=vertex))
# run edge inserter that should go boom
edge_inserter = InsertEdgesToLivePacketGatherers()
edge_inserter(live_packet_gatherer_parameters=live_packet_gatherers,
placements=placements,
live_packet_gatherers_to_vertex_mapping=(
live_packet_gatherers_to_vertex_mapping),
machine=machine,
machine_graph=graph,
application_graph=None,
graph_mapper=None)
# verify edges are in the right place
for chip in machine.ethernet_connected_chips:
edges = graph.get_edges_ending_at_vertex(
live_packet_gatherers_to_vertex_mapping[default_params_holder][
chip.x, chip.y])
for edge in edges:
self.assertIn(edge.pre_vertex, verts_expected[chip.x, chip.y])
def test_write_synaptic_matrix_and_master_population_table(self):
MockSimulator.setup()
# Add an sdram so max SDRAM is high enough
SDRAM(10000)
# UGLY but the mock transceiver NEED generate_on_machine to be False
AbstractGenerateConnectorOnMachine.generate_on_machine = self.say_false
default_config_paths = os.path.join(
os.path.dirname(abstract_spinnaker_common.__file__),
AbstractSpiNNakerCommon.CONFIG_FILE_NAME)
config = conf_loader.load_config(
AbstractSpiNNakerCommon.CONFIG_FILE_NAME, default_config_paths)
config.set("Simulation", "one_to_one_connection_dtcm_max_bytes", 40)
machine_time_step = 1000.0
pre_app_vertex = SimpleApplicationVertex(10)
pre_vertex_slice = Slice(0, 9)
pre_vertex = pre_app_vertex.create_machine_vertex(
pre_vertex_slice, None)
post_app_vertex = SimpleApplicationVertex(10)
post_vertex_slice = Slice(0, 9)
post_vertex = post_app_vertex.create_machine_vertex(
post_vertex_slice, None)
post_slice_index = 0
one_to_one_connector_1 = OneToOneConnector(None)
direct_synapse_information_1 = SynapseInformation(
one_to_one_connector_1, pre_app_vertex, post_app_vertex, False,
False, None, SynapseDynamicsStatic(), 0, 1.5, 1.0)
one_to_one_connector_1.set_projection_information(
machine_time_step, direct_synapse_information_1)
one_to_one_connector_2 = OneToOneConnector(None)
direct_synapse_information_2 = SynapseInformation(
one_to_one_connector_2, pre_app_vertex, post_app_vertex, False,
False, None, SynapseDynamicsStatic(), 1, 2.5, 2.0)
one_to_one_connector_2.set_projection_information(
machine_time_step, direct_synapse_information_2)
all_to_all_connector = AllToAllConnector(None)
all_to_all_synapse_information = SynapseInformation(
all_to_all_connector, pre_app_vertex, post_app_vertex, False,
False, None, SynapseDynamicsStatic(), 0, 4.5, 4.0)
all_to_all_connector.set_projection_information(
machine_time_step, all_to_all_synapse_information)
app_edge = ProjectionApplicationEdge(pre_app_vertex, post_app_vertex,
direct_synapse_information_1)
app_edge.add_synapse_information(direct_synapse_information_2)
app_edge.add_synapse_information(all_to_all_synapse_information)
machine_edge = app_edge.create_machine_edge(pre_vertex,
post_vertex,
label=None)
partition_name = "TestPartition"
graph = MachineGraph("Test")
graph.add_vertex(pre_vertex)
graph.add_vertex(post_vertex)
graph.add_edge(machine_edge, partition_name)
weight_scales = [4096.0, 4096.0]
key = 0
routing_info = RoutingInfo()
routing_info.add_partition_info(
PartitionRoutingInfo(
[BaseKeyAndMask(key, 0xFFFFFFF0)],
graph.get_outgoing_edge_partition_starting_at_vertex(
pre_vertex, partition_name)))
temp_spec = tempfile.mktemp()
spec_writer = FileDataWriter(temp_spec)
spec = DataSpecificationGenerator(spec_writer, None)
master_pop_sz = 1000
all_syn_block_sz = 2000
master_pop_region = 0
synapse_region = 1
direct_region = 2
spec.reserve_memory_region(master_pop_region, master_pop_sz)
spec.reserve_memory_region(synapse_region, all_syn_block_sz)
synaptic_manager = SynapticManager(n_synapse_types=2,
ring_buffer_sigma=5.0,
spikes_per_second=100.0,
config=config)
# Poke in our testing region IDs
synaptic_manager._pop_table_region = master_pop_region
synaptic_manager._synaptic_matrix_region = synapse_region
synaptic_manager._direct_matrix_region = direct_region
synaptic_manager._write_synaptic_matrix_and_master_population_table(
spec, [post_vertex_slice], post_slice_index, post_vertex,
post_vertex_slice, all_syn_block_sz, weight_scales, routing_info,
graph, machine_time_step)
spec.end_specification()
spec_writer.close()
spec_reader = FileDataReader(temp_spec)
executor = DataSpecificationExecutor(spec_reader,
master_pop_sz + all_syn_block_sz)
executor.execute()
master_pop_table = executor.get_region(0)
synaptic_matrix = executor.get_region(1)
direct_matrix = executor.get_region(2)
all_data = bytearray()
all_data.extend(
master_pop_table.region_data[:master_pop_table.max_write_pointer])
all_data.extend(
synaptic_matrix.region_data[:synaptic_matrix.max_write_pointer])
all_data.extend(
direct_matrix.region_data[:direct_matrix.max_write_pointer])
master_pop_table_address = 0
synaptic_matrix_address = master_pop_table.max_write_pointer
direct_synapses_address = (synaptic_matrix_address +
synaptic_matrix.max_write_pointer)
direct_synapses_address += 4
indirect_synapses_address = synaptic_matrix_address
placement = Placement(None, 0, 0, 1)
transceiver = MockTransceiverRawData(all_data)
# Get the master population table details
items = synaptic_manager._extract_synaptic_matrix_data_location(
key, master_pop_table_address, transceiver, placement)
# The first entry should be direct, but the rest should be indirect;
# the second is potentially direct, but has been restricted by the
# restriction on the size of the direct matrix
assert len(items) == 3
assert items[0][2]
assert not items[1][2]
assert not items[2][2]
data_1, row_len_1 = synaptic_manager._retrieve_synaptic_block(
txrx=transceiver,
placement=placement,
master_pop_table_address=master_pop_table_address,
indirect_synapses_address=indirect_synapses_address,
direct_synapses_address=direct_synapses_address,
key=key,
n_rows=pre_vertex_slice.n_atoms,
index=0,
using_monitors=False)
connections_1 = synaptic_manager._read_synapses(
direct_synapse_information_1, pre_vertex_slice, post_vertex_slice,
row_len_1, 0, weight_scales, data_1, None, machine_time_step)
# The first matrix is a 1-1 matrix, so row length is 1
assert row_len_1 == 1
# Check that all the connections have the right weight and delay
assert len(connections_1) == post_vertex_slice.n_atoms
assert all([conn["weight"] == 1.5 for conn in connections_1])
assert all([conn["delay"] == 1.0 for conn in connections_1])
data_2, row_len_2 = synaptic_manager._retrieve_synaptic_block(
txrx=transceiver,
placement=placement,
master_pop_table_address=master_pop_table_address,
indirect_synapses_address=indirect_synapses_address,
direct_synapses_address=direct_synapses_address,
key=key,
n_rows=pre_vertex_slice.n_atoms,
index=1,
using_monitors=False)
connections_2 = synaptic_manager._read_synapses(
direct_synapse_information_2, pre_vertex_slice, post_vertex_slice,
row_len_2, 0, weight_scales, data_2, None, machine_time_step)
# The second matrix is a 1-1 matrix, so row length is 1
assert row_len_2 == 1
# Check that all the connections have the right weight and delay
assert len(connections_2) == post_vertex_slice.n_atoms
assert all([conn["weight"] == 2.5 for conn in connections_2])
assert all([conn["delay"] == 2.0 for conn in connections_2])
data_3, row_len_3 = synaptic_manager._retrieve_synaptic_block(
txrx=transceiver,
placement=placement,
master_pop_table_address=master_pop_table_address,
indirect_synapses_address=indirect_synapses_address,
direct_synapses_address=direct_synapses_address,
key=key,
n_rows=pre_vertex_slice.n_atoms,
index=2,
using_monitors=False)
connections_3 = synaptic_manager._read_synapses(
all_to_all_synapse_information, pre_vertex_slice,
post_vertex_slice, row_len_3, 0, weight_scales, data_3, None,
machine_time_step)
# The third matrix is an all-to-all matrix, so length is n_atoms
assert row_len_3 == post_vertex_slice.n_atoms
# Check that all the connections have the right weight and delay
assert len(connections_3) == \
post_vertex_slice.n_atoms * pre_vertex_slice.n_atoms
assert all([conn["weight"] == 4.5 for conn in connections_3])
assert all([conn["delay"] == 4.0 for conn in connections_3])
def test_retrieve_synaptic_block(self):
default_config_paths = os.path.join(
os.path.dirname(abstract_spinnaker_common.__file__),
AbstractSpiNNakerCommon.CONFIG_FILE_NAME)
config = conf_loader.load_config(
AbstractSpiNNakerCommon.CONFIG_FILE_NAME, default_config_paths)
key = 0
synaptic_manager = SynapticManager(
n_synapse_types=2,
ring_buffer_sigma=5.0,
spikes_per_second=100.0,
config=config,
population_table_type=MockMasterPopulationTable(
{key: [(1, 0, False)]}),
synapse_io=MockSynapseIO())
transceiver = MockTransceiverRawData(bytearray(16))
placement = Placement(None, 0, 0, 1)
first_block, row_len_1 = synaptic_manager._retrieve_synaptic_block(
txrx=transceiver,
placement=placement,
master_pop_table_address=0,
indirect_synapses_address=0,
direct_synapses_address=0,
key=key,
n_rows=1,
index=0,
using_monitors=False)
same_block, row_len_1_2 = synaptic_manager._retrieve_synaptic_block(
txrx=transceiver,
placement=placement,
master_pop_table_address=0,
indirect_synapses_address=0,
direct_synapses_address=0,
key=key,
n_rows=1,
index=0,
using_monitors=False)
synaptic_manager.clear_connection_cache()
different_block, row_len_2 = synaptic_manager._retrieve_synaptic_block(
txrx=transceiver,
placement=placement,
master_pop_table_address=0,
indirect_synapses_address=0,
direct_synapses_address=0,
key=key,
n_rows=1,
index=0,
using_monitors=False)
# Check that the row lengths are all the same
assert row_len_1 == row_len_1_2
assert row_len_1 == row_len_2
# Check that the block retrieved twice without reset is cached
assert id(first_block) == id(same_block)
# Check that the block after reset is not a copy
assert id(first_block) != id(different_block)
def test_write_data_spec():
unittest_setup()
# UGLY but the mock transceiver NEED generate_on_machine to be False
AbstractGenerateConnectorOnMachine.generate_on_machine = say_false
machine = virtual_machine(2, 2)
p.setup(1.0)
load_config()
p.set_number_of_neurons_per_core(p.IF_curr_exp, 100)
pre_pop = p.Population(
10, p.IF_curr_exp(), label="Pre",
additional_parameters={
"splitter": SplitterAbstractPopulationVertexSlice()})
post_pop = p.Population(
10, p.IF_curr_exp(), label="Post",
additional_parameters={
"splitter": SplitterAbstractPopulationVertexSlice()})
proj_one_to_one_1 = p.Projection(
pre_pop, post_pop, p.OneToOneConnector(),
p.StaticSynapse(weight=1.5, delay=1.0))
proj_one_to_one_2 = p.Projection(
pre_pop, post_pop, p.OneToOneConnector(),
p.StaticSynapse(weight=2.5, delay=2.0))
proj_all_to_all = p.Projection(
pre_pop, post_pop, p.AllToAllConnector(allow_self_connections=False),
p.StaticSynapse(weight=4.5, delay=4.0))
# spynnaker8.setup(timestep=1)
# # Add an sdram so max SDRAM is high enough
# SDRAM(10000)
#
# set_config("Simulation", "one_to_one_connection_dtcm_max_bytes", 40)
#
# placements = Placements()
# pre_app_population = MockPopulation(10, "mock pop pre")
# pre_app_vertex = SimpleTestVertex(10, label="pre")
# pre_app_vertex.splitter = MockSplitter()
# pre_app_vertex.splitter._called = True
# pre_vertex_slice = Slice(0, 9)
#
# post_app_population = MockPopulation(10, "mock pop post")
# pre_vertex = pre_app_vertex.create_machine_vertex(
# pre_vertex_slice, None)
# placements.add_placement(Placement(pre_vertex, 0, 0, 1))
# post_app_vertex = SimpleTestVertex(10, label="post")
# post_app_vertex.splitter = MockSplitter()
# post_app_vertex.splitter._called = True
# post_vertex_slice = Slice(0, 9)
# post_vertex = post_app_vertex.create_machine_vertex(
# post_vertex_slice, None)
# post_vertex_placement = Placement(post_vertex, 0, 0, 2)
# placements.add_placement(post_vertex_placement)
# delay_app_vertex = DelayExtensionVertex(
# 10, 16, 51, pre_app_vertex, label="delay")
# delay_app_vertex.set_new_n_delay_stages_and_delay_per_stage(
# 16, 51)
# delay_app_vertex.splitter = SplitterDelayVertexSlice(
# pre_app_vertex.splitter)
# delay_vertex = DelayExtensionMachineVertex(
# resources_required=None, label="", constraints=[],
# app_vertex=delay_app_vertex, vertex_slice=post_vertex_slice)
# placements.add_placement(Placement(delay_vertex, 0, 0, 3))
# one_to_one_connector_1 = OneToOneConnector(None)
# direct_synapse_information_1 = SynapseInformation(
# one_to_one_connector_1, pre_app_population, post_app_population,
# False, False, None, SynapseDynamicsStatic(), 0, True, 1.5, 1.0)
# one_to_one_connector_1.set_projection_information(
# direct_synapse_information_1)
# one_to_one_connector_2 = OneToOneConnector(None)
# direct_synapse_information_2 = SynapseInformation(
# one_to_one_connector_2, pre_app_population, post_app_population,
# False, False, None, SynapseDynamicsStatic(), 1, True, 2.5, 2.0)
# one_to_one_connector_2.set_projection_information(
# direct_synapse_information_2)
# all_to_all_connector = AllToAllConnector(False)
# all_to_all_synapse_information = SynapseInformation(
# all_to_all_connector, pre_app_population, post_app_population,
# False, False, None, SynapseDynamicsStatic(), 0, True, 4.5, 4.0)
# all_to_all_connector.set_projection_information(
# all_to_all_synapse_information)
from_list_list = [(i, i, i, (i * 5) + 1) for i in range(10)]
proj_from_list = p.Projection(
pre_pop, post_pop, p.FromListConnector(from_list_list),
p.StaticSynapse())
app_graph = globals_variables.get_simulator().original_application_graph
context = {
"ApplicationGraph": app_graph
}
with (injection_context(context)):
delay_adder = DelaySupportAdder()
delay_adder.__call__(app_graph)
partitioner = SpynnakerSplitterPartitioner()
machine_graph, _ = partitioner.__call__(app_graph, machine, 100)
allocator = ZonedRoutingInfoAllocator()
n_keys_mapper = EdgeToNKeysMapper()
n_keys_map = n_keys_mapper.__call__(machine_graph)
routing_info = allocator.__call__(
machine_graph, n_keys_map, flexible=False)
post_vertex = next(iter(post_pop._vertex.machine_vertices))
post_vertex_slice = post_vertex.vertex_slice
post_vertex_placement = Placement(post_vertex, 0, 0, 3)
temp_spec = tempfile.mktemp()
spec = DataSpecificationGenerator(io.FileIO(temp_spec, "wb"), None)
synaptic_matrices = SynapticMatrices(
post_vertex_slice, n_synapse_types=2, all_single_syn_sz=10000,
synaptic_matrix_region=1, direct_matrix_region=2, poptable_region=3,
connection_builder_region=4)
synaptic_matrices.write_synaptic_data(
spec, post_pop._vertex.incoming_projections, all_syn_block_sz=10000,
weight_scales=[32, 32], routing_info=routing_info)
spec.end_specification()
with io.FileIO(temp_spec, "rb") as spec_reader:
executor = DataSpecificationExecutor(spec_reader, 20000)
executor.execute()
all_data = bytearray()
all_data.extend(bytearray(executor.get_header()))
all_data.extend(bytearray(executor.get_pointer_table(0)))
for r in range(MAX_MEM_REGIONS):
region = executor.get_region(r)
if region is not None:
all_data.extend(region.region_data)
transceiver = MockTransceiverRawData(all_data)
report_folder = mkdtemp()
try:
connections_1 = numpy.concatenate(
synaptic_matrices.get_connections_from_machine(
transceiver, post_vertex_placement,
proj_one_to_one_1._projection_edge,
proj_one_to_one_1._synapse_information))
# Check that all the connections have the right weight and delay
assert len(connections_1) == post_vertex_slice.n_atoms
assert all([conn["weight"] == 1.5 for conn in connections_1])
assert all([conn["delay"] == 1.0 for conn in connections_1])
connections_2 = numpy.concatenate(
synaptic_matrices.get_connections_from_machine(
transceiver, post_vertex_placement,
proj_one_to_one_2._projection_edge,
proj_one_to_one_2._synapse_information))
# Check that all the connections have the right weight and delay
assert len(connections_2) == post_vertex_slice.n_atoms
assert all([conn["weight"] == 2.5 for conn in connections_2])
assert all([conn["delay"] == 2.0 for conn in connections_2])
connections_3 = numpy.concatenate(
synaptic_matrices.get_connections_from_machine(
transceiver, post_vertex_placement,
proj_all_to_all._projection_edge,
proj_all_to_all._synapse_information))
# Check that all the connections have the right weight and delay
assert len(connections_3) == 100
assert all([conn["weight"] == 4.5 for conn in connections_3])
assert all([conn["delay"] == 4.0 for conn in connections_3])
connections_4 = numpy.concatenate(
synaptic_matrices.get_connections_from_machine(
transceiver, post_vertex_placement,
proj_from_list._projection_edge,
proj_from_list._synapse_information))
# Check that all the connections have the right weight and delay
assert len(connections_4) == len(from_list_list)
list_weights = [values[2] for values in from_list_list]
list_delays = [values[3] for values in from_list_list]
assert all(list_weights == connections_4["weight"])
assert all(list_delays == connections_4["delay"])
finally:
shutil.rmtree(report_folder, ignore_errors=True)