class Test_CCL(unittest.TestCase):
@classmethod
def setUpClass(self):
self.station = station.Station()
self.CCL_qubit = ct.CCLight_Transmon('CCL_qubit')
self.MW1 = vmw.VirtualMWsource('MW1')
self.MW2 = vmw.VirtualMWsource('MW2')
self.MW3 = vmw.VirtualMWsource('MW3')
self.SH = sh.virtual_SignalHound_USB_SA124B('SH')
self.UHFQC = UHF.UHFQC(name='UHFQC',
server='emulator',
device='dev2109',
interface='1GbE')
self.CCL = dummy_CCL('CCL')
# self.VSM = Dummy_Duplexer('VSM')
self.VSM = Dummy_QuTechVSMModule('VSM')
self.MC = measurement_control.MeasurementControl(
'MC', live_plot_enabled=False, verbose=False)
self.MC.station = self.station
self.station.add_component(self.MC)
# Required to set it to the testing datadir
test_datadir = os.path.join(pq.__path__[0], 'tests', 'test_output')
self.MC.datadir(test_datadir)
a_tools.datadir = self.MC.datadir()
self.AWG = HDAWG.ZI_HDAWG8(name='DummyAWG8',
server='emulator',
num_codewords=32,
device='dev8026',
interface='1GbE')
self.AWG8_VSM_MW_LutMan = mwl.AWG8_VSM_MW_LutMan('MW_LutMan_VSM')
self.AWG8_VSM_MW_LutMan.AWG(self.AWG.name)
self.AWG8_VSM_MW_LutMan.channel_GI(1)
self.AWG8_VSM_MW_LutMan.channel_GQ(2)
self.AWG8_VSM_MW_LutMan.channel_DI(3)
self.AWG8_VSM_MW_LutMan.channel_DQ(4)
self.AWG8_VSM_MW_LutMan.mw_modulation(100e6)
self.AWG8_VSM_MW_LutMan.sampling_rate(2.4e9)
self.ro_lutman = UHFQC_RO_LutMan('RO_lutman',
num_res=5,
feedline_number=0)
self.ro_lutman.AWG(self.UHFQC.name)
# Assign instruments
self.CCL_qubit.instr_LutMan_MW(self.AWG8_VSM_MW_LutMan.name)
self.CCL_qubit.instr_LO_ro(self.MW1.name)
self.CCL_qubit.instr_LO_mw(self.MW2.name)
self.CCL_qubit.instr_spec_source(self.MW3.name)
self.CCL_qubit.instr_acquisition(self.UHFQC.name)
self.CCL_qubit.instr_VSM(self.VSM.name)
self.CCL_qubit.instr_CC(self.CCL.name)
self.CCL_qubit.instr_LutMan_RO(self.ro_lutman.name)
self.CCL_qubit.instr_MC(self.MC.name)
self.CCL_qubit.instr_SH(self.SH.name)
config_fn = os.path.join(pq.__path__[0], 'tests', 'openql',
'test_cfg_CCL.json')
self.CCL_qubit.cfg_openql_platform_fn(config_fn)
# Setting some "random" initial parameters
self.CCL_qubit.ro_freq(5.43e9)
self.CCL_qubit.ro_freq_mod(200e6)
self.CCL_qubit.freq_qubit(4.56e9)
self.CCL_qubit.freq_max(4.62e9)
self.CCL_qubit.mw_freq_mod(-100e6)
self.CCL_qubit.mw_awg_ch(1)
self.CCL_qubit.cfg_qubit_nr(0)
self.CCL_qubit.mw_vsm_delay(15)
self.CCL_qubit.mw_mixer_offs_GI(.1)
self.CCL_qubit.mw_mixer_offs_GQ(.2)
self.CCL_qubit.mw_mixer_offs_DI(.3)
self.CCL_qubit.mw_mixer_offs_DQ(.4)
##############################################
# calculate methods
##############################################
def test_calc_freq(self):
self.CCL_qubit.cfg_qubit_freq_calc_method('latest')
self.CCL_qubit.calculate_frequency()
self.CCL_qubit.cfg_qubit_freq_calc_method('flux')
self.CCL_qubit.calculate_frequency()
##############################################
# basic prepare methods
##############################################
def test_prep_for_continuous_wave(self):
self.CCL_qubit.ro_acq_weight_type('optimal')
with warnings.catch_warnings(record=True) as w:
self.CCL_qubit.prepare_for_continuous_wave()
self.assertEqual(str(w[0].message),
'Changing ro_acq_weight_type to SSB.')
self.CCL_qubit.ro_acq_weight_type('SSB')
self.CCL_qubit.prepare_for_continuous_wave()
@unittest.skipIf(True, 'Test for use with an old duplexer.')
def test_prep_cw_config_vsm(self):
self.CCL_qubit.spec_vsm_ch_in(2)
self.CCL_qubit.spec_vsm_ch_out(1)
self.CCL_qubit.spec_vsm_amp(0.5)
self.CCL_qubit.prepare_for_continuous_wave()
self.assertEqual(self.VSM.in1_out1_switch(), 'OFF')
self.assertEqual(self.VSM.in1_out2_switch(), 'OFF')
self.assertEqual(self.VSM.in2_out1_switch(), 'EXT')
self.assertEqual(self.VSM.in2_out2_switch(), 'OFF')
self.assertEqual(self.VSM.in2_out1_amp(), 0.5)
def test_prep_for_fluxing(self):
self.CCL_qubit.prepare_for_fluxing()
@unittest.skip('Not Implemented')
def test_prep_flux_bias(self):
raise NotImplementedError()
##############################################
# Testing prepare for readout
##############################################
def test_prep_readout(self):
self.CCL_qubit.prepare_readout()
def test_prep_ro_instantiate_detectors(self):
self.MC.soft_avg(1)
self.CCL_qubit.ro_soft_avg(4)
detector_attributes = [
'int_avg_det', 'int_log_det', 'int_avg_det_single',
'input_average_detector'
]
for det_attr in detector_attributes:
if hasattr(self.CCL_qubit, det_attr):
delattr(self.CCL_qubit, det_attr)
# Test there are no detectors to start with
for det_attr in detector_attributes:
self.assertFalse(hasattr(self.CCL_qubit, det_attr))
self.CCL_qubit.prepare_readout()
# Test that the detectors have been instantiated
for det_attr in detector_attributes:
self.assertTrue(hasattr(self.CCL_qubit, det_attr))
self.assertEqual(self.MC.soft_avg(), 4)
def test_prep_ro_MW_sources(self):
LO = self.CCL_qubit.instr_LO_ro.get_instr()
LO.off()
LO.frequency(4e9)
LO.power(10)
self.assertEqual(LO.status(), 'off')
self.assertEqual(LO.frequency(), 4e9)
self.CCL_qubit.mw_pow_td_source(20)
self.CCL_qubit.ro_freq(5.43e9)
self.CCL_qubit.ro_freq_mod(200e6)
self.CCL_qubit.prepare_readout()
self.assertEqual(LO.status(), 'on')
self.assertEqual(LO.frequency(), 5.43e9 - 200e6)
self.assertEqual(LO.power(), 20)
def test_prep_ro_pulses(self):
self.CCL_qubit.ro_pulse_mixer_alpha(1.1)
self.CCL_qubit.ro_pulse_mixer_phi(4)
self.CCL_qubit.ro_pulse_length(312e-9)
self.CCL_qubit.ro_pulse_down_amp0(.1)
self.CCL_qubit.ro_pulse_down_length0(23e-9)
self.CCL_qubit.ro_pulse_mixer_offs_I(.01)
self.CCL_qubit.ro_pulse_mixer_offs_Q(.02)
self.CCL_qubit.prepare_readout()
self.assertEqual(self.ro_lutman.mixer_phi(), 4)
self.assertEqual(self.ro_lutman.mixer_alpha(), 1.1)
self.assertEqual(self.ro_lutman.M_length_R0(), 312e-9)
self.assertEqual(self.ro_lutman.M_down_length0_R0(), 23e-9)
self.assertEqual(self.ro_lutman.M_down_amp0_R0(), .1)
self.assertEqual(self.UHFQC.sigouts_0_offset(), .01)
self.assertEqual(self.UHFQC.sigouts_1_offset(), .02)
def test_prep_ro_integration_weigths(self):
IF = 50e6
self.CCL_qubit.ro_freq_mod(IF)
self.CCL_qubit.ro_acq_weight_chI(3)
self.CCL_qubit.ro_acq_weight_chQ(4)
# Testing SSB
trace_length = 4096
self.CCL_qubit.ro_acq_weight_type('SSB')
self.CCL_qubit.prepare_readout()
tbase = np.arange(0, trace_length / 1.8e9, 1 / 1.8e9)
cosI = np.array(np.cos(2 * np.pi * IF * tbase))
self.assertEqual(self.UHFQC.qas_0_rotations_3(), 1 + 1j)
self.assertEqual(self.UHFQC.qas_0_rotations_4(), 1 - 1j)
uploaded_wf = self.UHFQC.qas_0_integration_weights_3_real()
np.testing.assert_array_almost_equal(cosI, uploaded_wf)
# Testing DSB case
self.CCL_qubit.ro_acq_weight_type('DSB')
self.CCL_qubit.prepare_readout()
self.assertEqual(self.UHFQC.qas_0_rotations_3(), 2)
self.assertEqual(self.UHFQC.qas_0_rotations_4(), 2)
# Testing Optimal weight uploading
test_I = np.ones(10)
test_Q = 0.5 * test_I
self.CCL_qubit.ro_acq_weight_func_I(test_I)
self.CCL_qubit.ro_acq_weight_func_Q(test_Q)
self.CCL_qubit.ro_acq_weight_type('optimal')
self.CCL_qubit.prepare_readout()
self.UHFQC.qas_0_rotations_4(.21 + 0.108j)
upl_I = self.UHFQC.qas_0_integration_weights_3_real()
upl_Q = self.UHFQC.qas_0_integration_weights_3_imag()
np.testing.assert_array_almost_equal(test_I, upl_I)
np.testing.assert_array_almost_equal(test_Q, upl_Q)
self.assertEqual(self.UHFQC.qas_0_rotations_3(), 1 - 1j)
# These should not have been touched by optimal weights
self.assertEqual(self.UHFQC.qas_0_rotations_4(), .21 + .108j)
self.CCL_qubit.ro_acq_weight_type('SSB')
########################################################
# Test prepare for timedomain #
########################################################
def test_prep_for_timedomain(self):
self.CCL_qubit.prepare_for_timedomain()
def test_prep_td_sources(self):
self.MW1.off()
self.MW2.off()
self.CCL_qubit.freq_qubit(4.56e9)
self.CCL_qubit.mw_freq_mod(-100e6)
self.CCL_qubit.mw_pow_td_source(13)
self.CCL_qubit.prepare_for_timedomain()
self.assertEqual(self.MW1.status(), 'on')
self.assertEqual(self.MW2.status(), 'on')
self.assertEqual(self.MW2.frequency(), 4.56e9 + 100e6)
self.assertEqual(self.MW2.power(), 13)
def test_prep_td_pulses(self):
self.CCL_qubit.mw_awg_ch(5)
self.CCL_qubit.mw_G_mixer_alpha(1.02)
self.CCL_qubit.mw_D_mixer_phi(8)
self.CCL_qubit.mw_mixer_offs_GI(.1)
self.CCL_qubit.mw_mixer_offs_GQ(.2)
self.CCL_qubit.mw_mixer_offs_DI(.3)
self.CCL_qubit.mw_mixer_offs_DQ(.4)
self.CCL_qubit.mw_ef_amp(.34)
self.CCL_qubit.mw_freq_mod(-100e6)
self.CCL_qubit.anharmonicity(-235e6)
self.CCL_qubit.prepare_for_timedomain()
self.assertEqual(self.AWG8_VSM_MW_LutMan.channel_GI(), 5)
self.assertEqual(self.AWG8_VSM_MW_LutMan.channel_GQ(), 6)
self.assertEqual(self.AWG8_VSM_MW_LutMan.channel_DI(), 7)
self.assertEqual(self.AWG8_VSM_MW_LutMan.channel_DQ(), 8)
self.assertEqual(self.AWG8_VSM_MW_LutMan.G_mixer_alpha(), 1.02)
self.assertEqual(self.AWG8_VSM_MW_LutMan.D_mixer_phi(), 8)
self.assertEqual(self.CCL.vsm_channel_delay0(),
self.CCL_qubit.mw_vsm_delay())
self.assertEqual(self.AWG.sigouts_4_offset(), .1)
self.assertEqual(self.AWG.sigouts_5_offset(), .2)
self.assertEqual(self.AWG.sigouts_6_offset(), .3)
self.assertEqual(self.AWG.sigouts_7_offset(), .4)
self.assertEqual(self.AWG8_VSM_MW_LutMan.mw_ef_amp180(), .34)
self.assertEqual(self.AWG8_VSM_MW_LutMan.mw_ef_modulation(), -335e6)
def test_prep_td_config_vsm(self):
self.CCL_qubit.mw_vsm_G_amp(0.8)
self.CCL_qubit.mw_vsm_D_phase(0)
self.CCL_qubit.mw_vsm_ch_in(2)
self.CCL_qubit.mw_vsm_mod_out(5)
self.CCL_qubit.prepare_for_timedomain()
self.assertEqual(self.VSM.mod5_ch2_gaussian_amp(), 0.8)
self.assertEqual(self.VSM.mod5_ch2_derivative_phase(), 0)
###################################################
# Test basic experiments #
###################################################
def test_cal_mixer_offsets_drive(self):
self.CCL_qubit.calibrate_mixer_offsets_drive()
def test_resonator_spec(self):
self.CCL_qubit.ro_acq_weight_type('SSB')
# set to not set to bypass validator
self.CCL_qubit.freq_res._save_val(None)
try:
self.CCL_qubit.find_resonator_frequency()
except ValueError:
pass # Fit can fail because testing against random data
self.CCL_qubit.freq_res(5.4e9)
try:
self.CCL_qubit.find_resonator_frequency()
except ValueError:
pass # Fit can fail because testing against random data
freqs = np.linspace(6e9, 6.5e9, 31)
self.CCL_qubit.measure_heterodyne_spectroscopy(freqs=freqs,
analyze=False)
def test_resonator_power(self):
self.CCL_qubit.ro_acq_weight_type('SSB')
freqs = np.linspace(6e9, 6.5e9, 31)
powers = np.arange(-30, -10, 5)
# set to not set to bypass validator
self.CCL_qubit.freq_res._save_val(None)
self.CCL_qubit.measure_resonator_power(freqs=freqs, powers=powers)
def test_measure_transients(self):
self.CCL_qubit.ro_acq_input_average_length(2e-6)
self.CCL_qubit.measure_transients()
@unittest.skip('OpenQL bug for CCL config')
def test_qubit_spec(self):
freqs = np.linspace(6e9, 6.5e9, 31)
# Data cannot be analyzed as dummy data is just random numbers
self.CCL_qubit.measure_spectroscopy(freqs=freqs, analyze=False)
def test_find_qubit_freq(self):
self.CCL_qubit.cfg_qubit_freq_calc_method('latest')
try:
self.CCL_qubit.find_frequency()
except TypeError:
# Because the test runs against dummy data, the analysis
# can fail on a failing fit which raises a type error when
# creating the custom text string. This test now only tests
# if the find_frequency method runs until the expected part.
# This should be fixed by making the analysis robust.
pass
self.CCL_qubit.cfg_qubit_freq_calc_method('flux')
try:
self.CCL_qubit.find_frequency()
except TypeError:
pass
def test_AllXY(self):
self.CCL_qubit.measure_allxy()
def test_T1(self):
self.CCL_qubit.measure_T1(times=np.arange(0, 1e-6, 20e-9),
update=False,
analyze=False)
self.CCL_qubit.T1(20e-6)
self.CCL_qubit.measure_T1(update=False, analyze=False)
def test_Ramsey(self):
self.CCL_qubit.mw_freq_mod(100e6)
# Cannot analyze dummy data as analysis will fail on fit
self.CCL_qubit.measure_ramsey(times=np.arange(0, 1e-6, 20e-9),
update=False,
analyze=False)
self.CCL_qubit.T2_star(20e-6)
self.CCL_qubit.measure_ramsey(update=False, analyze=False)
def test_echo(self):
self.CCL_qubit.mw_freq_mod(100e6)
# self.CCL_qubit.measure_echo(times=np.arange(0,2e-6,40e-9))
time.sleep(1)
self.CCL_qubit.T2_echo(40e-6)
self.CCL_qubit.measure_echo(analyze=False, update=False)
time.sleep(1)
with self.assertRaises(ValueError):
invalid_times = [0.1e-9, 0.2e-9, 0.3e-9, 0.4e-9]
self.CCL_qubit.measure_echo(times=invalid_times)
with self.assertRaises(ValueError):
self.CCL_qubit.mw_freq_mod(.1e6)
invalid_times = np.arange(0, 2e-6, 60e-9)
self.CCL_qubit.measure_echo(times=invalid_times)
self.CCL_qubit.mw_freq_mod(100e6)
@classmethod
def tearDownClass(self):
for inststr in list(self.CCL_qubit._all_instruments):
try:
inst = self.CCL_qubit.find_instrument(inststr)
inst.close()
except KeyError:
pass
for i, res in enumerate(resonator_codeword_bit_mapping):
rolut.set('M_amp_R{}'.format(res), amps[i])
rolut.set('M_phi_R{}'.format(res), -45)
rolut.set('M_down_amp0_R{}'.format(res), amps[i] / 2)
rolut.set('M_down_amp1_R{}'.format(res), -amps[i] / 2)
rolut.set('M_down_phi0_R{}'.format(res), -45 + 180)
rolut.set('M_down_phi1_R{}'.format(res), -45)
rolut.set('M_length_R{}'.format(res), 500e-9)
rolut.set('M_down_length0_R{}'.format(res), 200e-9)
rolut.set('M_down_length1_R{}'.format(res), 200e-9)
rolut.set('M_modulation_R{}'.format(res), 0)
rolut.acquisition_delay(200e-9)
rolut.AWG(instr.ro_0.name)
rolut.sampling_rate(1.8e9)
rolut.generate_standard_waveforms()
rolut.pulse_type('M_up_down_down')
#rolut.resonator_combinations([[0], [2], [3], [5], [6]]) # FIXME: must use resonators from resonator_codeword_bit_mapping
rolut.resonator_combinations([[
0, 2, 3, 5, 6
]]) # FIXME: must use resonators from resonator_codeword_bit_mapping
rolut.load_DIO_triggered_sequence_onto_UHFQC(
) # upload waveforms and ZIseqC program
instr.ro_0.awgs_0_userregs_0(
1024
) # loop_cnt, see UHFQC driver (awg_sequence_acquisition_and_DIO_triggered_pulse)
##########################################
class Test_Mock_CCL(unittest.TestCase):
@classmethod
def setUpClass(self):
self.station = station.Station()
self.CCL_qubit = ct.Mock_CCLight_Transmon('CCL_qubit')
self.fluxcurrent = flx.virtual_SPI_S4g_FluxCurrent('fluxcurrent',
channel_map={
'FBL_Q1':
(0, 0),
'FBL_Q2':
(0, 1),
})
self.fluxcurrent.FBL_Q1(0)
self.fluxcurrent.FBL_Q2(0)
self.station.add_component(self.fluxcurrent)
self.MW1 = vmw.VirtualMWsource('MW1')
self.MW2 = vmw.VirtualMWsource('MW2')
self.MW3 = vmw.VirtualMWsource('MW3')
self.SH = sh.virtual_SignalHound_USB_SA124B('SH')
self.UHFQC = dummy_UHFQC('UHFQC')
self.CCL = dummy_CCL('CCL')
# self.VSM = Dummy_Duplexer('VSM')
self.VSM = Dummy_QuTechVSMModule('VSM')
self.MC = measurement_control.MeasurementControl(
'MC', live_plot_enabled=False, verbose=False)
self.MC.station = self.station
self.station.add_component(self.MC)
# Required to set it to the testing datadir
test_datadir = os.path.join(pq.__path__[0], 'tests', 'test_output')
self.MC.datadir(test_datadir)
a_tools.datadir = self.MC.datadir()
self.AWG = v8.VirtualAWG8('DummyAWG8')
self.AWG8_VSM_MW_LutMan = mwl.AWG8_VSM_MW_LutMan('MW_LutMan_VSM')
self.AWG8_VSM_MW_LutMan.AWG(self.AWG.name)
self.AWG8_VSM_MW_LutMan.channel_GI(1)
self.AWG8_VSM_MW_LutMan.channel_GQ(2)
self.AWG8_VSM_MW_LutMan.channel_DI(3)
self.AWG8_VSM_MW_LutMan.channel_DQ(4)
self.AWG8_VSM_MW_LutMan.mw_modulation(100e6)
self.AWG8_VSM_MW_LutMan.sampling_rate(2.4e9)
self.ro_lutman = UHFQC_RO_LutMan('RO_lutman',
num_res=5,
feedline_number=0)
self.ro_lutman.AWG(self.UHFQC.name)
# Assign instruments
self.CCL_qubit.instr_LutMan_MW(self.AWG8_VSM_MW_LutMan.name)
self.CCL_qubit.instr_LO_ro(self.MW1.name)
self.CCL_qubit.instr_LO_mw(self.MW2.name)
self.CCL_qubit.instr_spec_source(self.MW3.name)
self.CCL_qubit.instr_acquisition(self.UHFQC.name)
self.CCL_qubit.instr_VSM(self.VSM.name)
self.CCL_qubit.instr_CC(self.CCL.name)
self.CCL_qubit.instr_LutMan_RO(self.ro_lutman.name)
self.CCL_qubit.instr_MC(self.MC.name)
self.CCL_qubit.instr_FluxCtrl(self.fluxcurrent.name)
self.CCL_qubit.instr_SH(self.SH.name)
config_fn = os.path.join(pq.__path__[0], 'tests', 'openql',
'test_cfg_CCL.json')
self.CCL_qubit.cfg_openql_platform_fn(config_fn)
# Setting some "random" initial parameters
self.CCL_qubit.ro_freq(5.43e9)
self.CCL_qubit.ro_freq_mod(200e6)
self.CCL_qubit.freq_qubit(4.56e9)
self.CCL_qubit.freq_max(4.62e9)
self.CCL_qubit.mw_freq_mod(-100e6)
self.CCL_qubit.mw_awg_ch(1)
self.CCL_qubit.cfg_qubit_nr(0)
self.CCL_qubit.mw_vsm_delay(15)
self.CCL_qubit.mw_mixer_offs_GI(.1)
self.CCL_qubit.mw_mixer_offs_GQ(.2)
self.CCL_qubit.mw_mixer_offs_DI(.3)
self.CCL_qubit.mw_mixer_offs_DQ(.4)
# self.CCL_qubit.ro_acq_averages(32768)
self.device = do.DeviceCCL(name='device')
self.CCL_qubit.instr_device(self.device.name)
###########################################################
# Test find resonator frequency
###########################################################
def test_find_resonator_frequency(self):
self.CCL_qubit.mock_freq_res_bare(7.58726e9)
self.CCL_qubit.mock_sweetspot_phi_over_phi0(0)
freq_res = self.CCL_qubit.calculate_mock_resonator_frequency()
self.CCL_qubit.freq_res(7.587e9)
self.CCL_qubit.find_resonator_frequency()
assert self.CCL_qubit.freq_res() == pytest.approx(freq_res, abs=1e6)
###########################################################
# Test find qubit frequency
###########################################################
def test_find_frequency(self):
self.CCL_qubit.mock_sweetspot_phi_over_phi0(0)
self.CCL_qubit.mock_Ec(250e6)
self.CCL_qubit.mock_Ej1(8e9)
self.CCL_qubit.mock_Ej2(8e9)
f_qubit = self.CCL_qubit.calculate_mock_qubit_frequency()
self.CCL_qubit.freq_qubit(f_qubit)
self.CCL_qubit.ro_pulse_amp_CW(self.CCL_qubit.mock_ro_pulse_amp_CW())
freq_res = self.CCL_qubit.calculate_mock_resonator_frequency()
self.CCL_qubit.freq_res(freq_res)
self.CCL_qubit.ro_freq(freq_res)
threshold = 0.01e9
self.CCL_qubit.find_frequency()
assert np.abs(f_qubit - self.CCL_qubit.freq_qubit()) <= threshold
###########################################################
# Test MW pulse calibration
###########################################################
def test_calibrate_mw_pulse_amplitude_coarse(self):
for with_vsm in [True, False]:
self.CCL_qubit.mock_sweetspot_phi_over_phi0(0)
f_qubit = self.CCL_qubit.calculate_mock_qubit_frequency()
self.CCL_qubit.freq_res(
self.CCL_qubit.calculate_mock_resonator_frequency())
self.CCL_qubit.freq_qubit(f_qubit)
self.CCL_qubit.cfg_with_vsm(with_vsm)
self.CCL_qubit.mock_mw_amp180(.345)
self.CCL_qubit.calibrate_mw_pulse_amplitude_coarse()
freq_res = self.CCL_qubit.calculate_mock_resonator_frequency()
self.CCL_qubit.ro_freq(freq_res)
eps = 0.05
if self.CCL_qubit.cfg_with_vsm():
assert self.CCL_qubit.mw_vsm_G_amp() == pytest.approx(
self.CCL_qubit.mock_mw_amp180(), abs=eps)
else:
assert self.CCL_qubit.mw_channel_amp() == pytest.approx(
self.CCL_qubit.mw_channel_amp(), abs=eps)
###########################################################
# Test find qubit sweetspot
###########################################################
def test_find_qubit_sweetspot(self):
self.CCL_qubit.mock_sweetspot_phi_over_phi0(0.01343)
current = 0.01343 * self.CCL_qubit.mock_fl_dc_V_per_phi0()[
self.CCL_qubit.mock_cfg_dc_flux_ch()]
self.CCL_qubit.fl_dc_V0(current)
fluxcurrent = self.CCL_qubit.instr_FluxCtrl.get_instr()
fluxcurrent[self.CCL_qubit.mock_cfg_dc_flux_ch()](current)
f_qubit = self.CCL_qubit.calculate_mock_qubit_frequency()
self.CCL_qubit.freq_qubit(f_qubit)
self.CCL_qubit.cfg_dc_flux_ch(self.CCL_qubit.mock_cfg_dc_flux_ch())
self.CCL_qubit.freq_res(
self.CCL_qubit.calculate_mock_resonator_frequency())
freq_res = self.CCL_qubit.calculate_mock_resonator_frequency()
self.CCL_qubit.ro_freq(freq_res)
self.CCL_qubit.find_qubit_sweetspot()
assert self.CCL_qubit.fl_dc_V0() == pytest.approx(current, abs=30e-6)
###########################################################
# Test RO pulse calibration
###########################################################
def test_calibrate_ro_pulse_CW(self):
self.CCL_qubit.mock_ro_pulse_amp_CW(0.05)
self.CCL_qubit.mock_freq_res_bare(7.5e9)
self.CCL_qubit.freq_res(
self.CCL_qubit.calculate_mock_resonator_frequency())
self.device.qubits([self.CCL_qubit.name])
self.CCL_qubit.calibrate_ro_pulse_amp_CW()
eps = 0.1
assert self.CCL_qubit.ro_pulse_amp_CW(
) <= self.CCL_qubit.mock_ro_pulse_amp_CW()
###########################################################
# Test find test resonators
###########################################################
def test_find_test_resonators(self):
self.CCL_qubit.mock_freq_res_bare(7.78542e9)
self.CCL_qubit.mock_freq_test_res(7.9862e9)
res0 = resonator(identifier=0, freq=7.785e9)
res1 = resonator(identifier=1, freq=7.986e9)
self.CCL_qubit.instr_device.get_instr().resonators = [res0, res1]
for res in [res0, res1]:
self.CCL_qubit.find_test_resonators()
if res.identifier == 0:
assert res0.type == 'qubit_resonator'
elif res.identifier == 1:
assert res1.type == 'test_resonator'
###########################################################
# Test Ramsey
###########################################################
def test_ramsey(self):
self.CCL_qubit.mock_Ec(250e6)
self.CCL_qubit.mock_Ej1(8e9)
self.CCL_qubit.mock_Ej2(8e9)
self.CCL_qubit.mock_sweetspot_phi_over_phi0(0)
f_qubit = self.CCL_qubit.calculate_mock_qubit_frequency()
self.CCL_qubit.freq_qubit(f_qubit)
self.CCL_qubit.freq_res(
self.CCL_qubit.calculate_mock_resonator_frequency())
self.CCL_qubit.ro_pulse_amp_CW(self.CCL_qubit.mock_ro_pulse_amp_CW())
freq_res = self.CCL_qubit.calculate_mock_resonator_frequency()
self.CCL_qubit.ro_freq(freq_res)
self.CCL_qubit.mock_T2_star(23e-6)
self.CCL_qubit.T2_star(19e-6)
self.CCL_qubit.measure_ramsey()
threshold = 4e-6
assert self.CCL_qubit.T2_star() == pytest.approx(
self.CCL_qubit.mock_T2_star(), abs=threshold)
###########################################################
# Test T1
###########################################################
def test_T1(self):
self.CCL_qubit.mock_Ec(250e6)
self.CCL_qubit.mock_Ej1(8e9)
self.CCL_qubit.mock_Ej2(8e9)
fluxcurrent = self.CCL_qubit.instr_FluxCtrl.get_instr()
current = self.CCL_qubit.mock_sweetspot_phi_over_phi0()
fluxcurrent[self.CCL_qubit.mock_cfg_dc_flux_ch()](current)
f_qubit = self.CCL_qubit.calculate_mock_qubit_frequency()
self.CCL_qubit.freq_qubit(f_qubit)
freq_res = self.CCL_qubit.calculate_mock_resonator_frequency()
self.CCL_qubit.freq_res(freq_res)
self.CCL_qubit.ro_pulse_amp_CW(self.CCL_qubit.mock_ro_pulse_amp_CW())
self.CCL_qubit.ro_freq(freq_res)
self.CCL_qubit.mock_T1(34.39190e-6)
self.CCL_qubit.T1(40e-6)
self.CCL_qubit.measure_T1()
self.CCL_qubit.measure_T1()
assert self.CCL_qubit.T1() == pytest.approx(self.CCL_qubit.mock_T1(),
abs=5e-6)
###########################################################
# Test Echo
###########################################################
def test_echo(self):
self.CCL_qubit.mock_Ec(250e6)
self.CCL_qubit.mock_Ej1(8e9)
self.CCL_qubit.mock_Ej2(8e9)
self.CCL_qubit.mock_sweetspot_phi_over_phi0(0)
f_qubit = self.CCL_qubit.calculate_mock_qubit_frequency()
self.CCL_qubit.freq_qubit(f_qubit)
self.CCL_qubit.freq_res(
self.CCL_qubit.calculate_mock_resonator_frequency())
self.CCL_qubit.ro_pulse_amp_CW(self.CCL_qubit.mock_ro_pulse_amp_CW())
freq_res = self.CCL_qubit.calculate_mock_resonator_frequency()
self.CCL_qubit.ro_freq(freq_res)
self.CCL_qubit.mock_T2_echo(23e-6)
self.CCL_qubit.T2_echo(19e-6)
self.CCL_qubit.measure_echo()
threshold = 3e-6
assert self.CCL_qubit.T2_echo() == pytest.approx(
self.CCL_qubit.mock_T2_echo(), abs=threshold)
@classmethod
def tearDownClass(self):
for inststr in list(self.CCL_qubit._all_instruments):
try:
inst = self.CCL_qubit.find_instrument(inststr)
inst.close()
except KeyError:
pass
class Test_Device_obj(unittest.TestCase):
@classmethod
def setUpClass(self):
"""
This sets up a mock setup using a CCL to control multiple qubits
"""
self.station = station.Station()
self.MW1 = vmw.VirtualMWsource('MW1')
self.MW2 = vmw.VirtualMWsource('MW2')
self.MW3 = vmw.VirtualMWsource('MW3')
self.SH = sh.virtual_SignalHound_USB_SA124B('SH')
self.UHFQC_0 = UHF.UHFQC(name='UHFQC_0',
server='emulator',
device='dev2109',
interface='1GbE')
self.UHFQC_1 = UHF.UHFQC(name='UHFQC_1',
server='emulator',
device='dev2110',
interface='1GbE')
self.UHFQC_2 = UHF.UHFQC(name='UHFQC_2',
server='emulator',
device='dev2111',
interface='1GbE')
self.CCL = dummy_CCL('CCL')
self.QCC = dummy_QCC('QCC')
self.CC = QuTechCC('CC', DummyTransport())
self.VSM = Dummy_Duplexer('VSM')
self.MC = measurement_control.MeasurementControl(
'MC', live_plot_enabled=False, verbose=False)
self.MC.station = self.station
self.station.add_component(self.MC)
# Required to set it to the testing datadir
test_datadir = os.path.join(pq.__path__[0], 'tests', 'test_output')
self.MC.datadir(test_datadir)
a_tools.datadir = self.MC.datadir()
self.AWG_mw_0 = HDAWG.ZI_HDAWG8(name='AWG_mw_0',
server='emulator',
num_codewords=32,
device='dev8026',
interface='1GbE')
self.AWG_mw_1 = HDAWG.ZI_HDAWG8(name='AWG_mw_1',
server='emulator',
num_codewords=32,
device='dev8027',
interface='1GbE')
self.AWG_flux_0 = HDAWG.ZI_HDAWG8(name='AWG_flux_0',
server='emulator',
num_codewords=32,
device='dev8028',
interface='1GbE')
self.AWG8_VSM_MW_LutMan = mwl.AWG8_VSM_MW_LutMan('MW_LutMan_VSM')
self.AWG8_VSM_MW_LutMan.AWG(self.AWG_mw_0.name)
self.AWG8_VSM_MW_LutMan.channel_GI(1)
self.AWG8_VSM_MW_LutMan.channel_GQ(2)
self.AWG8_VSM_MW_LutMan.channel_DI(3)
self.AWG8_VSM_MW_LutMan.channel_DQ(4)
self.AWG8_VSM_MW_LutMan.mw_modulation(100e6)
self.AWG8_VSM_MW_LutMan.sampling_rate(2.4e9)
self.ro_lutman_0 = UHFQC_RO_LutMan('ro_lutman_0',
feedline_number=0,
feedline_map='S17',
num_res=9)
self.ro_lutman_0.AWG(self.UHFQC_0.name)
self.ro_lutman_1 = UHFQC_RO_LutMan('ro_lutman_1',
feedline_number=1,
feedline_map='S17',
num_res=9)
self.ro_lutman_1.AWG(self.UHFQC_1.name)
self.ro_lutman_2 = UHFQC_RO_LutMan('ro_lutman_2',
feedline_number=2,
feedline_map='S17',
num_res=9)
self.ro_lutman_2.AWG(self.UHFQC_2.name)
# Assign instruments
qubits = []
for q_idx in range(17):
q = ct.CCLight_Transmon('q{}'.format(q_idx))
qubits.append(q)
q.instr_LutMan_MW(self.AWG8_VSM_MW_LutMan.name)
q.instr_LO_ro(self.MW1.name)
q.instr_LO_mw(self.MW2.name)
q.instr_spec_source(self.MW3.name)
if q_idx in [13, 16]:
q.instr_acquisition(self.UHFQC_0.name)
q.instr_LutMan_RO(self.ro_lutman_0.name)
elif q_idx in [1, 4, 5, 7, 8, 10, 11, 14, 15]:
q.instr_acquisition(self.UHFQC_1.name)
q.instr_LutMan_RO(self.ro_lutman_1.name)
elif q_idx in [0, 2, 3, 6, 9, 12]:
q.instr_acquisition(self.UHFQC_2.name)
q.instr_LutMan_RO(self.ro_lutman_2.name)
q.instr_VSM(self.VSM.name)
q.instr_CC(self.CCL.name)
q.instr_MC(self.MC.name)
q.instr_SH(self.SH.name)
config_fn = os.path.join(pq.__path__[0], 'tests',
'test_cfg_CCL.json')
q.cfg_openql_platform_fn(config_fn)
# Setting some "random" initial parameters
q.ro_freq(5.43e9 + q_idx * 50e6)
q.ro_freq_mod(200e6)
q.freq_qubit(4.56e9 + q_idx * 50e6)
q.freq_max(4.62e9 + q_idx * 50e6)
q.mw_freq_mod(-100e6)
q.mw_awg_ch(1)
q.cfg_qubit_nr(q_idx)
# q.mw_vsm_delay(15)
q.mw_mixer_offs_GI(.1)
q.mw_mixer_offs_GQ(.2)
q.mw_mixer_offs_DI(.3)
q.mw_mixer_offs_DQ(.4)
# Set up the device object and set required params
self.device = do.DeviceCCL('device')
self.device.qubits([q.name for q in qubits])
self.device.instr_CC(self.CCL.name)
self.device.instr_AWG_mw_0(self.AWG_mw_0.name)
self.device.instr_AWG_mw_1(self.AWG_mw_1.name)
self.device.instr_AWG_flux_0(self.AWG_flux_0.name)
self.device.ro_lo_freq(6e9)
def test_get_dio_map(self):
self.device.instr_CC(self.CCL.name)
dio_map = self.device.dio_map()
expected_dio_map = {
'ro_0': 1,
'ro_1': 2,
'flux_0': 3,
'mw_0': 4,
'mw_1': 5
}
assert dio_map == expected_dio_map
self.device.instr_CC(self.QCC.name)
dio_map = self.device.dio_map()
expected_dio_map = {
'ro_0': 1,
'ro_1': 2,
'ro_2': 3,
'mw_0': 4,
'mw_1': 5,
'flux_0': 6,
'flux_1': 7,
'flux_2': 8,
'mw_2': 9,
'mw_3': 10,
'mw_4': 11
}
assert dio_map == expected_dio_map
def test_get_dio_map_CC(self):
self.device.instr_CC(self.CC.name)
dio_map = self.device.dio_map()
expected_dio_map = {
'ro_0': 0,
'ro_1': 1,
'ro_2': 2,
'mw_0': 3,
'mw_1': 4,
'flux_0': 6,
'flux_1': 7,
'flux_2': 8
}
assert dio_map == expected_dio_map
def test_prepare_timing_CCL(self):
self.device.instr_CC(self.CCL.name)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-40e-9)
self.device.tim_mw_latency_0(20e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
# DIO timing map for CCL:
# dio1: ro_latency_0
# dio2: ro_latency_1
# dio3: flux_latency_0
# dio4: mw_latency_0
# dio5: mw_latency_1
assert (self.CCL.dio1_out_delay() == 12)
assert (self.CCL.dio2_out_delay() == 11)
assert (self.CCL.dio3_out_delay() == 0)
assert (self.CCL.dio4_out_delay() == 3)
assert (self.CCL.dio5_out_delay() == 2)
def test_prepare_timing_QCC(self):
self.device.instr_CC(self.QCC.name)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-40e-9)
self.device.tim_flux_latency_1(100e-9)
self.device.tim_mw_latency_0(20e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
assert (self.QCC.dio1_out_delay() == 12)
assert (self.QCC.dio2_out_delay() == 11)
assert (self.QCC.dio4_out_delay() == 3)
assert (self.QCC.dio5_out_delay() == 2)
assert (self.QCC.dio6_out_delay() == 0)
assert (self.QCC.dio7_out_delay() == 7)
def test_prepare_timing_QCC_fine(self):
self.device.instr_CC(self.QCC.name)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-36e-9)
self.device.tim_flux_latency_1(100e-9)
self.device.tim_mw_latency_0(23e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
assert (self.QCC.dio1_out_delay() == 12)
assert (self.QCC.dio2_out_delay() == 11)
assert (self.QCC.dio4_out_delay() == 3)
assert (self.QCC.dio5_out_delay() == 2)
assert (self.QCC.dio6_out_delay() == 0)
assert (self.QCC.dio7_out_delay() == 7)
assert (self.AWG_flux_0.sigouts_0_delay() == approx(4e-9))
assert (self.AWG_flux_0.sigouts_7_delay() == approx(4e-9))
assert (self.AWG_mw_0.sigouts_7_delay() == approx(3e-9))
assert (self.AWG_mw_0.sigouts_7_delay() == approx(3e-9))
assert (self.AWG_mw_1.sigouts_7_delay() == approx(0))
assert (self.AWG_mw_1.sigouts_7_delay() == approx(0))
def test_prepare_timing_CC(self):
self.device.instr_CC(self.CC.name)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-40e-9)
self.device.tim_flux_latency_1(100e-9)
self.device.tim_mw_latency_0(20e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
assert (self.CC.dio0_out_delay() == 12)
assert (self.CC.dio1_out_delay() == 11)
assert (self.CC.dio3_out_delay() == 3)
assert (self.CC.dio4_out_delay() == 2)
assert (self.CC.dio6_out_delay() == 0)
assert (self.CC.dio7_out_delay() == 7)
def test_prepare_readout_lo_freqs_config(self):
# Test that the modulation frequencies of all qubits
# are set correctly.
self.device.ro_acq_weight_type('optimal')
qubits = self.device.qubits()
self.device.ro_lo_freq(6e9)
self.device.prepare_readout(qubits=qubits)
# MW1 is specified as the readout LO source
assert self.MW1.frequency() == 6e9
for qname in qubits:
q = self.device.find_instrument(qname)
6e9 + q.ro_freq_mod() == q.ro_freq()
self.device.ro_lo_freq(5.8e9)
self.device.prepare_readout(qubits=qubits)
# MW1 is specified as the readout LO source
assert self.MW1.frequency() == 5.8e9
for qname in qubits:
q = self.device.find_instrument(qname)
5.8e9 + q.ro_freq_mod() == q.ro_freq()
q = self.device.find_instrument('q5')
q.instr_LO_ro(self.MW3.name)
with pytest.raises(ValueError):
self.device.prepare_readout(qubits=qubits)
q.instr_LO_ro(self.MW1.name)
def test_prepare_readout_assign_weights(self):
self.device.ro_lo_freq(6e9)
self.device.ro_acq_weight_type('optimal')
qubits = self.device.qubits()
q13 = self.device.find_instrument('q13')
q13.ro_acq_weight_func_I(np.ones(128))
q13.ro_acq_weight_func_Q(np.ones(128) * .5)
self.device.prepare_readout(qubits=qubits)
exp_ch_map = {
'UHFQC_0': {
'q13': 0,
'q16': 1
},
'UHFQC_1': {
'q1': 0,
'q4': 1,
'q5': 2,
'q7': 3,
'q8': 4,
'q10': 5,
'q11': 6,
'q14': 7,
'q15': 8
},
'UHFQC_2': {
'q0': 0,
'q2': 1,
'q3': 2,
'q6': 3,
'q9': 4,
'q12': 5
}
}
assert exp_ch_map == self.device._acq_ch_map
qb = self.device.find_instrument('q12')
assert qb.ro_acq_weight_chI() == 5
assert qb.ro_acq_weight_chQ() == 6
def test_prepare_readout_assign_weights_order_matters(self):
# Test that the order of the channels is as in the order iterated over
qubits = ['q2', 'q3', 'q0']
self.device.ro_acq_weight_type('optimal')
self.device.prepare_readout(qubits=qubits)
exp_ch_map = {'UHFQC_2': {'q0': 2, 'q2': 0, 'q3': 1}}
assert exp_ch_map == self.device._acq_ch_map
qb = self.device.find_instrument('q3')
assert qb.ro_acq_weight_chI() == 1
assert qb.ro_acq_weight_chQ() == 2
def test_prepare_readout_assign_weights_IQ_counts_double(self):
qubits = ['q2', 'q3', 'q0', 'q13', 'q16']
self.device.ro_acq_weight_type('SSB')
self.device.prepare_readout(qubits=qubits)
exp_ch_map = {
'UHFQC_0': {
'q13': 0,
'q16': 2
},
'UHFQC_2': {
'q0': 4,
'q2': 0,
'q3': 2
}
}
assert exp_ch_map == self.device._acq_ch_map
qb = self.device.find_instrument('q16')
assert qb.ro_acq_weight_chI() == 2
assert qb.ro_acq_weight_chQ() == 3
def test_prepare_readout_assign_weights_too_many_raises(self):
qubits = self.device.qubits()
self.device.ro_acq_weight_type('SSB')
with pytest.raises(ValueError):
self.device.prepare_readout(qubits=qubits)
def test_prepare_readout_resets_UHF(self):
uhf = self.device.find_instrument('UHFQC_2')
uhf.qas_0_correlations_5_enable(1)
uhf.qas_0_correlations_5_source(3)
uhf.qas_0_thresholds_5_correlation_enable(1)
uhf.qas_0_thresholds_5_correlation_source(3)
assert uhf.qas_0_correlations_5_enable() == 1
assert uhf.qas_0_correlations_5_source() == 3
assert uhf.qas_0_thresholds_5_correlation_enable() == 1
assert uhf.qas_0_thresholds_5_correlation_source() == 3
self.device.prepare_readout(qubits=['q0'])
assert uhf.qas_0_correlations_5_enable() == 0
assert uhf.qas_0_correlations_5_source() == 0
assert uhf.qas_0_thresholds_5_correlation_enable() == 0
assert uhf.qas_0_thresholds_5_correlation_source() == 0
def test_prepare_ro_pulses_resonator_combinations(self):
# because not all combinations are supported the default is to
# support
qubits = ['q2', 'q3', 'q0', 'q13', 'q16']
self.device.prepare_readout(qubits=qubits)
# Combinations are based on qubit number
res_combs0 = self.ro_lutman_0.resonator_combinations()
exp_res_combs0 = [[13], [16], [13, 16]]
assert res_combs0 == exp_res_combs0
res_combs2 = self.ro_lutman_2.resonator_combinations()
exp_res_combs2 = [[2], [3], [0], [2, 3, 0]]
assert res_combs2 == exp_res_combs2
def test_prepare_ro_pulses_lutman_pars_updated(self):
q = self.device.find_instrument('q5')
q.ro_pulse_amp(.4)
self.device.prepare_readout(['q5'])
ro_amp = self.ro_lutman_1.M_amp_R5()
assert ro_amp == .4
q.ro_pulse_amp(.2)
self.device.prepare_readout(['q5'])
ro_amp = self.ro_lutman_1.M_amp_R5()
assert ro_amp == .2
def test_prep_ro_input_avg_det(self):
qubits = self.device.qubits()
self.device.ro_acq_weight_type('optimal')
self.device.prepare_readout(qubits=qubits)
exp_ch_map = {
'UHFQC_0': {
'q13': 0,
'q16': 1
},
'UHFQC_1': {
'q1': 0,
'q4': 1,
'q5': 2,
'q7': 3,
'q8': 4,
'q10': 5,
'q11': 6,
'q14': 7,
'q15': 8
},
'UHFQC_2': {
'q0': 0,
'q2': 1,
'q3': 2,
'q6': 3,
'q9': 4,
'q12': 5
}
}
inp_avg_det = self.device.input_average_detector
assert isinstance(inp_avg_det, Multi_Detector_UHF)
assert len(inp_avg_det.detectors) == 3
for ch_det in inp_avg_det.detectors:
assert isinstance(ch_det, UHFQC_input_average_detector)
# Note taht UHFQC_2 is first because q0 is the first in device.qubits
assert inp_avg_det.value_names == [
'UHFQC_2 ch0', 'UHFQC_2 ch1', 'UHFQC_1 ch0', 'UHFQC_1 ch1',
'UHFQC_0 ch0', 'UHFQC_0 ch1'
]
def test_prepare_ro_instantiate_detectors_int_avg(self):
qubits = ['q13', 'q16', 'q1', 'q5', 'q0']
self.device.ro_acq_weight_type('optimal')
self.device.prepare_readout(qubits=qubits)
int_avg_det = self.device.int_avg_det
assert isinstance(int_avg_det, Multi_Detector_UHF)
assert len(int_avg_det.detectors) == 3
for ch_det in int_avg_det.detectors:
assert isinstance(ch_det, UHFQC_integrated_average_detector)
# Note that UHFQC_2 is first because q0 is the first in device.qubits
assert int_avg_det.value_names == [
'UHFQC_0 w0 q13', 'UHFQC_0 w1 q16', 'UHFQC_1 w0 q1',
'UHFQC_1 w1 q5', 'UHFQC_2 w0 q0'
]
qubits = ['q13', 'q16', 'q1', 'q5', 'q0']
self.device.ro_acq_weight_type('SSB')
self.device.prepare_readout(qubits=qubits)
int_avg_det = self.device.int_avg_det
assert isinstance(int_avg_det, Multi_Detector_UHF)
assert len(int_avg_det.detectors) == 3
for ch_det in int_avg_det.detectors:
assert isinstance(ch_det, UHFQC_integrated_average_detector)
# Note that UHFQC_2 is first because q0 is the first in device.qubits
assert int_avg_det.value_names == [
'UHFQC_0 w0 q13 I', 'UHFQC_0 w1 q13 Q', 'UHFQC_0 w2 q16 I',
'UHFQC_0 w3 q16 Q', 'UHFQC_1 w0 q1 I', 'UHFQC_1 w1 q1 Q',
'UHFQC_1 w2 q5 I', 'UHFQC_1 w3 q5 Q', 'UHFQC_2 w0 q0 I',
'UHFQC_2 w1 q0 Q'
]
# Note that the order of channels gets ordered per feedline
# because of the way the multi detector works
def test_prepare_ro_instantiate_detectors_int_logging(self):
qubits = ['q13', 'q16', 'q1', 'q5', 'q0']
self.device.ro_acq_weight_type('optimal')
self.device.prepare_readout(qubits=qubits)
int_log_det = self.device.int_log_det
assert isinstance(int_log_det, Multi_Detector_UHF)
assert len(int_log_det.detectors) == 3
for ch_det in int_log_det.detectors:
assert isinstance(ch_det, UHFQC_integration_logging_det)
# Note that UHFQC_2 is first because q0 is the first in device.qubits
assert int_log_det.value_names == [
'UHFQC_0 w0 q13', 'UHFQC_0 w1 q16', 'UHFQC_1 w0 q1',
'UHFQC_1 w1 q5', 'UHFQC_2 w0 q0'
]
qubits = self.device.qubits()
qubits = ['q13', 'q16', 'q1', 'q5', 'q0']
self.device.ro_acq_weight_type('SSB')
self.device.prepare_readout(qubits=qubits)
int_log_det = self.device.int_log_det
assert isinstance(int_log_det, Multi_Detector_UHF)
assert len(int_log_det.detectors) == 3
for ch_det in int_log_det.detectors:
assert isinstance(ch_det, UHFQC_integration_logging_det)
# Note that UHFQC_2 is first because q0 is the first in device.qubits
assert int_log_det.value_names == [
'UHFQC_0 w0 q13 I', 'UHFQC_0 w1 q13 Q', 'UHFQC_0 w2 q16 I',
'UHFQC_0 w3 q16 Q', 'UHFQC_1 w0 q1 I', 'UHFQC_1 w1 q1 Q',
'UHFQC_1 w2 q5 I', 'UHFQC_1 w3 q5 Q', 'UHFQC_2 w0 q0 I',
'UHFQC_2 w1 q0 Q'
]
def test_prepare_readout_mixer_settings(self):
pass
@classmethod
def tearDownClass(self):
for instr_name in list(self.device._all_instruments):
try:
inst = self.device.find_instrument(instr_name)
inst.close()
except KeyError:
pass
class Test_Device_obj(unittest.TestCase):
@classmethod
def setUpClass(self):
"""
This sets up a mock setup using a CCL to control multiple qubits
"""
self.station = station.Station()
self.MW1 = vmw.VirtualMWsource("MW1")
self.MW2 = vmw.VirtualMWsource("MW2")
self.MW3 = vmw.VirtualMWsource("MW3")
self.SH = sh.virtual_SignalHound_USB_SA124B("SH")
self.UHFQC_0 = UHF.UHFQC(
name="UHFQC_0", server="emulator", device="dev2109", interface="1GbE"
)
self.UHFQC_1 = UHF.UHFQC(
name="UHFQC_1", server="emulator", device="dev2110", interface="1GbE"
)
self.UHFQC_2 = UHF.UHFQC(
name="UHFQC_2", server="emulator", device="dev2111", interface="1GbE"
)
self.CCL = dummy_CCL('CCL')
self.QCC = dummy_QCC('QCC')
self.CC = CC('CC', DummyTransport())
self.VSM = Dummy_QuTechVSMModule('VSM')
self.MC = measurement_control.MeasurementControl(
"MC", live_plot_enabled=False, verbose=False
)
self.MC.station = self.station
self.station.add_component(self.MC)
# Required to set it to the testing datadir
test_datadir = os.path.join(pq.__path__[0], "tests", "test_output")
self.MC.datadir(test_datadir)
a_tools.datadir = self.MC.datadir()
self.AWG_mw_0 = HDAWG.ZI_HDAWG8(
name="AWG_mw_0",
server="emulator",
num_codewords=32,
device="dev8026",
interface="1GbE",
)
self.AWG_mw_1 = HDAWG.ZI_HDAWG8(
name="AWG_mw_1",
server="emulator",
num_codewords=32,
device="dev8027",
interface="1GbE",
)
self.AWG_flux_0 = HDAWG.ZI_HDAWG8(
name="AWG_flux_0",
server="emulator",
num_codewords=32,
device="dev8028",
interface="1GbE",
)
if 0: # FIXME: PR #658: test broken by commit bd19f56
self.mw_lutman = mwl.AWG8_VSM_MW_LutMan("MW_LutMan_VSM")
self.mw_lutman.AWG(self.AWG_mw_0.name)
self.mw_lutman.channel_GI(1)
self.mw_lutman.channel_GQ(2)
self.mw_lutman.channel_DI(3)
self.mw_lutman.channel_DQ(4)
else: # FIXME: workaround
self.mw_lutman = mwl.AWG8_MW_LutMan("MW_LutMan")
self.mw_lutman.channel_I(1)
self.mw_lutman.channel_Q(2)
self.mw_lutman.mw_modulation(100e6)
self.mw_lutman.sampling_rate(2.4e9)
self.ro_lutman_0 = UHFQC_RO_LutMan(
"ro_lutman_0", feedline_number=0, feedline_map="S17", num_res=9
)
self.ro_lutman_0.AWG(self.UHFQC_0.name)
self.ro_lutman_1 = UHFQC_RO_LutMan(
"ro_lutman_1", feedline_number=1, feedline_map="S17", num_res=9
)
self.ro_lutman_1.AWG(self.UHFQC_1.name)
self.ro_lutman_2 = UHFQC_RO_LutMan(
"ro_lutman_2", feedline_number=2, feedline_map="S17", num_res=9
)
self.ro_lutman_2.AWG(self.UHFQC_2.name)
# Assign instruments
qubits = []
for q_idx in range(17):
q = ct.CCLight_Transmon("q{}".format(q_idx))
qubits.append(q)
q.instr_LutMan_MW(self.mw_lutman.name)
q.instr_LO_ro(self.MW1.name)
q.instr_LO_mw(self.MW2.name)
q.instr_spec_source(self.MW3.name)
if q_idx in [13, 16]:
q.instr_acquisition(self.UHFQC_0.name)
q.instr_LutMan_RO(self.ro_lutman_0.name)
elif q_idx in [1, 4, 5, 7, 8, 10, 11, 14, 15]:
q.instr_acquisition(self.UHFQC_1.name)
q.instr_LutMan_RO(self.ro_lutman_1.name)
elif q_idx in [0, 2, 3, 6, 9, 12]:
q.instr_acquisition(self.UHFQC_2.name)
q.instr_LutMan_RO(self.ro_lutman_2.name)
q.instr_VSM(self.VSM.name)
q.instr_CC(self.CCL.name)
q.instr_MC(self.MC.name)
q.instr_SH(self.SH.name)
config_fn = os.path.join(pq.__path__[0], "tests", "test_cfg_CCL.json")
q.cfg_openql_platform_fn(config_fn)
# Setting some "random" initial parameters
q.ro_freq(5.43e9 + q_idx * 50e6)
q.ro_freq_mod(200e6)
q.freq_qubit(4.56e9 + q_idx * 50e6)
q.freq_max(4.62e9 + q_idx * 50e6)
q.mw_freq_mod(-100e6)
q.mw_awg_ch(1)
q.cfg_qubit_nr(q_idx)
# q.mw_vsm_delay(15)
q.mw_mixer_offs_GI(0.1)
q.mw_mixer_offs_GQ(0.2)
q.mw_mixer_offs_DI(0.3)
q.mw_mixer_offs_DQ(0.4)
# Set up the device object and set required params
self.device = do.DeviceCCL("device")
self.device.qubits([q.name for q in qubits])
self.device.instr_CC(self.CCL.name)
self.device.instr_AWG_mw_0(self.AWG_mw_0.name)
self.device.instr_AWG_mw_1(self.AWG_mw_1.name)
self.device.instr_AWG_flux_0(self.AWG_flux_0.name)
self.device.ro_lo_freq(6e9)
# Fixed by design
self.dio_map_CCL = {"ro_0": 1, "ro_1": 2, "flux_0": 3, "mw_0": 4, "mw_1": 5}
# Fixed by design
self.dio_map_QCC = {
"ro_0": 1,
"ro_1": 2,
"ro_2": 3,
"mw_0": 4,
"mw_1": 5,
"flux_0": 6,
"flux_1": 7,
"flux_2": 8,
"mw_2": 9,
"mw_3": 10,
"mw_4": 11,
}
# Modular, arbitrary example here
self.dio_map_CC = {
"ro_0": 0,
"ro_1": 1,
"ro_2": 2,
"mw_0": 3,
"mw_1": 4,
"flux_0": 6,
"flux_1": 7,
"flux_2": 8,
}
self.device.dio_map(self.dio_map_CCL)
def test_get_dio_map(self):
self.device.instr_CC(self.CCL.name)
# 2020-03-20
# dio_map need to be specified manually by the user for each setup
# this is necessary due to the new modularity of CC
expected_dio_map = self.dio_map_CCL
self.device.dio_map(expected_dio_map)
dio_map = self.device.dio_map()
assert dio_map == expected_dio_map
self.device.instr_CC(self.QCC.name)
expected_dio_map = self.dio_map_QCC
self.device.dio_map(expected_dio_map)
dio_map = self.device.dio_map()
assert dio_map == expected_dio_map
def test_get_dio_map_CC(self):
self.device.instr_CC(self.CC.name)
# 2020-03-20
# dio_map need to be specified manually by the user for each setup
# this is necessary due to the new modularity of CC
expected_dio_map = self.dio_map_CC
self.device.dio_map(expected_dio_map)
dio_map = self.device.dio_map()
assert dio_map == expected_dio_map
def test_prepare_timing_CCL(self):
self.device.instr_CC(self.CCL.name)
self.device.dio_map(self.dio_map_CCL)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-40e-9)
self.device.tim_mw_latency_0(20e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
# DIO timing map for CCL:
# dio1: ro_latency_0
# dio2: ro_latency_1
# dio3: flux_latency_0
# dio4: mw_latency_0
# dio5: mw_latency_1
assert self.CCL.dio1_out_delay() == 12
assert self.CCL.dio2_out_delay() == 11
assert self.CCL.dio3_out_delay() == 0
assert self.CCL.dio4_out_delay() == 3
assert self.CCL.dio5_out_delay() == 2
def test_prepare_timing_QCC(self):
self.device.instr_CC(self.QCC.name)
self.device.dio_map(self.dio_map_QCC)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-40e-9)
self.device.tim_flux_latency_1(100e-9)
self.device.tim_mw_latency_0(20e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
assert self.QCC.dio1_out_delay() == 12
assert self.QCC.dio2_out_delay() == 11
assert self.QCC.dio4_out_delay() == 3
assert self.QCC.dio5_out_delay() == 2
assert self.QCC.dio6_out_delay() == 0
assert self.QCC.dio7_out_delay() == 7
def test_prepare_timing_QCC_fine(self):
self.device.instr_CC(self.QCC.name)
self.device.dio_map(self.dio_map_QCC)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-36e-9)
self.device.tim_flux_latency_1(100e-9)
self.device.tim_mw_latency_0(23e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
assert self.QCC.dio1_out_delay() == 12
assert self.QCC.dio2_out_delay() == 11
assert self.QCC.dio4_out_delay() == 3
assert self.QCC.dio5_out_delay() == 2
assert self.QCC.dio6_out_delay() == 0
assert self.QCC.dio7_out_delay() == 7
if 0: # # FIXME: PR #658: test broken by commit bd19f56
assert self.AWG_flux_0.sigouts_0_delay() == approx(4e-9)
assert self.AWG_flux_0.sigouts_7_delay() == approx(4e-9)
assert self.AWG_mw_0.sigouts_7_delay() == approx(3e-9)
assert self.AWG_mw_0.sigouts_7_delay() == approx(3e-9)
assert self.AWG_mw_1.sigouts_7_delay() == approx(0)
assert self.AWG_mw_1.sigouts_7_delay() == approx(0)
@unittest.skip("FIXME: PR #658: test broken by commit bd19f56: AttributeError: 'mw_lutman' object and its delegates have no attribute 'channel_I'")
def test_prepare_timing_CC(self):
self.device.instr_CC(self.CC.name)
self.device.dio_map(self.dio_map_CC)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-40e-9)
self.device.tim_flux_latency_1(100e-9)
self.device.tim_mw_latency_0(20e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
assert self.CC.dio0_out_delay() == 12
assert self.CC.dio1_out_delay() == 11
assert self.CC.dio3_out_delay() == 3
assert self.CC.dio4_out_delay() == 2
assert self.CC.dio6_out_delay() == 0
assert self.CC.dio7_out_delay() == 7
@unittest.skip('FIXME: disabled, see PR #643')
def test_prepare_readout_lo_freqs_config(self):
# Test that the modulation frequencies of all qubits
# are set correctly.
self.device.ro_acq_weight_type("optimal")
qubits = self.device.qubits()
self.device.ro_lo_freq(6e9)
self.device.prepare_readout(qubits=qubits)
# MW1 is specified as the readout LO source
assert self.MW1.frequency() == 6e9
for qname in qubits:
q = self.device.find_instrument(qname)
6e9 + q.ro_freq_mod() == q.ro_freq()
self.device.ro_lo_freq(5.8e9)
self.device.prepare_readout(qubits=qubits)
# MW1 is specified as the readout LO source
assert self.MW1.frequency() == 5.8e9
for qname in qubits:
q = self.device.find_instrument(qname)
5.8e9 + q.ro_freq_mod() == q.ro_freq()
q = self.device.find_instrument("q5")
q.instr_LO_ro(self.MW3.name)
with pytest.raises(ValueError):
self.device.prepare_readout(qubits=qubits)
q.instr_LO_ro(self.MW1.name)
@unittest.skip('FIXME: disabled, see PR #643')
def test_prepare_readout_assign_weights(self):
self.device.ro_lo_freq(6e9)
self.device.ro_acq_weight_type("optimal")
qubits = self.device.qubits()
q13 = self.device.find_instrument("q13")
q13.ro_acq_weight_func_I(np.ones(128))
q13.ro_acq_weight_func_Q(np.ones(128) * 0.5)
self.device.prepare_readout(qubits=qubits)
exp_ch_map = {
"UHFQC_0": {"q13": 0, "q16": 1},
"UHFQC_1": {
"q1": 0,
"q4": 1,
"q5": 2,
"q7": 3,
"q8": 4,
"q10": 5,
"q11": 6,
"q14": 7,
"q15": 8,
},
"UHFQC_2": {"q0": 0, "q2": 1, "q3": 2, "q6": 3, "q9": 4, "q12": 5},
}
assert exp_ch_map == self.device._acq_ch_map
qb = self.device.find_instrument("q12")
assert qb.ro_acq_weight_chI() == 5
assert qb.ro_acq_weight_chQ() == 6
@unittest.skip('FIXME: disabled, see PR #643')
def test_prepare_readout_assign_weights_order_matters(self):
# Test that the order of the channels is as in the order iterated over
qubits = ["q2", "q3", "q0"]
self.device.ro_acq_weight_type("optimal")
self.device.prepare_readout(qubits=qubits)
exp_ch_map = {"UHFQC_2": {"q0": 2, "q2": 0, "q3": 1}}
assert exp_ch_map == self.device._acq_ch_map
qb = self.device.find_instrument("q3")
assert qb.ro_acq_weight_chI() == 1
assert qb.ro_acq_weight_chQ() == 2
@unittest.skip('FIXME: disabled, see PR #643')
def test_prepare_readout_assign_weights_IQ_counts_double(self):
qubits = ["q2", "q3", "q0", "q13", "q16"]
self.device.ro_acq_weight_type("SSB")
self.device.prepare_readout(qubits=qubits)
exp_ch_map = {
"UHFQC_0": {"q13": 0, "q16": 2},
"UHFQC_2": {"q0": 4, "q2": 0, "q3": 2},
}
assert exp_ch_map == self.device._acq_ch_map
qb = self.device.find_instrument("q16")
assert qb.ro_acq_weight_chI() == 2
assert qb.ro_acq_weight_chQ() == 3
@unittest.skip('FIXME: disabled, see PR #643')
def test_prepare_readout_assign_weights_too_many_raises(self):
qubits = self.device.qubits()
self.device.ro_acq_weight_type("SSB")
with pytest.raises(ValueError):
self.device.prepare_readout(qubits=qubits)
@unittest.skip('FIXME: disabled, see PR #643')
def test_prepare_readout_resets_UHF(self):
uhf = self.device.find_instrument("UHFQC_2")
uhf.qas_0_correlations_5_enable(1)
uhf.qas_0_correlations_5_source(3)
uhf.qas_0_thresholds_5_correlation_enable(1)
uhf.qas_0_thresholds_5_correlation_source(3)
assert uhf.qas_0_correlations_5_enable() == 1
assert uhf.qas_0_correlations_5_source() == 3
assert uhf.qas_0_thresholds_5_correlation_enable() == 1
assert uhf.qas_0_thresholds_5_correlation_source() == 3
self.device.prepare_readout(qubits=["q0"])
assert uhf.qas_0_correlations_5_enable() == 0
assert uhf.qas_0_correlations_5_source() == 0
assert uhf.qas_0_thresholds_5_correlation_enable() == 0
assert uhf.qas_0_thresholds_5_correlation_source() == 0
@unittest.skip('FIXME: disabled, see PR #643')
def test_prepare_ro_pulses_resonator_combinations(self):
# because not all combinations are supported the default is to
# support
qubits = ["q2", "q3", "q0", "q13", "q16"]
self.device.prepare_readout(qubits=qubits)
# Combinations are based on qubit number
res_combs0 = self.ro_lutman_0.resonator_combinations()
if 0: # FIXME: PR #638
exp_res_combs0 = [[13], [16], [13, 16]]
else:
exp_res_combs0 = [[13]]
assert res_combs0 == exp_res_combs0
res_combs2 = self.ro_lutman_2.resonator_combinations()
if 0: # FIXME: PR #638
exp_res_combs2 = [[2], [3], [0], [2, 3, 0]]
else:
exp_res_combs2 = [[0]]
assert res_combs2 == exp_res_combs2
@unittest.skip('FIXME: disabled, see PR #643')
def test_prepare_ro_pulses_lutman_pars_updated(self):
q = self.device.find_instrument("q5")
q.ro_pulse_amp(0.4)
self.device.prepare_readout(["q5"])
ro_amp = self.ro_lutman_1.M_amp_R5()
assert ro_amp == 0.4
q.ro_pulse_amp(0.2)
self.device.prepare_readout(["q5"])
ro_amp = self.ro_lutman_1.M_amp_R5()
assert ro_amp == 0.2
@unittest.skip('FIXME: disabled, see PR #643')
def test_prep_ro_input_avg_det(self):
qubits = self.device.qubits()
self.device.ro_acq_weight_type("optimal")
self.device.prepare_readout(qubits=qubits)
exp_ch_map = {
"UHFQC_0": {"q13": 0, "q16": 1},
"UHFQC_1": {
"q1": 0,
"q4": 1,
"q5": 2,
"q7": 3,
"q8": 4,
"q10": 5,
"q11": 6,
"q14": 7,
"q15": 8,
},
"UHFQC_2": {"q0": 0, "q2": 1, "q3": 2, "q6": 3, "q9": 4, "q12": 5},
}
inp_avg_det = self.device.input_average_detector
assert isinstance(inp_avg_det, Multi_Detector_UHF)
assert len(inp_avg_det.detectors) == 3
for ch_det in inp_avg_det.detectors:
assert isinstance(ch_det, UHFQC_input_average_detector)
# Note taht UHFQC_2 is first because q0 is the first in device.qubits
assert inp_avg_det.value_names == [
"UHFQC_2 ch0",
"UHFQC_2 ch1",
"UHFQC_1 ch0",
"UHFQC_1 ch1",
"UHFQC_0 ch0",
"UHFQC_0 ch1",
]
@unittest.skip('FIXME: disabled, see PR #643')
def test_prepare_ro_instantiate_detectors_int_avg(self):
qubits = ["q13", "q16", "q1", "q5", "q0"]
self.device.ro_acq_weight_type("optimal")
self.device.prepare_readout(qubits=qubits)
int_avg_det = self.device.int_avg_det
assert isinstance(int_avg_det, Multi_Detector_UHF)
assert len(int_avg_det.detectors) == 3
for ch_det in int_avg_det.detectors:
assert isinstance(ch_det, UHFQC_integrated_average_detector)
# Note that UHFQC_2 is first because q0 is the first in device.qubits
assert int_avg_det.value_names == [
"UHFQC_0 w0 q13",
"UHFQC_0 w1 q16",
"UHFQC_1 w0 q1",
"UHFQC_1 w1 q5",
"UHFQC_2 w0 q0",
]
qubits = ["q13", "q16", "q1", "q5", "q0"]
self.device.ro_acq_weight_type("SSB")
self.device.prepare_readout(qubits=qubits)
int_avg_det = self.device.int_avg_det
assert isinstance(int_avg_det, Multi_Detector_UHF)
assert len(int_avg_det.detectors) == 3
for ch_det in int_avg_det.detectors:
assert isinstance(ch_det, UHFQC_integrated_average_detector)
# Note that UHFQC_2 is first because q0 is the first in device.qubits
assert int_avg_det.value_names == [
"UHFQC_0 w0 q13 I",
"UHFQC_0 w1 q13 Q",
"UHFQC_0 w2 q16 I",
"UHFQC_0 w3 q16 Q",
"UHFQC_1 w0 q1 I",
"UHFQC_1 w1 q1 Q",
"UHFQC_1 w2 q5 I",
"UHFQC_1 w3 q5 Q",
"UHFQC_2 w0 q0 I",
"UHFQC_2 w1 q0 Q",
]
# Note that the order of channels gets ordered per feedline
# because of the way the multi detector works
@unittest.skip('FIXME: disabled, see PR #643')
def test_prepare_ro_instantiate_detectors_int_logging(self):
qubits = ["q13", "q16", "q1", "q5", "q0"]
self.device.ro_acq_weight_type("optimal")
self.device.prepare_readout(qubits=qubits)
int_log_det = self.device.int_log_det
assert isinstance(int_log_det, Multi_Detector_UHF)
assert len(int_log_det.detectors) == 3
for ch_det in int_log_det.detectors:
assert isinstance(ch_det, UHFQC_integration_logging_det)
# Note that UHFQC_2 is first because q0 is the first in device.qubits
assert int_log_det.value_names == [
"UHFQC_0 w0 q13",
"UHFQC_0 w1 q16",
"UHFQC_1 w0 q1",
"UHFQC_1 w1 q5",
"UHFQC_2 w0 q0",
]
qubits = self.device.qubits()
qubits = ["q13", "q16", "q1", "q5", "q0"]
self.device.ro_acq_weight_type("SSB")
self.device.prepare_readout(qubits=qubits)
int_log_det = self.device.int_log_det
assert isinstance(int_log_det, Multi_Detector_UHF)
assert len(int_log_det.detectors) == 3
for ch_det in int_log_det.detectors:
assert isinstance(ch_det, UHFQC_integration_logging_det)
# Note that UHFQC_2 is first because q0 is the first in device.qubits
assert int_log_det.value_names == [
"UHFQC_0 w0 q13 I",
"UHFQC_0 w1 q13 Q",
"UHFQC_0 w2 q16 I",
"UHFQC_0 w3 q16 Q",
"UHFQC_1 w0 q1 I",
"UHFQC_1 w1 q1 Q",
"UHFQC_1 w2 q5 I",
"UHFQC_1 w3 q5 Q",
"UHFQC_2 w0 q0 I",
"UHFQC_2 w1 q0 Q",
]
def test_prepare_readout_mixer_settings(self):
pass
@classmethod
def tearDownClass(self):
for instr_name in list(self.device._all_instruments):
try:
inst = self.device.find_instrument(instr_name)
inst.close()
except KeyError:
pass
for i, res in enumerate(resonator_codeword_bit_mapping):
rolut.set('M_amp_R{}'.format(res), amps[i])
rolut.set('M_phi_R{}'.format(res), -45)
rolut.set('M_down_amp0_R{}'.format(res), amps[i] / 2)
rolut.set('M_down_amp1_R{}'.format(res), -amps[i] / 2)
rolut.set('M_down_phi0_R{}'.format(res), -45 + 180)
rolut.set('M_down_phi1_R{}'.format(res), -45)
rolut.set('M_length_R{}'.format(res), 500e-9)
rolut.set('M_down_length0_R{}'.format(res), 200e-9)
rolut.set('M_down_length1_R{}'.format(res), 200e-9)
rolut.set('M_modulation_R{}'.format(res), 0)
rolut.acquisition_delay(200e-9)
rolut.AWG(instr.ro[i].name)
rolut.sampling_rate(1.8e9)
rolut.generate_standard_waveforms()
rolut.pulse_type('M_up_down_down')
#rolut.resonator_combinations([[0], [2], [3], [5], [6]]) # FIXME: must use resonators from resonator_codeword_bit_mapping
rolut.resonator_combinations([[
0, 2, 3, 5, 6
]]) # FIXME: must use resonators from resonator_codeword_bit_mapping
rolut.load_DIO_triggered_sequence_onto_UHFQC(
) # upload waveforms and ZIseqC program
instr.ro[i].awgs_0_userregs_0(
1024
) # loop_cnt, see UHFQC driver (awg_sequence_acquisition_and_DIO_triggered_pulse)
##########################################
class Test_Device_obj(unittest.TestCase):
@classmethod
def setUpClass(self):
"""
This sets up a mock setup using a CCL to control multiple qubits
"""
self.station = station.Station()
self.CCL_qubit = ct.CCLight_Transmon('CCL_qubit')
self.MW1 = vmw.VirtualMWsource('MW1')
self.MW2 = vmw.VirtualMWsource('MW2')
self.MW3 = vmw.VirtualMWsource('MW3')
self.SH = sh.virtual_SignalHound_USB_SA124B('SH')
self.UHFQC = dummy_UHFQC('UHFQC')
self.CCL = dummy_CCL('CCL')
self.QCC = dummy_QCC('QCC')
self.VSM = Dummy_Duplexer('VSM')
self.MC = measurement_control.MeasurementControl(
'MC', live_plot_enabled=False, verbose=False)
self.MC.station = self.station
self.station.add_component(self.MC)
# Required to set it to the testing datadir
test_datadir = os.path.join(pq.__path__[0], 'tests', 'test_output')
self.MC.datadir(test_datadir)
a_tools.datadir = self.MC.datadir()
self.AWG_mw_0 = v8.VirtualAWG8('AWG_mw_0')
self.AWG_mw_1 = v8.VirtualAWG8('AWG_mw_1')
self.AWG_flux_0 = v8.VirtualAWG8('AWG_flux_0')
self.AWG8_VSM_MW_LutMan = mwl.AWG8_VSM_MW_LutMan('MW_LutMan_VSM')
self.AWG8_VSM_MW_LutMan.AWG(self.AWG_mw_0.name)
self.AWG8_VSM_MW_LutMan.channel_GI(1)
self.AWG8_VSM_MW_LutMan.channel_GQ(2)
self.AWG8_VSM_MW_LutMan.channel_DI(3)
self.AWG8_VSM_MW_LutMan.channel_DQ(4)
self.AWG8_VSM_MW_LutMan.mw_modulation(100e6)
self.AWG8_VSM_MW_LutMan.sampling_rate(2.4e9)
self.ro_lutman = UHFQC_RO_LutMan('RO_lutman', num_res=5)
self.ro_lutman.AWG(self.UHFQC.name)
# Assign instruments
self.CCL_qubit.instr_LutMan_MW(self.AWG8_VSM_MW_LutMan.name)
self.CCL_qubit.instr_LO_ro(self.MW1.name)
self.CCL_qubit.instr_LO_mw(self.MW2.name)
self.CCL_qubit.instr_spec_source(self.MW3.name)
self.CCL_qubit.instr_acquisition(self.UHFQC.name)
self.CCL_qubit.instr_VSM(self.VSM.name)
self.CCL_qubit.instr_CC(self.CCL.name)
self.CCL_qubit.instr_LutMan_RO(self.ro_lutman.name)
self.CCL_qubit.instr_MC(self.MC.name)
self.CCL_qubit.instr_SH(self.SH.name)
config_fn = os.path.join(pq.__path__[0], 'tests', 'test_cfg_CCL.json')
self.CCL_qubit.cfg_openql_platform_fn(config_fn)
# Setting some "random" initial parameters
self.CCL_qubit.ro_freq(5.43e9)
self.CCL_qubit.ro_freq_mod(200e6)
self.CCL_qubit.freq_qubit(4.56e9)
self.CCL_qubit.freq_max(4.62e9)
self.CCL_qubit.mw_freq_mod(-100e6)
self.CCL_qubit.mw_awg_ch(1)
self.CCL_qubit.cfg_qubit_nr(0)
self.CCL_qubit.mw_vsm_delay(15)
self.CCL_qubit.mw_mixer_offs_GI(.1)
self.CCL_qubit.mw_mixer_offs_GQ(.2)
self.CCL_qubit.mw_mixer_offs_DI(.3)
self.CCL_qubit.mw_mixer_offs_DQ(.4)
# Set up the device object and set required params
self.device = do.DeviceCCL('device')
self.device.qubits([self.CCL_qubit.name])
self.device.instr_CC(self.CCL.name)
self.device.instr_AWG_mw_0(self.AWG_mw_0.name)
self.device.instr_AWG_mw_1(self.AWG_mw_1.name)
self.device.instr_AWG_flux_0(self.AWG_flux_0.name)
def test_get_dio_map(self):
self.device.instr_CC(self.CCL.name)
dio_map = self.device.dio_map()
expected_dio_map = {
'ro_0': 1,
'ro_1': 2,
'flux_0': 3,
'mw_0': 4,
'mw_1': 5
}
assert dio_map == expected_dio_map
self.device.instr_CC(self.QCC.name)
dio_map = self.device.dio_map()
expected_dio_map = {
'ro_0': 1,
'ro_1': 2,
'ro_2': 3,
'mw_0': 4,
'mw_1': 5,
'flux_0': 6,
'flux_1': 7,
'flux_2': 8,
}
assert dio_map == expected_dio_map
def test_prepare_timing_CCL(self):
self.device.instr_CC(self.CCL.name)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-40e-9)
self.device.tim_mw_latency_0(20e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
# DIO timing map for CCL:
# dio1: ro_latency_0
# dio2: ro_latency_1
# dio3: flux_latency_0
# dio4: mw_latency_0
# dio5: mw_latency_1
assert (self.CCL.dio1_out_delay() == 12)
assert (self.CCL.dio2_out_delay() == 11)
assert (self.CCL.dio3_out_delay() == 0)
assert (self.CCL.dio4_out_delay() == 3)
assert (self.CCL.dio5_out_delay() == 2)
def test_prepare_timing_QCC(self):
self.device.instr_CC(self.QCC.name)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-40e-9)
self.device.tim_flux_latency_1(100e-9)
self.device.tim_mw_latency_0(20e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
assert (self.QCC.dio1_out_delay() == 12)
assert (self.QCC.dio2_out_delay() == 11)
assert (self.QCC.dio4_out_delay() == 3)
assert (self.QCC.dio5_out_delay() == 2)
assert (self.QCC.dio6_out_delay() == 0)
assert (self.QCC.dio7_out_delay() == 7)
def test_prepare_timing_QCC_fine(self):
self.device.instr_CC(self.QCC.name)
self.device.tim_ro_latency_0(200e-9)
self.device.tim_ro_latency_1(180e-9)
self.device.tim_flux_latency_0(-36e-9)
self.device.tim_flux_latency_1(100e-9)
self.device.tim_mw_latency_0(23e-9)
self.device.tim_mw_latency_1(0e-9)
self.device.prepare_timing()
assert (self.QCC.dio1_out_delay() == 12)
assert (self.QCC.dio2_out_delay() == 11)
assert (self.QCC.dio4_out_delay() == 3)
assert (self.QCC.dio5_out_delay() == 2)
assert (self.QCC.dio6_out_delay() == 0)
assert (self.QCC.dio7_out_delay() == 7)
assert (self.AWG_flux_0.sigouts_0_delay() == approx(4e-9))
assert (self.AWG_flux_0.sigouts_7_delay() == approx(4e-9))
assert (self.AWG_mw_0.sigouts_7_delay() == approx(3e-9))
assert (self.AWG_mw_0.sigouts_7_delay() == approx(3e-9))
assert (self.AWG_mw_1.sigouts_7_delay() == approx(0))
assert (self.AWG_mw_1.sigouts_7_delay() == approx(0))
@classmethod
def tearDownClass(self):
for inststr in list(self.CCL_qubit._all_instruments):
try:
inst = self.CCL_qubit.find_instrument(inststr)
inst.close()
except KeyError:
pass
class Test_QO(unittest.TestCase):
@classmethod
def setUpClass(self):
self.station = station.Station()
self.CCL_qubit = ct.CCLight_Transmon('CCL_qubit')
self.MW1 = vmw.VirtualMWsource('MW1')
self.MW2 = vmw.VirtualMWsource('MW2')
self.MW3 = vmw.VirtualMWsource('MW3')
self.SH = sh.virtual_SignalHound_USB_SA124B('SH')
self.UHFQC = dummy_UHFQC('UHFQC')
self.CCL = dummy_CCL('CCL')
# self.VSM = Dummy_Duplexer('VSM')
self.VSM = Dummy_QuTechVSMModule('VSM')
self.MC = measurement_control.MeasurementControl(
'MC', live_plot_enabled=False, verbose=False)
self.MC.station = self.station
self.station.add_component(self.MC)
# Required to set it to the testing datadir
test_datadir = os.path.join(pq.__path__[0], 'tests', 'test_output')
self.MC.datadir(test_datadir)
a_tools.datadir = self.MC.datadir()
self.AWG = v8.VirtualAWG8('DummyAWG8')
self.AWG8_VSM_MW_LutMan = mwl.AWG8_VSM_MW_LutMan('MW_LutMan_VSM')
self.AWG8_VSM_MW_LutMan.AWG(self.AWG.name)
self.AWG8_VSM_MW_LutMan.channel_GI(1)
self.AWG8_VSM_MW_LutMan.channel_GQ(2)
self.AWG8_VSM_MW_LutMan.channel_DI(3)
self.AWG8_VSM_MW_LutMan.channel_DQ(4)
self.AWG8_VSM_MW_LutMan.mw_modulation(100e6)
self.AWG8_VSM_MW_LutMan.sampling_rate(2.4e9)
self.ro_lutman = UHFQC_RO_LutMan('RO_lutman',
num_res=5,
feedline_number=0)
self.ro_lutman.AWG(self.UHFQC.name)
# Assign instruments
self.CCL_qubit.instr_LutMan_MW(self.AWG8_VSM_MW_LutMan.name)
self.CCL_qubit.instr_LO_ro(self.MW1.name)
self.CCL_qubit.instr_LO_mw(self.MW2.name)
self.CCL_qubit.instr_spec_source(self.MW3.name)
self.CCL_qubit.instr_acquisition(self.UHFQC.name)
self.CCL_qubit.instr_VSM(self.VSM.name)
self.CCL_qubit.instr_CC(self.CCL.name)
self.CCL_qubit.instr_LutMan_RO(self.ro_lutman.name)
self.CCL_qubit.instr_MC(self.MC.name)
self.CCL_qubit.instr_SH(self.SH.name)
config_fn = os.path.join(pq.__path__[0], 'tests', 'test_cfg_CCL.json')
self.CCL_qubit.cfg_openql_platform_fn(config_fn)
# Setting some "random" initial parameters
self.CCL_qubit.ro_freq(5.43e9)
self.CCL_qubit.ro_freq_mod(200e6)
self.CCL_qubit.freq_qubit(4.56e9)
self.CCL_qubit.freq_max(4.62e9)
self.CCL_qubit.mw_freq_mod(-100e6)
self.CCL_qubit.mw_awg_ch(1)
self.CCL_qubit.cfg_qubit_nr(0)
self.CCL_qubit.mw_vsm_delay(15)
self.CCL_qubit.mw_mixer_offs_GI(.1)
self.CCL_qubit.mw_mixer_offs_GQ(.2)
self.CCL_qubit.mw_mixer_offs_DI(.3)
self.CCL_qubit.mw_mixer_offs_DQ(.4)
def test_instantiate_QuDevTransmon(self):
QDT = QuDev_transmon('QuDev_transmon',
MC=None,
heterodyne_instr=None,
cw_source=None)
QDT.close()
def test_instantiate_TekTransmon(self):
TT = Tektronix_driven_transmon('TT')
TT.close()
def test_instantiate_CBoxv3_transmon(self):
CT = CBox_v3_driven_transmon('CT')
CT.close()
def test_instantiate_QWG_transmon(self):
QT = QWG_driven_transmon('QT')
QT.close()
##############################################
# calculate methods
##############################################
def test_calc_freq(self):
self.CCL_qubit.cfg_qubit_freq_calc_method('latest')
self.CCL_qubit.calculate_frequency()
self.CCL_qubit.cfg_qubit_freq_calc_method('flux')
self.CCL_qubit.calculate_frequency()
##############################################
# basic prepare methods
##############################################
def test_prep_for_continuous_wave(self):
self.CCL_qubit.ro_acq_weight_type('optimal')
with self.assertRaises(ValueError):
self.CCL_qubit.prepare_for_continuous_wave()
self.CCL_qubit.ro_acq_weight_type('SSB')
self.CCL_qubit.prepare_for_continuous_wave()
@unittest.skipIf(True, 'Test for use with an old duplexer.')
def test_prep_cw_config_vsm(self):
self.CCL_qubit.spec_vsm_ch_in(2)
self.CCL_qubit.spec_vsm_ch_out(1)
self.CCL_qubit.spec_vsm_amp(0.5)
self.CCL_qubit.prepare_for_continuous_wave()
self.assertEqual(self.VSM.in1_out1_switch(), 'OFF')
self.assertEqual(self.VSM.in1_out2_switch(), 'OFF')
self.assertEqual(self.VSM.in2_out1_switch(), 'EXT')
self.assertEqual(self.VSM.in2_out2_switch(), 'OFF')
self.assertEqual(self.VSM.in2_out1_amp(), 0.5)
def test_prep_for_fluxing(self):
self.CCL_qubit.prepare_for_fluxing()
@unittest.skip('Not Implemented')
def test_prep_flux_bias(self):
raise NotImplementedError()
##############################################
# Testing prepare for readout
##############################################
def test_prep_readout(self):
self.CCL_qubit.prepare_readout()
def test_prep_ro_instantiate_detectors(self):
self.MC.soft_avg(1)
self.CCL_qubit.ro_soft_avg(4)
detector_attributes = [
'int_avg_det', 'int_log_det', 'int_avg_det_single',
'input_average_detector'
]
for det_attr in detector_attributes:
if hasattr(self.CCL_qubit, det_attr):
delattr(self.CCL_qubit, det_attr)
# Test there are no detectors to start with
for det_attr in detector_attributes:
self.assertFalse(hasattr(self.CCL_qubit, det_attr))
self.CCL_qubit.prepare_readout()
# Test that the detectors have been instantiated
for det_attr in detector_attributes:
self.assertTrue(hasattr(self.CCL_qubit, det_attr))
self.assertEqual(self.MC.soft_avg(), 4)
def test_prep_ro_MW_sources(self):
LO = self.CCL_qubit.instr_LO_ro.get_instr()
LO.off()
LO.frequency(4e9)
LO.power(10)
self.assertEqual(LO.status(), 'off')
self.assertEqual(LO.frequency(), 4e9)
self.CCL_qubit.mw_pow_td_source(20)
self.CCL_qubit.ro_freq(5.43e9)
self.CCL_qubit.ro_freq_mod(200e6)
self.CCL_qubit.prepare_readout()
self.assertEqual(LO.status(), 'on')
self.assertEqual(LO.frequency(), 5.43e9 - 200e6)
self.assertEqual(LO.power(), 20)
def test_prep_ro_pulses(self):
self.CCL_qubit.ro_pulse_mixer_alpha(1.1)
self.CCL_qubit.ro_pulse_mixer_phi(4)
self.CCL_qubit.ro_pulse_length(312e-9)
self.CCL_qubit.ro_pulse_down_amp0(.1)
self.CCL_qubit.ro_pulse_down_length0(23e-9)
self.CCL_qubit.ro_pulse_mixer_offs_I(.01)
self.CCL_qubit.ro_pulse_mixer_offs_Q(.02)
self.CCL_qubit.prepare_readout()
self.assertEqual(self.ro_lutman.mixer_phi(), 4)
self.assertEqual(self.ro_lutman.mixer_alpha(), 1.1)
self.assertEqual(self.ro_lutman.M_length_R0(), 312e-9)
self.assertEqual(self.ro_lutman.M_down_length0_R0(), 23e-9)
self.assertEqual(self.ro_lutman.M_down_amp0_R0(), .1)
self.assertEqual(self.UHFQC.sigouts_0_offset(), .01)
self.assertEqual(self.UHFQC.sigouts_1_offset(), .02)
def test_prep_ro_integration_weigths(self):
IF = 50e6
self.CCL_qubit.ro_freq_mod(IF)
self.CCL_qubit.ro_acq_weight_chI(3)
self.CCL_qubit.ro_acq_weight_chQ(4)
# Testing SSB
trace_length = 4096
self.CCL_qubit.ro_acq_weight_type('SSB')
self.CCL_qubit.prepare_readout()
tbase = np.arange(0, trace_length / 1.8e9, 1 / 1.8e9)
cosI = np.array(np.cos(2 * np.pi * IF * tbase))
self.assertEqual(self.UHFQC.quex_rot_3_real(), 1)
self.assertEqual(self.UHFQC.quex_rot_3_imag(), 1)
self.assertEqual(self.UHFQC.quex_rot_4_real(), 1)
self.assertEqual(self.UHFQC.quex_rot_4_imag(), -1)
uploaded_wf = self.UHFQC.quex_wint_weights_3_real()
np.testing.assert_array_almost_equal(cosI, uploaded_wf)
# Testing DSB case
self.CCL_qubit.ro_acq_weight_type('DSB')
self.CCL_qubit.prepare_readout()
self.assertEqual(self.UHFQC.quex_rot_3_real(), 2)
self.assertEqual(self.UHFQC.quex_rot_3_imag(), 0)
self.assertEqual(self.UHFQC.quex_rot_4_real(), 2)
self.assertEqual(self.UHFQC.quex_rot_4_imag(), 0)
# Testing Optimal weight uploading
test_I = np.ones(10)
test_Q = 0.5 * test_I
self.CCL_qubit.ro_acq_weight_func_I(test_I)
self.CCL_qubit.ro_acq_weight_func_Q(test_Q)
self.CCL_qubit.ro_acq_weight_type('optimal')
self.CCL_qubit.prepare_readout()
self.UHFQC.quex_rot_4_real(.21)
self.UHFQC.quex_rot_4_imag(.108)
upl_I = self.UHFQC.quex_wint_weights_3_real()
upl_Q = self.UHFQC.quex_wint_weights_3_imag()
np.testing.assert_array_almost_equal(test_I, upl_I)
np.testing.assert_array_almost_equal(test_Q, upl_Q)
self.assertEqual(self.UHFQC.quex_rot_3_real(), 1)
self.assertEqual(self.UHFQC.quex_rot_3_imag(), -1)
# These should not have been touched by optimal weights
self.assertEqual(self.UHFQC.quex_rot_4_real(), .21)
self.assertEqual(self.UHFQC.quex_rot_4_imag(), .108)
self.CCL_qubit.ro_acq_weight_type('SSB')
########################################################
# Test prepare for timedomain #
########################################################
def test_prep_for_timedomain(self):
self.CCL_qubit.prepare_for_timedomain()
def test_prep_td_sources(self):
self.MW1.off()
self.MW2.off()
self.CCL_qubit.freq_qubit(4.56e9)
self.CCL_qubit.mw_freq_mod(-100e6)
self.CCL_qubit.mw_pow_td_source(13)
self.CCL_qubit.prepare_for_timedomain()
self.assertEqual(self.MW1.status(), 'on')
self.assertEqual(self.MW2.status(), 'on')
self.assertEqual(self.MW2.frequency(), 4.56e9 + 100e6)
self.assertEqual(self.MW2.power(), 13)
def test_prep_td_pulses(self):
self.CCL_qubit.mw_awg_ch(5)
self.CCL_qubit.mw_G_mixer_alpha(1.02)
self.CCL_qubit.mw_D_mixer_phi(8)
self.CCL_qubit.mw_mixer_offs_GI(.1)
self.CCL_qubit.mw_mixer_offs_GQ(.2)
self.CCL_qubit.mw_mixer_offs_DI(.3)
self.CCL_qubit.mw_mixer_offs_DQ(.4)
self.CCL_qubit.mw_ef_amp(.34)
self.CCL_qubit.mw_freq_mod(-100e6)
self.CCL_qubit.anharmonicity(-235e6)
self.CCL_qubit.prepare_for_timedomain()
self.assertEqual(self.AWG8_VSM_MW_LutMan.channel_GI(), 5)
self.assertEqual(self.AWG8_VSM_MW_LutMan.channel_GQ(), 6)
self.assertEqual(self.AWG8_VSM_MW_LutMan.channel_DI(), 7)
self.assertEqual(self.AWG8_VSM_MW_LutMan.channel_DQ(), 8)
self.assertEqual(self.AWG8_VSM_MW_LutMan.G_mixer_alpha(), 1.02)
self.assertEqual(self.AWG8_VSM_MW_LutMan.D_mixer_phi(), 8)
self.assertEqual(self.CCL.vsm_channel_delay0(),
self.CCL_qubit.mw_vsm_delay())
self.assertEqual(self.AWG.sigouts_4_offset(), .1)
self.assertEqual(self.AWG.sigouts_5_offset(), .2)
self.assertEqual(self.AWG.sigouts_6_offset(), .3)
self.assertEqual(self.AWG.sigouts_7_offset(), .4)
self.assertEqual(self.AWG8_VSM_MW_LutMan.mw_ef_amp180(), .34)
self.assertEqual(self.AWG8_VSM_MW_LutMan.mw_ef_modulation(), -335e6)
def test_prep_td_config_vsm(self):
self.CCL_qubit.mw_vsm_G_amp(0.8)
self.CCL_qubit.mw_vsm_D_phase(0)
self.CCL_qubit.mw_vsm_ch_in(2)
self.CCL_qubit.mw_vsm_mod_out(5)
self.CCL_qubit.prepare_for_timedomain()
self.assertEqual(self.VSM.mod5_ch2_gaussian_amp(), 0.8)
self.assertEqual(self.VSM.mod5_ch2_derivative_phase(), 0)
###################################################
# Test basic experiments #
###################################################
def test_cal_mixer_offsets_drive(self):
self.CCL_qubit.calibrate_mixer_offsets_drive()
@unittest.skipIf(openql_import_fail, 'OpenQL not present')
def test_resonator_spec(self):
self.CCL_qubit.ro_acq_weight_type('SSB')
# set to not set to bypass validator
self.CCL_qubit.freq_res._save_val(None)
with self.assertRaises(ValueError):
self.CCL_qubit.find_resonator_frequency()
self.CCL_qubit.freq_res(5.4e9)
self.CCL_qubit.find_resonator_frequency()
freqs = np.linspace(6e9, 6.5e9, 31)
self.CCL_qubit.measure_heterodyne_spectroscopy(freqs=freqs)
@unittest.skipIf(openql_import_fail, 'OpenQL not present')
def test_resonator_power(self):
self.CCL_qubit.ro_acq_weight_type('SSB')
freqs = np.linspace(6e9, 6.5e9, 31)
powers = np.arange(-30, -10, 5)
# set to not set to bypass validator
self.CCL_qubit.freq_res._save_val(None)
self.CCL_qubit.measure_resonator_power(freqs=freqs, powers=powers)
@unittest.skipIf(openql_import_fail, 'OpenQL not present')
def test_measure_transients(self):
self.CCL_qubit.ro_acq_input_average_length(2e-6)
self.CCL_qubit.measure_transients()
@unittest.skipIf(openql_import_fail, 'OpenQL not present')
def test_qubit_spec(self):
freqs = np.linspace(6e9, 6.5e9, 31)
self.CCL_qubit.measure_spectroscopy(freqs=freqs)
# @unittest.skip('NotImplementedError')
@unittest.skipIf(openql_import_fail, 'OpenQL not present')
def test_find_qubit_freq(self):
self.CCL_qubit.cfg_qubit_freq_calc_method('latest')
self.CCL_qubit.find_frequency()
self.CCL_qubit.cfg_qubit_freq_calc_method('flux')
self.CCL_qubit.find_frequency()
@unittest.skipIf(openql_import_fail, 'OpenQL not present')
def test_AllXY(self):
self.CCL_qubit.measure_allxy()
@unittest.skipIf(openql_import_fail, 'OpenQL not present')
def test_T1(self):
self.CCL_qubit.measure_T1(times=np.arange(0, 1e-6, 20e-9),
update=False)
self.CCL_qubit.T1(20e-6)
self.CCL_qubit.measure_T1(update=False)
@unittest.skipIf(openql_import_fail, 'OpenQL not present')
def test_Ramsey(self):
self.CCL_qubit.mw_freq_mod(100e6)
self.CCL_qubit.measure_ramsey(times=np.arange(0, 1e-6, 20e-9),
update=False)
self.CCL_qubit.T2_star(20e-6)
self.CCL_qubit.measure_ramsey(update=False)
@unittest.skipIf(openql_import_fail, 'OpenQL not present')
def test_echo(self):
self.CCL_qubit.mw_freq_mod(100e6)
# self.CCL_qubit.measure_echo(times=np.arange(0,2e-6,40e-9))
time.sleep(1)
self.CCL_qubit.T2_echo(40e-6)
# self.CCL_qubit.measure_echo()
time.sleep(1)
with self.assertRaises(ValueError):
invalid_times = [0.1e-9, 0.2e-9, 0.3e-9, 0.4e-9]
self.CCL_qubit.measure_echo(times=invalid_times)
with self.assertRaises(ValueError):
self.CCL_qubit.mw_freq_mod(.1e6)
invalid_times = np.arange(0, 2e-6, 60e-9)
self.CCL_qubit.measure_echo(times=invalid_times)
self.CCL_qubit.mw_freq_mod(100e6)
@classmethod
def tearDownClass(self):
for inststr in list(self.CCL_qubit._all_instruments):
try:
inst = self.CCL_qubit.find_instrument(inststr)
inst.close()
except KeyError:
pass
class Test_Device_obj(unittest.TestCase):
@classmethod
def setUpClass(self):
"""
This sets up a mock setup using a CCL to control multiple qubits
"""
self.station = station.Station()
self.CCL_qubit = ct.CCLight_Transmon('CCL_qubit')
self.MW1 = vmw.VirtualMWsource('MW1')
self.MW2 = vmw.VirtualMWsource('MW2')
self.MW3 = vmw.VirtualMWsource('MW3')
self.SH = sh.virtual_SignalHound_USB_SA124B('SH')
self.UHFQC = dummy_UHFQC('UHFQC')
self.CCL = dummy_CCL('CCL')
self.VSM = Dummy_Duplexer('VSM')
self.MC = measurement_control.MeasurementControl(
'MC', live_plot_enabled=False, verbose=False)
self.MC.station = self.station
self.station.add_component(self.MC)
# Required to set it to the testing datadir
test_datadir = os.path.join(pq.__path__[0], 'tests', 'test_output')
self.MC.datadir(test_datadir)
a_tools.datadir = self.MC.datadir()
self.AWG = v8.VirtualAWG8('DummyAWG8')
self.AWG8_VSM_MW_LutMan = mwl.AWG8_VSM_MW_LutMan('MW_LutMan_VSM')
self.AWG8_VSM_MW_LutMan.AWG(self.AWG.name)
self.AWG8_VSM_MW_LutMan.channel_GI(1)
self.AWG8_VSM_MW_LutMan.channel_GQ(2)
self.AWG8_VSM_MW_LutMan.channel_DI(3)
self.AWG8_VSM_MW_LutMan.channel_DQ(4)
self.AWG8_VSM_MW_LutMan.mw_modulation(100e6)
self.AWG8_VSM_MW_LutMan.sampling_rate(2.4e9)
self.ro_lutman = UHFQC_RO_LutMan('RO_lutman', num_res=5)
self.ro_lutman.AWG(self.UHFQC.name)
# Assign instruments
self.CCL_qubit.instr_LutMan_MW(self.AWG8_VSM_MW_LutMan.name)
self.CCL_qubit.instr_LO_ro(self.MW1.name)
self.CCL_qubit.instr_LO_mw(self.MW2.name)
self.CCL_qubit.instr_spec_source(self.MW3.name)
self.CCL_qubit.instr_acquisition(self.UHFQC.name)
self.CCL_qubit.instr_VSM(self.VSM.name)
self.CCL_qubit.instr_CC(self.CCL.name)
self.CCL_qubit.instr_LutMan_RO(self.ro_lutman.name)
self.CCL_qubit.instr_MC(self.MC.name)
self.CCL_qubit.instr_SH(self.SH.name)
config_fn = os.path.join(pq.__path__[0], 'tests', 'test_cfg_CCL.json')
self.CCL_qubit.cfg_openql_platform_fn(config_fn)
# Setting some "random" initial parameters
self.CCL_qubit.ro_freq(5.43e9)
self.CCL_qubit.ro_freq_mod(200e6)
self.CCL_qubit.freq_qubit(4.56e9)
self.CCL_qubit.freq_max(4.62e9)
self.CCL_qubit.mw_freq_mod(-100e6)
self.CCL_qubit.mw_awg_ch(1)
self.CCL_qubit.cfg_qubit_nr(0)
self.CCL_qubit.mw_vsm_delay(15)
self.CCL_qubit.mw_mixer_offs_GI(.1)
self.CCL_qubit.mw_mixer_offs_GQ(.2)
self.CCL_qubit.mw_mixer_offs_DI(.3)
self.CCL_qubit.mw_mixer_offs_DQ(.4)
@classmethod
def tearDownClass(self):
for inststr in list(self.CCL_qubit._all_instruments):
try:
inst = self.CCL_qubit.find_instrument(inststr)
inst.close()
except KeyError:
pass
CCL = QuTech_CCL.CCL('CCL', address='192.168.0.11', port=5025)
cs_filepath = os.path.join(pq.__path__[0], 'measurement', 'openql_experiments',
'output', 'cs.txt')
print("cs_file_path", cs_filepath)
opc_filepath = os.path.join(pq.__path__[0], 'measurement',
'openql_experiments', 'output',
'qisa_opcodes.qmap')
CCL.control_store(cs_filepath)
CCL.qisa_opcode(opc_filepath)
CCL.num_append_pts(2)
station.add_component(CCL)
from pycqed.instrument_drivers.meta_instrument.LutMans.ro_lutman import UHFQC_RO_LutMan
RO_lutman = UHFQC_RO_LutMan('RO_lutman', num_res=7)
RO_lutman.AWG(UHFQC.name)
station.add_component(RO_lutman)
# making full DIO triggered lookuptable
rolut = station.components['RO_lutman']
UHFQC = station.components['UHFQC']
CCL = station.components['CCL']
# This load the CCL sequence that triggers consecutive readouts
example_fp = os.path.abspath(
os.path.join(pq.__path__[0], '..', 'examples', 'CCLight_example',
'qisa_test_assembly', 'UHFQC_ro_example.qisa'))
CCL.eqasm_program(example_fp)
CCL.start()
amps = [0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7]