def construct(s, nbits=0):
s.in_ = InPort(mk_bits(nbits))
s.out = OutPort(mk_bits(nbits))
s.w = Wire(mk_bits(nbits))
connect(s.w, s.out)
s.inner = Foo(32)(in_=s.in_, out=s.w)
def construct( s ):
s.in_ = InPort( Bits32 )
s.inner = Inner()
s.out = OutPort( Bits32 )
connect( s.in_, s.inner.in_)
connect( s.inner.out, s.out )
def construct(s):
s.in_1 = dsl.InPort(Bits32)
s.in_2 = dsl.InPort(Bits32)
s.out1 = dsl.OutPort(Bits32)
s.out2 = dsl.OutPort(Bits32)
dsl.connect(s.in_1, s.out1)
dsl.connect(s.in_2, s.out2)
def construct(s):
s.in_ = [dsl.InPort(Bits32) for _ in range(5)]
s.wire = [dsl.Wire(Bits32) for _ in range(5)]
s.out = dsl.OutPort(Bits32)
dsl.connect(s.wire[2], s.out)
for i in range(5):
dsl.connect(s.wire[i], s.in_[i])
def construct(s):
s.in_ = InPort(Bits16)
s.out = OutPort(Bits32)
s.inner = FooStruct(16)
s.inner.in_ //= s.in_
connect(s.inner.out.b, s.out)
def construct(s):
s.STATE_IDLE = 42
s.out_1 = OutPort(Bits32)
s.out_2 = OutPort(Bits32)
connect(s.STATE_IDLE, s.out_1)
@s.update
def upblk():
s.out_2 = s.STATE_IDLE
def construct(s):
s.const = [0 for _ in range(5)]
s.bar = OutPort(Bits32)
connect(s.bar, s.const[1])
s.out = OutPort(Bits32)
@s.update
def upblk():
s.out = s.const[0]
def construct(s):
s.wire = [Wire(Bits32) for _ in range(5)]
s.bar = OutPort(Bits32)
connect(s.bar, s.wire[1])
@s.update
def upblk():
for i in range(5):
s.wire[i] = Bits32(0)
def construct(s, nbits=1):
s.in_ = InPort(nbits)
s.out = OutPort(nbits)
s.w = Wire(nbits)
connect(s.w, s.out)
s.inner = Foo(32)
s.inner.in_ //= s.in_
s.inner.out //= s.w
def construct(s, nbits=1):
s.in_ = InPort(nbits)
s.out = OutPort(nbits)
s.w = Wire(nbits)
connect(s.w, s.out)
s.inner = Real_shamt(5)
s.inner.in_ //= s.in_
s.inner.out //= s.w
def construct( s ):
s.in_ = [ InValRdy( Bits32 ) for _ in range(2) ]
s.out = [ OutValRdy( Bits32 ) for _ in range(2) ]
s.sel = InPort( Bits1 )
s.out_sel = OutPort( Bits32 )
connect( s.out[0], s.in_[1] )
connect( s.out[1], s.in_[0] )
@s.update
def upblk():
s.out_sel = s.in_[ s.sel ].msg
def construct( s ):
s.in_ = InPort( Bits32 )
s.wire = Wire( Bits32 )
s.out = OutPort( Bits32 )
connect( s.in_, s.wire )
@s.update
def out():
s.out = s.wire + 444
def construct(s):
s.STATES = [1, 2, 3, 4, 5]
s.out = [OutPort(Bits32) for _ in range(5)]
s.tmp = OutPort(Bits32)
for i in range(5):
connect(s.STATES[i], s.out[i])
@s.update
def upblk():
s.tmp = s.STATES[0]
def construct( s ):
s.in_ = InPort( Bits16 )
s.out = OutPort( Bits16 )
s.b = multi_components_B()
# There should be a way to check module connections?
connect( s.in_, s.b.in_ )
@s.update
def multi_components_A():
s.out = s.in_ + s.b.out
def construct( s ):
s.in_ = InPort( strc )
s.out_foo = OutPort( Bits32 )
s.out_bar = OutPort( Bits32 )
s.out_sum = OutPort( Bits16 )
s.sum = [ Wire( Bits16 ) for _ in range(3) ]
@s.update
def upblk():
for i in range(3):
s.sum[i] = s.in_.packed_array[i][0] + s.in_.packed_array[i][1]
s.out_sum = s.sum[0] + s.sum[1] + s.sum[2]
connect( s.out_foo, s.in_.foo )
connect( s.out_bar, s.in_.inner.bar )
def construct( s, nbits=0 ):
s.in_ = InPort ( mk_bits(nbits) )
s.out = OutPort( mk_bits(nbits) )
s.w = Wire( mk_bits(nbits) )
connect( s.w, s.out )
@s.update
def up_in():
s.inner.in_ = s.in_
@s.update
def up_out():
s.w = s.inner.out
s.inner = Real_shamt( 5 )#( in_ = s.in_, out = s.w )
def construct( s, nbits=0 ):
s.in_ = InPort ( mk_bits(nbits) )
s.out = OutPort( mk_bits(nbits) )
s.w = Wire( mk_bits(nbits) )
connect( s.w, s.out )
@s.func
def assign_in( x ):
s.inner.in_ = x
@s.update
def up_in():
assign_in( s.in_ )
@s.func
def read_out():
s.w = s.inner.out
@s.update
def up_out():
read_out()
s.inner = Real_shamt( 5 )#( in_ = s.in_, out = s.w )
def construct( s ):
s.in_ = InPort( Bits32 )
s.m1 = Module1()
s.m2 = Module1()
s.out = OutPort( Bits32 )
connect( s.in_, s.m1.in_ )
connect( s.m1.out, s.m2.in_ )
connect( s.m2.out, s.out )
def construct(s):
s.in_ = InIfc()
s.out = OutIfc()
# This will be automatically extended to connect all signals in
# this interface!
dsl.connect(s.out, s.in_)
def construct( s ): s.in_ = InPort( strc ) s.out = OutPort( Bits32 ) connect( s.out, s.in_.foo )
def construct( s ): s.out = OutPort( Bits32 ) connect( s.out, 0 )
def construct(s):
s.out = [OutPort(Bits32) for _ in range(5)]
s.wire_ = [Wire(Bits32) for _ in range(5)]
for i in range(5):
connect(s.wire_[i], s.out[i])
connect(s.wire_[i], i)
def construct(s):
s.in_ = InPort(Bits32)
s.out = OutPort(Bits4)
connect(s.out, s.in_[2:6])
def construct(s):
s.STATE_IDLE = 42
s.out = OutPort(Bits32)
connect(s.STATE_IDLE, s.out)
def construct(s):
s.in_ = InPort(Bits32)
s.wire_ = Wire(Bits32)
s.out = OutPort(Bits32)
connect(s.in_, s.wire_)
connect(s.wire_, s.out)
def construct(s, T1, T2, T3, T4, T5, T6, T7):
s.in_ = InPort(Bits32)
s.wire_ = Wire(Bits32)
s.out = OutPort(Bits32)
connect(s.in_, s.wire_)
connect(s.wire_, s.out)
def construct(s):
s.in_ = InPort(B)
s.out = [OutPort(Bits32) for _ in range(2)]
connect(s.out[0], s.in_.c[0].bar)
connect(s.out[1], s.in_.c[1].bar)
def construct(s):
s.in_ = InPort(B)
s.out_foo = OutPort(Bits32)
s.out_bar = OutPort(Bits32)
connect(s.out_foo, s.in_.foo)
connect(s.out_bar, s.in_.c.bar)
def construct(s):
s.in_ = Ifc()
s.out = dsl.OutPort(Bits32)
dsl.connect(s.out, s.in_.msg)
def construct(s):
s.in_ = [Ifc() for _ in range(5)]
s.out = dsl.OutPort(Bits32)
dsl.connect(s.in_[2].msg, s.out)