def program_fpga(file_name):
from pynq import xlnk
# Reset xilinx driver
xlnk.Xlnk().xlnk_reset()
path = tvm.get_global_func("tvm.rpc.server.workpath")(file_name)
env = get_env()
program_bitstream.bitstream_program(env.TARGET, path)
logging.info("Program FPGA with %s ", file_name)
def program_fpga(file_name):
# pylint: disable=import-outside-toplevel
env = get_env()
if env.TARGET == "pynq":
from pynq import xlnk
# Reset xilinx driver
xlnk.Xlnk().xlnk_reset()
elif env.TARGET == "de10nano":
# Load the de10nano program function.
load_vta_dll()
path = tvm.get_global_func("tvm.rpc.server.workpath")(file_name)
program_bitstream.bitstream_program(env.TARGET, path)
logging.info("Program FPGA with %s ", file_name)