def logical_binary_op(self, op, left, right):
if op == "AND":
return ClassicalAnd(left, right)
elif op == "OR":
return ClassicalInclusiveOr(left, right)
elif op == "IOR":
return ClassicalInclusiveOr(left, right)
elif op == "XOR":
return ClassicalExclusiveOr(left, right)
def exitClassicalBinary(self, ctx):
# type: (QuilParser.ClassicalBinaryContext) -> None
if ctx.AND():
self.result.append(ClassicalAnd(_addr(ctx.addr(0)), _addr(ctx.addr(1))))
elif ctx.OR():
self.result.append(ClassicalOr(_addr(ctx.addr(0)), _addr(ctx.addr(1))))
elif ctx.MOVE():
self.result.append(ClassicalMove(_addr(ctx.addr(0)), _addr(ctx.addr(1))))
elif ctx.EXCHANGE():
self.result.append(ClassicalExchange(_addr(ctx.addr(0)), _addr(ctx.addr(1))))
def AND(classical_reg1, classical_reg2):
"""
Produce an AND instruction.
:param classical_reg1: The first classical register.
:param classical_reg2: The second classical register, which gets modified.
:return: A ClassicalAnd instance.
"""
left = unpack_classical_reg(classical_reg1)
right = unpack_classical_reg(classical_reg2)
return ClassicalAnd(left, right)
def AND(classical_reg1, classical_reg2):
"""
Produce an AND instruction.
NOTE: The order of operands was reversed in pyQuil <=1.9 .
:param classical_reg1: The first classical register, which gets modified.
:param classical_reg2: The second classical register or immediate value.
:return: A ClassicalAnd instance.
"""
left, right = unpack_reg_val_pair(classical_reg1, classical_reg2)
return ClassicalAnd(left, right)
def AND(classical_reg1: MemoryReferenceDesignator,
classical_reg2: Union[MemoryReferenceDesignator, int]) -> ClassicalAnd:
"""
Produce an AND instruction.
NOTE: The order of operands was reversed in pyQuil <=1.9 .
:param classical_reg1: The first classical register, which gets modified.
:param classical_reg2: The second classical register or immediate value.
:return: A ClassicalAnd instance.
"""
left, right = unpack_reg_val_pair(classical_reg1, classical_reg2)
assert isinstance(right, (MemoryReference, int)) # placate mypy
return ClassicalAnd(left, right)
def exitLogicalBinaryOp(self, ctx):
# type: (QuilParser.LogicalBinaryOpContext) -> None
left = _addr(ctx.addr(0))
if ctx.INT():
right = int(ctx.INT().getText())
else:
right = _addr(ctx.addr(1))
if ctx.AND():
self.result.append(ClassicalAnd(left, right))
elif ctx.OR():
self.result.append(ClassicalOr(left, right))
elif ctx.IOR():
self.result.append(ClassicalInclusiveOr(left, right))
elif ctx.XOR():
self.result.append(ClassicalExclusiveOr(left, right))
def exitLogicalBinaryOp(self, ctx):
# type: (QuilParser.LogicalBinaryOpContext) -> None
left = _addr(ctx.addr(0))
right: Union[int, MemoryReference]
if ctx.INT():
right = int(ctx.INT().getText())
else:
right = _addr(ctx.addr(1))
if ctx.AND():
self.result.append(ClassicalAnd(left, right))
elif ctx.OR():
if isinstance(right, MemoryReference):
self.result.append(ClassicalOr(left, right))
else:
raise RuntimeError(
"Right operand of deprecated OR instruction must be a"
f" MemoryReference, but found '{right}'")
elif ctx.IOR():
self.result.append(ClassicalInclusiveOr(left, right))
elif ctx.XOR():
self.result.append(ClassicalExclusiveOr(left, right))
