def test_ibmq_mid_measure() -> None:
c = Circuit(3, 3).H(1).CX(1, 2).Measure(0, 0).Measure(1, 1)
c.add_barrier([0, 1, 2])
c.CX(1, 0).H(0).Measure(2, 2)
b = IBMQEmulatorBackend("ibmq_athens",
hub="ibm-q",
group="open",
project="main")
b.compile_circuit(c)
assert not NoMidMeasurePredicate().verify(c)
assert b.valid_circuit(c)
def test_convert() -> None:
circ = Circuit(4, 4)
circ.H(0).CX(0, 1)
circ.add_gate(OpType.noop, [1])
circ.CRz(0.5, 1, 2)
circ.add_barrier([2])
circ.ZZPhase(0.3, 2, 3).CX(3, 0).Tdg(1)
circ.Measure(0, 0)
circ.Measure(1, 2)
circ.Measure(2, 3)
circ.Measure(3, 1)
circ_aqt = tk_to_aqt(circ)
assert json.loads(circ_aqt[1]) == [0, 3, 1, 2]
assert all(gate[0] in ["X", "Y", "MS"] for gate in circ_aqt[0])
def test_ibmq_mid_measure() -> None:
c = Circuit(3, 3).H(1).CX(1, 2).Measure(0, 0).Measure(1, 1)
c.add_barrier([0, 1, 2])
c.CX(1, 0).H(0).Measure(2, 2)
# test open backend does not support mid-measure
# cannot test premium backends that do
b = IBMQEmulatorBackend("ibmq_athens")
with pytest.raises(RuntimeError) as warninfo:
b.compile_circuit(c)
assert "Not a valid operation" in str(warninfo.value)
with pytest.raises(CircuitNotValidError) as warninfo2:
b.get_counts(c, 10)
assert "NoMidMeasurePredicate" in str(warninfo2.value)
def test_convert() -> None:
circ = Circuit(4)
circ.H(0).CX(0, 1)
circ.add_gate(OpType.noop, [1])
circ.CRz(0.5, 1, 2)
circ.add_barrier([2])
circ.ZZPhase(0.3, 2, 3).CX(3, 0).Tdg(1)
circ.measure_all()
RebaseHQS().apply(circ)
circ_hqs = circuit_to_qasm_str(circ, header="hqslib1")
qasm_str = circ_hqs.split("\n")[6:-1]
test = True
for com in qasm_str:
test &= any(
com.startswith(gate)
for gate in ("rz", "U1q", "ZZ", "measure", "barrier"))
assert test
def test_convert() -> None:
circ = Circuit(3, 3)
circ.H(0).CX(0, 1)
circ.add_gate(OpType.XXPhase, 0.12, [1, 2])
circ.add_gate(OpType.noop, [1])
circ.add_barrier([2])
circ.Measure(0, 1)
circ.Measure(1, 0)
circ.Measure(2, 2)
(circ_ionq, measures) = tk_to_ionq(circ)
assert measures[0] == 1
assert measures[1] == 0
assert measures[2] == 2
assert circ_ionq["qubits"] == 3
assert circ_ionq["circuit"][0]["gate"] == "h"
assert circ_ionq["circuit"][1]["gate"] == "cnot"
assert circ_ionq["circuit"][2]["gate"] == "xx"
def test_aqt() -> None:
# Run a circuit on the noisy simulator.
token = cast(str, os.getenv("AQT_AUTH"))
b = AQTBackend(token, device_name="sim/noise-model-1", label="test 1")
c = Circuit(4, 4)
c.H(0)
c.CX(0, 1)
c.Rz(0.3, 2)
c.CSWAP(0, 1, 2)
c.CRz(0.4, 2, 3)
c.CY(1, 3)
c.add_barrier([0, 1])
c.ZZPhase(0.1, 2, 0)
c.Tdg(3)
c.measure_all()
b.compile_circuit(c)
n_shots = 10
shots = b.get_shots(c, n_shots, seed=1, timeout=30)
counts = b.get_counts(c, n_shots)
assert len(shots) == n_shots
assert sum(counts.values()) == n_shots
class CircuitBuilder:
def __init__(
self,
qregs: List[QuantumRegister],
cregs: Optional[List[ClassicalRegister]] = None,
name: Optional[str] = None,
phase: Optional[float] = 0.0,
):
self.qregs = qregs
self.cregs = [] if cregs is None else cregs
self.tkc = Circuit(name=name)
self.tkc.add_phase(phase)
self.qregmap = {}
for reg in qregs:
tk_reg = self.tkc.add_q_register(reg.name, len(reg))
self.qregmap.update({reg: tk_reg})
self.cregmap = {}
for reg in self.cregs:
tk_reg = self.tkc.add_c_register(reg.name, len(reg))
self.cregmap.update({reg: tk_reg})
def circuit(self) -> Circuit:
return self.tkc
def add_qiskit_data(self, data: "QuantumCircuitData") -> None:
for i, qargs, cargs in data:
condition_kwargs = {}
if i.condition is not None:
cond_reg = self.cregmap[i.condition[0]]
condition_kwargs = {
"condition_bits":
[cond_reg[k] for k in range(len(cond_reg))],
"condition_value": i.condition[1],
}
if type(i) == ControlledGate:
if type(i.base_gate) == qiskit_gates.RYGate:
optype = OpType.CnRy
else:
# Maybe handle multicontrolled gates in a more general way,
# but for now just do CnRy
raise NotImplementedError(
"qiskit ControlledGate with " +
"base gate {} not implemented".format(i.base_gate))
else:
optype = _known_qiskit_gate[type(i)]
qubits = [
self.qregmap[qbit.register][qbit.index] for qbit in qargs
]
bits = [self.cregmap[bit.register][bit.index] for bit in cargs]
if optype == OpType.Unitary2qBox:
u = i.to_matrix()
ubox = Unitary2qBox(u)
self.tkc.add_unitary2qbox(ubox, qubits[0], qubits[1],
**condition_kwargs)
elif optype == OpType.Barrier:
self.tkc.add_barrier(qubits)
elif optype in (OpType.CircBox, OpType.Custom):
qregs = [QuantumRegister(i.num_qubits, "q")
] if i.num_qubits > 0 else []
cregs = ([ClassicalRegister(i.num_clbits, "c")]
if i.num_clbits > 0 else [])
builder = CircuitBuilder(qregs, cregs)
builder.add_qiskit_data(i.definition)
subc = builder.circuit()
if optype == OpType.CircBox:
cbox = CircBox(subc)
self.tkc.add_circbox(cbox, qubits + bits,
**condition_kwargs)
else:
# warning, this will catch all `Gate` instances
# that were not picked up as a subclass in _known_qiskit_gate
params = [param_to_tk(p) for p in i.params]
gate_def = CustomGateDef.define(i.name, subc,
list(subc.free_symbols()))
self.tkc.add_custom_gate(gate_def, params, qubits + bits)
else:
params = [param_to_tk(p) for p in i.params]
self.tkc.add_gate(optype, params, qubits + bits,
**condition_kwargs)
