示例#1
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def test_layout():
    p = Project()
    out = p.output
    gen1 = p.new_module(m.Generator)
    gen2 = p.new_module(m.Generator)
    amp = p.new_module(m.Amplifier)
    amp << [gen1, gen2]
    amp >> out
    assert [gen1.x, gen2.x, amp.x, out.x].count(512) == 4
    assert [gen1.y, gen2.y, amp.y, out.y].count(512) == 4
    p.layout()
    assert [gen1.x, gen2.x, amp.x, out.x].count(512) != 4
    assert [gen1.y, gen2.y, amp.y, out.y].count(512) != 4
示例#2
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def test_reflect():
    p = Project()
    amp1 = p.new_module(m.Amplifier)
    amp2 = p.new_module(m.Amplifier)
    mc = p.new_module(m.MultiCtl)
    mc >> amp1
    mc >> amp2
    mc.mappings.values[0].min = 32768
    mc.mappings.values[0].max = 0
    mc.mappings.values[0].controller = amp1.controllers["volume"].number
    mc.mappings.values[1].controller = amp2.controllers["volume"].number
    amp1.volume = 0
    mc.reflect(0)
    assert mc.value == 32768
    assert amp2.volume == 1024
示例#3
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def test_reflect():
    p = Project()
    amp1 = p.new_module(m.Amplifier)
    amp2 = p.new_module(m.Amplifier)
    mc = p.new_module(m.MultiCtl)
    mc >> amp1
    mc >> amp2
    mc.mappings.values[0].min = 32768
    mc.mappings.values[0].max = 0
    mc.mappings.values[0].controller = amp1.controllers["volume"].number
    mc.mappings.values[1].controller = amp2.controllers["volume"].number
    amp1.volume = 0
    mc.reflect(0)
    assert mc.value == 32768
    assert amp2.volume == 1024
示例#4
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def test_propagation_multisynth_transpose_rangelimit():
    p = Project()
    ms1 = p.new_module(m.MultiSynth)
    mc = p.new_module(m.MultiCtl)
    mc >> ms1
    mapping = mc.mappings.values[0]
    mapping.controller = ms1.controllers["transpose"].number
    mapping.min = 128
    mapping.max = 144
    mapping.gain = 256 + int(256 / 17)
    mc.value = 0
    assert ms1.transpose == 0
    mc.value = 16384
    assert ms1.transpose == 8
    mc.value = 32768
    assert ms1.transpose == 16
示例#5
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def test_propagation_multisynth_transpose_rangelimit():
    p = Project()
    ms1 = p.new_module(m.MultiSynth)
    mc = p.new_module(m.MultiCtl)
    mc >> ms1
    mapping = mc.mappings.values[0]
    mapping.controller = ms1.controllers["transpose"].number
    mapping.min = 128
    mapping.max = 144
    mapping.gain = 256 + int(256 / 17)
    mc.value = 0
    assert ms1.transpose == 0
    mc.value = 16384
    assert ms1.transpose == 8
    mc.value = 32768
    assert ms1.transpose == 16
def test_connection_shorthand():
    p = Project()
    amp = p.new_module(m.Amplifier)
    gen = p.new_module(m.Generator)
    gen >> amp
    p.output << amp
    assert gen.index in p.module_connections[amp.index]
    assert amp.index in p.module_connections[p.output.index]
示例#7
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def test_propagation_amp_volume():
    p = Project()
    amp1 = p.new_module(m.Amplifier)
    amp2 = p.new_module(m.Amplifier)
    mc = p.new_module(m.MultiCtl)
    mc >> amp1
    mc >> amp2
    mc.mappings.values[0].min = 32768
    mc.mappings.values[0].max = 0
    mc.mappings.values[0].controller = amp1.controllers["volume"].number
    mc.mappings.values[1].controller = amp2.controllers["volume"].number
    mc.value = 0
    assert amp1.volume == 1024
    assert amp2.volume == 0
    mc.value = 16384
    assert amp1.volume == 512
    assert amp2.volume == 512
    mc.value = 32768
    assert amp1.volume == 0
    assert amp2.volume == 1024
示例#8
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def hello_world():
    project = Project()
    fm = project.new_module(m.Fm, m_feedback=42)
    project.connect(fm, project.output)
    init(None, 44100, 2, 0)
    with Slot(project) as slot:
        slot.send_event(0, 42, 32, fm, 0, 0)
        print("Press Enter to close")
        input()
        slot.stop()
    deinit()
示例#9
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def test_propagation_amp_volume():
    p = Project()
    amp1 = p.new_module(m.Amplifier)
    amp2 = p.new_module(m.Amplifier)
    mc = p.new_module(m.MultiCtl)
    mc >> amp1
    mc >> amp2
    mc.mappings.values[0].min = 32768
    mc.mappings.values[0].max = 0
    mc.mappings.values[0].controller = amp1.controllers["volume"].number
    mc.mappings.values[1].controller = amp2.controllers["volume"].number
    mc.value = 0
    assert amp1.volume == 1024
    assert amp2.volume == 0
    mc.value = 16384
    assert amp1.volume == 512
    assert amp2.volume == 512
    mc.value = 32768
    assert amp1.volume == 0
    assert amp2.volume == 1024
示例#10
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def test_propagation_multisynth_transpose():
    p = Project()
    ms1 = p.new_module(m.MultiSynth)
    ms2 = p.new_module(m.MultiSynth)
    mc = p.new_module(m.MultiCtl)
    mc >> ms1
    mc >> ms2
    mc.mappings.values[0].min = 0
    mc.mappings.values[0].max = 256
    mc.mappings.values[0].controller = ms1.controllers["transpose"].number
    mc.mappings.values[1].min = 256
    mc.mappings.values[1].max = 0
    mc.mappings.values[1].controller = ms2.controllers["transpose"].number
    mc.value = 0
    assert ms1.transpose == -128
    assert ms2.transpose == 128
    mc.value = 16384
    assert ms1.transpose == 0
    assert ms2.transpose == 0
    mc.value = 32768
    assert ms1.transpose == 128
    assert ms2.transpose == -128
示例#11
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def test_propagation_multisynth_transpose():
    p = Project()
    ms1 = p.new_module(m.MultiSynth)
    ms2 = p.new_module(m.MultiSynth)
    mc = p.new_module(m.MultiCtl)
    mc >> ms1
    mc >> ms2
    mc.mappings.values[0].min = 0
    mc.mappings.values[0].max = 256
    mc.mappings.values[0].controller = ms1.controllers["transpose"].number
    mc.mappings.values[1].min = 256
    mc.mappings.values[1].max = 0
    mc.mappings.values[1].controller = ms2.controllers["transpose"].number
    mc.value = 0
    assert ms1.transpose == -128
    assert ms2.transpose == 128
    mc.value = 16384
    assert ms1.transpose == 0
    assert ms2.transpose == 0
    mc.value = 32768
    assert ms1.transpose == 128
    assert ms2.transpose == -128
示例#12
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def test_note_mod_property():
    project = Project()
    pattern = Pattern(tracks=1, lines=4)
    project.attach_pattern(pattern)
    note = pattern.data[0][0]
    assert note.module == 0
    assert note.module_index is None
    assert note.mod is None
    mod: m.Generator = project.new_module(m.Generator)
    note.mod = mod
    assert note.mod is mod
    assert note.module_index == mod.index
    assert note.module == mod.index + 1
    note.module = 5
    assert note.mod is None
    assert note.module_index == 4