def update_data(self): """ Update redis (caches config) Pulls the table references for each interface. """ self.route_dest_map = {} self.route_dest_list = [] ## The nexthop for loopbacks should be all zero for loip in self.loips: sub_id = ip2byte_tuple(loip) + (255, 255, 255, 255) + (self.tos, ) + (0, 0, 0, 0) self.route_dest_list.append(sub_id) self.route_dest_map[sub_id] = self.loips[loip].packed # Get list of front end asic namespaces for multi-asic platform. # This list will be empty for single asic platform. front_ns = multi_asic.get_all_namespaces()['front_ns'] ipnstr = "0.0.0.0/0" ipn = ipaddress.ip_network(ipnstr) route_str = "ROUTE_TABLE:0.0.0.0/0" for db_conn in Namespace.get_non_host_dbs(self.db_conn): # For multi-asic platform, proceed to get routes only for # front end namespaces. # For single-asic platform, front_ns will be empty list. if front_ns and db_conn.namespace not in front_ns: continue port_table = multi_asic.get_port_table_for_asic(db_conn.namespace) ent = db_conn.get_all(mibs.APPL_DB, route_str, blocking=False) if ent is None: continue nexthops = ent["nexthop"] ifnames = ent["ifname"] for nh, ifn in zip(nexthops.split(','), ifnames.split(',')): ## Ignore non front panel interfaces ## TODO: non front panel interfaces should not be in APPL_DB at very beginning ## This is to workaround the bug in current sonic-swss implementation if ifn == "eth0" or ifn == "lo" or ifn == "docker0": continue # Ignore internal asic routes if multi_asic.is_port_channel_internal(ifn, db_conn.namespace): continue if (ifn in port_table and multi_asic.PORT_ROLE in port_table[ifn] and port_table[ifn][multi_asic.PORT_ROLE] == multi_asic.INTERNAL_PORT): continue sub_id = ip2byte_tuple(ipn.network_address) + ip2byte_tuple( ipn.netmask) + (self.tos, ) + ip2byte_tuple(nh) self.route_dest_list.append(sub_id) self.route_dest_map[sub_id] = ipn.network_address.packed self.route_dest_list.sort()
def __init__(self): self.yang_acl = None self.requested_session = None self.mirror_stage = None self.current_table = None self.tables_db_info = {} self.rules_db_info = {} self.rules_info = {} # Load database config files load_db_config() self.sessions_db_info = {} self.configdb = ConfigDBConnector() self.configdb.connect() self.statedb = SonicV2Connector(host="127.0.0.1") self.statedb.connect(self.statedb.STATE_DB) # For multi-npu architecture we will have both global and per front asic namespace. # Global namespace will be used for Control plane ACL which are via IPTables. # Per ASIC namespace will be used for Data and Everflow ACL's. # Global Configdb will have all ACL information for both Ctrl and Data/Evereflow ACL's # and will be used as souurce of truth for ACL modification to config DB which will be done to both Global DB and # front asic namespace self.per_npu_configdb = {} # State DB are used for to get mirror Session monitor port. # For multi-npu platforms each asic namespace can have different monitor port # dependinding on which route to session destination ip. So for multi-npu # platforms we get state db for all front asic namespace in addition to self.per_npu_statedb = {} # Getting all front asic namespace and correspding config and state DB connector namespaces = multi_asic.get_all_namespaces() for front_asic_namespaces in namespaces['front_ns']: self.per_npu_configdb[front_asic_namespaces] = ConfigDBConnector( use_unix_socket_path=True, namespace=front_asic_namespaces) self.per_npu_configdb[front_asic_namespaces].connect() self.per_npu_statedb[front_asic_namespaces] = SonicV2Connector( use_unix_socket_path=True, namespace=front_asic_namespaces) self.per_npu_statedb[front_asic_namespaces].connect( self.per_npu_statedb[front_asic_namespaces].STATE_DB) self.read_tables_info() self.read_rules_info() self.read_sessions_info() self.read_policers_info()
def get_ns_list_based_on_options(self): ns_list = [] if not self.is_multi_asic: return [constants.DEFAULT_NAMESPACE] else: namespaces = multi_asic.get_all_namespaces() if self.namespace_option is None: if self.display_option == constants.DISPLAY_ALL: ns_list = namespaces['front_ns'] + namespaces['back_ns'] else: ns_list = namespaces['front_ns'] else: if self.namespace_option not in namespaces['front_ns'] and \ self.namespace_option not in namespaces['back_ns']: raise ValueError('Unknown Namespace {}'.format( self.namespace_option)) ns_list = [self.namespace_option] return ns_list
def get_port_alias_to_name_map(hwsku, asic_id=None): try: from sonic_py_common import multi_asic from ansible.module_utils.multi_asic_utils import load_db_config load_db_config() namespace_list = multi_asic.get_all_namespaces() for key, list in namespace_list.items(): asic_ids = [] for ns in list: asic_ids.append(multi_asic.get_asic_id_from_name(ns)) namespace_list[key] = asic_ids except ImportError: namespace_list = [''] port_alias_to_name_map = {} port_alias_asic_map = {} if hwsku == "Force10-S6000": for i in range(0, 128, 4): port_alias_to_name_map["fortyGigE0/%d" % i] = "Ethernet%d" % i elif hwsku == "Force10-S6100": for i in range(0, 4): for j in range(0, 16): port_alias_to_name_map["fortyGigE1/%d/%d" % (i + 1, j + 1)] = "Ethernet%d" % (i * 16 + j) elif hwsku == "Force10-Z9100": for i in range(0, 128, 4): port_alias_to_name_map["hundredGigE1/%d" % (i / 4 + 1)] = "Ethernet%d" % i # TODO: Come up with a generic formula for generating etp style aliases based on number of ports and lanes elif hwsku == "DellEMC-Z9332f-M-O16C64": # 100G ports s100G_ports = [x for x in range(0, 96, 2)] + [x for x in range(128, 160, 2)] # 400G ports s400G_ports = [x for x in range(96, 128, 8)] + [x for x in range(160, 256, 8)] # 10G ports s10G_ports = [x for x in range(256, 258)] for i in s100G_ports: alias = "etp{}{}".format(((i + 8) // 8), chr(ord('a') + (i // 2) % 4)) port_alias_to_name_map[alias] = "Ethernet{}".format(i) for i in s400G_ports: alias = "etp{}".format((i // 8) + 1) port_alias_to_name_map[alias] = "Ethernet{}".format(i) for i in s10G_ports: alias = "etp{}".format(33 if i == 256 else 34) port_alias_to_name_map[alias] = "Ethernet{}".format(i) elif hwsku == "DellEMC-Z9332f-O32": for i in range(0, 256, 8): alias = "etp{}".format((i // 8) + 1) port_alias_to_name_map[alias] = "Ethernet{}".format(i) for i in range(256, 258): alias = "etp{}".format(33 if i == 256 else 34) port_alias_to_name_map[alias] = "Ethernet{}".format(i) elif hwsku == "Arista-7050-QX32": for i in range(1, 25): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 1) * 4) for i in range(25, 33): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "Arista-7050-QX-32S": for i in range(0, 4): port_alias_to_name_map["Ethernet1/%d" % (i + 1)] = "Ethernet%d" % i for i in range(6, 29): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 5) * 4) for i in range(29, 37): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % ((i - 5) * 4) elif hwsku == "Arista-7280CR3-C40": for i in range(1, 33): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 1) * 4) for i in range(33, 41, 2): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 1) * 4) port_alias_to_name_map["Ethernet%d/5" % i] = "Ethernet%d" % (i * 4) elif hwsku == "Arista-7260CX3-C64" or hwsku == "Arista-7170-64C": for i in range(1, 65): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "Arista-7060CX-32S-C32" or hwsku == "Arista-7060CX-32S-Q32" or hwsku == "Arista-7060CX-32S-C32-T1" or hwsku == "Arista-7170-32CD-C32" \ or hwsku == "Arista-7050CX3-32S-C32": for i in range(1, 33): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "Mellanox-SN2700-D40C8S8": # 10G ports s10G_ports = range(0, 4) + range(8, 12) # 50G ports s50G_ports = [x for x in range(16, 24, 2)] + [x for x in range(40, 88, 2)] + [x for x in range(104, 128, 2)] # 100G ports s100G_ports = [x for x in range(24, 40, 4)] + [x for x in range(88, 104, 4)] for i in s10G_ports: alias = "etp%d" % (i / 4 + 1) + chr(ord('a') + i % 4) port_alias_to_name_map[alias] = "Ethernet%d" % i for i in s50G_ports: alias = "etp%d" % (i / 4 + 1) + ("a" if i % 4 == 0 else "b") port_alias_to_name_map[alias] = "Ethernet%d" % i for i in s100G_ports: alias = "etp%d" % (i / 4 + 1) port_alias_to_name_map[alias] = "Ethernet%d" % i elif hwsku == "Mellanox-SN2700-D48C8": # 50G ports s50G_ports = [x for x in range(0, 24, 2)] + [x for x in range(40, 88, 2)] + [x for x in range(104, 128, 2)] # 100G ports s100G_ports = [x for x in range(24, 40, 4)] + [x for x in range(88, 104, 4)] for i in s50G_ports: alias = "etp%d" % (i / 4 + 1) + ("a" if i % 4 == 0 else "b") port_alias_to_name_map[alias] = "Ethernet%d" % i for i in s100G_ports: alias = "etp%d" % (i / 4 + 1) port_alias_to_name_map[alias] = "Ethernet%d" % i elif hwsku == "Mellanox-SN2700" or hwsku == "ACS-MSN2700": for i in range(1, 33): port_alias_to_name_map["etp%d" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "Arista-7060CX-32S-D48C8": # All possible breakout 50G port numbers: all_ports = [x for x in range(1, 33)] # 100G ports s100G_ports = [x for x in range(7, 11)] s100G_ports += [x for x in range(23, 27)] port_alias_to_name_map = _port_alias_to_name_map_50G(all_ports, s100G_ports) elif hwsku == "Arista-7260CX3-D108C8": # All possible breakout 50G port numbers: all_ports = [x for x in range(1, 65)] # 100G ports s100G_ports = [x for x in range(13, 21)] port_alias_to_name_map = _port_alias_to_name_map_50G(all_ports, s100G_ports) elif hwsku == "Arista-7800R3-48CQ-LC" or\ hwsku == "Arista-7800R3K-48CQ-LC": for i in range(1, 48): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "INGRASYS-S9100-C32": for i in range(1, 33): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "INGRASYS-S9100-C32" or hwsku == "INGRASYS-S9130-32X" or hwsku == "INGRASYS-S8810-32Q": for i in range(1, 33): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "INGRASYS-S8900-54XC": for i in range(1, 49): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % (i - 1) for i in range(49, 55): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 49) * 4 + 48) elif hwsku == "INGRASYS-S8900-64XC": for i in range(1, 49): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % (i - 1) for i in range(49, 65): port_alias_to_name_map["Ethernet%d/1" % i] = "Ethernet%d" % ((i - 49) * 4 + 48) elif hwsku == "Accton-AS7712-32X": for i in range(1, 33): port_alias_to_name_map["hundredGigE%d" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "Celestica-DX010-C32": for i in range(1, 33): port_alias_to_name_map["etp%d" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "Seastone-DX010": for i in range(1, 33): port_alias_to_name_map["Eth%d" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku in ["Celestica-E1031-T48S4", "Nokia-7215", "Nokia-M0-7215"]: for i in range(1, 53): port_alias_to_name_map["etp%d" % i] = "Ethernet%d" % ((i - 1)) elif hwsku == "et6448m": for i in range(0, 52): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % i elif hwsku == "Nokia-IXR7250E-36x400G": if asic_id is not None: asic_offset = int(asic_id) * 18 for i in range(0, 18): port_alias_to_name_map["Ethernet%d" % (asic_offset + i)] = "Ethernet%d" % ((asic_offset + i)) port_alias_asic_map["Eth%d-ASIC%d" % (i, int(asic_id))] = "Ethernet%d" % ((asic_offset + i)) else: for i in range(0, 36): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % i elif hwsku == 'Nokia-IXR7250E-SUP-10': port_alias_to_name_map = {} elif hwsku == "newport": for i in range(0, 256, 8): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % i elif hwsku == "32x100Gb": for i in range(0, 32): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % i elif hwsku == "36x100Gb": for i in range(0, 36): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % i elif hwsku == "64x100Gb": for i in range(0, 64): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % i elif hwsku == "msft_multi_asic_vs": if asic_id is not None and asic_id in namespace_list['front_ns']: asic_offset = int(asic_id) * 16 backplane_offset = 15 for i in range(1, 17): port_alias_to_name_map["Ethernet1/%d"%(asic_offset+i)] = "Ethernet%d"%((asic_offset + i -1) *4) port_alias_asic_map["Eth%d-ASIC%d"%(i-1, int(asic_id))] = "Ethernet%d"%((asic_offset + i -1) *4) port_alias_to_name_map["Eth%d-ASIC%d"%((backplane_offset+i), int(asic_id))] = "Ethernet-BP%d"%((asic_offset + i -1) *4) port_alias_asic_map["Eth%d-ASIC%d"%((backplane_offset+i), int(asic_id))] = "Ethernet-BP%d"%((asic_offset + i -1) *4) elif asic_id is not None and asic_id in namespace_list['back_ns']: asic_offset = 32 * (int(asic_id) - 2) for i in range(1, 33): port_alias_asic_map["Eth%d-ASIC%d"%(i-1, int(asic_id))] = "Ethernet-BP%d"%((asic_offset + i -1) *4) port_alias_to_name_map["Eth%d-ASIC%d"%(i-1, int(asic_id))] = "Ethernet-BP%d"%((asic_offset + i -1) *4) else: for i in range(1,65): port_alias_to_name_map["Ethernet1/%d" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "msft_four_asic_vs": if asic_id is not None and asic_id in namespace_list['front_ns']: asic_offset = int(asic_id) * 4 backplane_offset = 3 for i in range(1, 5): port_alias_to_name_map["Ethernet1/%d"%(asic_offset+i)] = "Ethernet%d"%((asic_offset + i -1) *4) port_alias_asic_map["Eth%d-ASIC%d"%(i-1, int(asic_id))] = "Ethernet%d"%((asic_offset + i -1) *4) port_alias_to_name_map["Eth%d-ASIC%d"%((backplane_offset+i), int(asic_id))] = "Ethernet-BP%d"%((asic_offset + i -1) *4) port_alias_asic_map["Eth%d-ASIC%d"%((backplane_offset+i), int(asic_id))] = "Ethernet-BP%d"%((asic_offset + i -1) *4) elif asic_id is not None and asic_id in namespace_list['back_ns']: asic_offset = 8 * (int(asic_id) -1) for i in range(1, 9): port_alias_asic_map["Eth%d-ASIC%d"%(i-1, int(asic_id))] = "Ethernet-BP%d"%((asic_offset + i -1) *4) port_alias_to_name_map["Eth%d-ASIC%d"%(i-1, int(asic_id))] = "Ethernet-BP%d"%((asic_offset + i -1) *4) else: for i in range(1,9): port_alias_to_name_map["Ethernet1/%d" % i] = "Ethernet%d" % ((i - 1) * 4) elif hwsku == "B6510-48VS8CQ" or hwsku == "RA-B6510-48V8C": for i in range(1,49): port_alias_to_name_map["twentyfiveGigE0/%d" % i] = "Ethernet%d" % i for i in range(49,57): port_alias_to_name_map["hundredGigE0/%d" % (i-48)] = "Ethernet%d" % i elif hwsku == "RA-B6910-64C": for i in range(1,65): port_alias_to_name_map["hundredGigE%d" % i] = "Ethernet%d" % i else: for i in range(0, 128, 4): port_alias_to_name_map["Ethernet%d" % i] = "Ethernet%d" % i return port_alias_to_name_map, port_alias_asic_map