class BusInterface(GenType):
class_prefix = "Bus"
slug_prefix = 'bus'
class BusPci(metaclass=BusInterface):
"""PCI or AGP bus -- includes on-chip AGP for Celsius/Kelvin IGPs."""
class BusPcie(metaclass=BusInterface):
"""PCI-Express bus."""
class BusIgp(metaclass=BusInterface):
"""An on-chip custom bus interface for Curie/Tesla IGPs."""
class BusFlexIO(metaclass=BusInterface):
"""FlexIO interface (for RSX)."""
class BusTegra(metaclass=BusInterface):
"""An on-chip custom bus interface for Tegra IGPs."""
from ssot.cgen import CGenerator, CPartEnum
cgen = CGenerator('bus', [], [
CPartEnum(BusInterface),
])
class GpuTU116(GpuTU102):
id = 0x176
pciid = 0x2180
gpc_count = 3
tpc_count = 4
date = "22.02.2019"
bios_major = 0x90
bios_chip = 0x16
from ssot.cgen import CGenerator, CPartEnum, CPartStruct, StructName
from ssot.bus import cgen as cgen_bus
from ssot.fb import cgen as cgen_fb
cgen = CGenerator('gpu', [cgen_bus, cgen_fb], [
CPartEnum(GpuGen),
CPartEnum(Gpu),
CPartStruct(Gpu, [
StructName,
Gpu.id,
Gpu.pciid,
Gpu.pciid_varbits,
Gpu.bios_major,
Gpu.bios_chip,
Gpu.bus,
Gpu.fb,
Gpu.gen,
]),
])
class FbMCP61(FbC51):
tile_regions = 15
class FbG80(FbG73):
vram_addr_bits = 32
tile_regions = None
comp_ram_size = ...
class FbMCP77(FbG80):
is_igp = True
class FbGF100(metaclass=FbGen):
vram_addr_bits = 33
is_igp = False
has_comp = True
class FbGK20A(FbGF100):
is_igp = True
from ssot.cgen import CGenerator, CPartEnum
cgen = CGenerator('fb', [], [
CPartEnum(FbGen),
])