def test_add():
if skip_test():
return
dtype = "int32"
shape = (8, 4)
mod = create_module_add(shape, dtype)
mod = offload(mod)
exe = compile_module(mod)
run_check_add(exe, shape, dtype)
def tadd(lanes):
"""Print counter
Paramters
---------
lanes : Int
The number of vector lanes.
"""
if skip_test():
return
dtype = "int32"
shape = (8, 4)
mod = create_module_add(shape, dtype)
mod = offload(mod)
lib = compile_hardware(lanes)
opts = compiler_opts(lib)
cycles = run_and_check(shape, shape, dtype, mod, opts)
print_test_info("add", lanes, cycles)
def tbias(lanes):
"""Print counter
Paramters
---------
lanes : Int
The number of vector lanes.
"""
if skip_test():
return
dtype = "int32"
xshape = (1, 112, 112, 32)
yshape = (32,)
mod = create_module_bias_add(xshape, yshape, dtype)
mod = offload(mod)
lib = compile_hardware(lanes)
opts = compiler_opts(lib)
cycles = run_and_check(xshape, yshape, dtype, mod, opts)
print_test_info("nn.bias_add", lanes, cycles)
Paramters
---------
test : Str
The name of the test.
lanes : Int
The number of vector lanes.
cycles : Int
The number of cycles.
"""
print("test:{} vector-lanes:{} number of cycles:{}".format(test, lanes, cycles))
@pytest.mark.skipif(skip_test(), reason="Skip because Verilator codegen is not available")
def tadd(lanes):
"""Print counter
Paramters
---------
lanes : Int
The number of vector lanes.
"""
if skip_test():
return
dtype = "int32"
shape = (8, 4)
mod = create_module_add(shape, dtype)
mod = offload(mod)
lib = compile_hardware(lanes)
Paramters
---------
test : Str
The name of the test.
lanes : Int
The number of vector lanes.
cycles : Int
The number of cycles.
"""
print("test:{} vector-lanes:{} number of cycles:{}".format(
test, lanes, cycles))
@pytest.mark.skipif(skip_test(),
reason="Skip because Verilator codegen is not available")
def tadd(lanes):
"""Print counter
Paramters
---------
lanes : Int
The number of vector lanes.
"""
if skip_test():
return
dtype = "int32"
shape = (8, 4)
mod = create_module_add(shape, dtype)
mod = offload(mod)
