def __init__(self, x, y, s): try: (len(x) != len(y) or len(s) != len(x) + 1) except NotImplementedError: print('Invalid Connections') super(PipoAdder, self).__init__([x, y, s]) input = [] input.append(x) input.append(y) self.input = input self.output = s size = len(x) self.internalWiring = transport.wires(size) if size > 1: self.components.append( FullAdder([x[0], y[0], self.internalWiring[0]], [self.internalWiring[1], s[size]])) for i in range(size - 1): self.components.append( FullAdder([x[i], y[i], self.internalWiring[i]], [self.internalWiring[i + 1], s[size - i]])) self.components.append( FullAdder( [x[size - 1], y[size - 1], self.internalWiring[size - 1]], [s[0], s[1]])) else: self.components.append( FullAdder([x[0], y[0], self.internalWiring[0]], [s[0], s[1]])) self.internalWiring[0].propagateSignal(0)
def __init__(self,x0,x1,o): try: (len(x0)!=1 or len(x1)!=1 or len(o)!=4) except NotImplementedError: print('Invalid Connections') super(Decoder2x4,self).__init__([x0,x1,o]) input=[] input.append(x0) input.append(x1) self.input=input self.output=o self.internalWiring = transport.wires(2) self.components.append(Decoder1x2(x0, [self.internalWiring[0]])) self.components.append(Decoder1x2(x1, [self.internalWiring[1]])) self.components.append(gates.AndGate([self.internalWiring[0]],[self.internalWiring[1]],[o[0]])) self.components.append(gates.AndGate([self.internalWiring[0]],x1, [o[1]])) self.components.append(gates.AndGate(x0, [self.internalWiring[1]], [o[2]])) self.components.append(gates.AndGate(x0,x1,[o[3]]))
def __init__(self, s, r, qqbar, c): try: (len(s) != 1 or len(r) != 1 or len(qqbar) != 2) except NotImplementedError: print('Invalid Connections') super(SRFlipFlop, self).__init__([s, r, [qqbar[0]]]) input = [] input.append(s) input.append(r) input.append(c) self.input = input self.output = qqbar self.internalWiring = transport.wires(2) self.components.append(gates.AndGate(c, s, [self.internalWiring[0]])) self.components.append(gates.AndGate(c, r, [self.internalWiring[1]])) self.components.append( gates.NorGate([self.internalWiring[0]], [qqbar[0]], [qqbar[1]])) self.components.append( gates.NorGate([self.internalWiring[1]], [qqbar[1]], [qqbar[0]]))
def __init__(self, x, s): try: (len(x) != 3 or len(s) != 2) except NotImplementedError: print('Invalid Connections') super(FullAdder, self).__init__([x, s]) input = [] input.append(x) self.input = input self.output = s self.internalWiring = transport.wires(3) self.components.append( HalfAdder([x[0], x[1]], [self.internalWiring[0], self.internalWiring[1]])) self.components.append( HalfAdder([self.internalWiring[1], x[2]], [self.internalWiring[2], s[1]])) self.components.append( gates.OrGate([self.internalWiring[0]], [self.internalWiring[2]], [s[0]]))
def __init__(self, d, qqbar, c): try: len(d) != 1 or len(qqbar) != 2 except NotImplementedError: print('Invalid Connections') super(DFlipFlop, self).__init__([d, qqbar[0]]) input = [] input.append(d) input.append(c) self.input = input self.output = qqbar self.internalWiring = transport.wires(3) self.components.append(gates.NotGate(d, [self.internalWiring[0]])) self.components.append(gates.NandGate(c, d, [self.internalWiring[1]])) self.components.append( gates.NandGate(c, [self.internalWiring[0]], [self.internalWiring[2]])) self.components.append( gates.NorGate([self.internalWiring[1]], [qqbar[1]], [qqbar[0]])) self.components.append( gates.NorGate([self.internalWiring[2]], [qqbar[0]], [qqbar[1]]))
import sys sys.path.insert(0, '../utils') import ioManager import new sys.path.insert(0, '../connectors') import transport sys.path.insert(0,'../combinational') import arithmetics inputA = transport.wires(4) inputB = transport.wires(4) out = transport.wires(5) hware = arithmetics.PipoAdder(inputA,inputB,out) iohandler = ioManager.StringIO(hware) print iohandler.input('1111','1111')
import sys sys.path.insert(0, '../utils') import ioManager import new sys.path.insert(0, '../connectors') import transport sys.path.insert(0, '../combinational') import gates inputA = transport.wires(1) inputB = transport.wires(1) inputC = transport.wires(1) hWare = gates.AndGate(inputA, inputB, inputC) ioHandler = ioManager.StringIO(hWare) print((ioHandler.input('1', '1')))
import sys sys.path.insert(0, '../utils') import ioManager import new sys.path.insert(0, '../connectors') import transport sys.path.insert(0, '../combinational') import decoders inputA = transport.wires(1) inputB = transport.wires(1) output = transport.wires(4) iohandler = ioManager.StringIO(decoders.Decoder2x4(inputA, inputB, output)) print(iohandler.input('0', '1'))
import sys sys.path.insert(0, '../utils') import ioManager import new sys.path.insert(0, '../connectors') import transport sys.path.insert(0,'../combinational') import arithmetics inputA = transport.wires(3) out = transport.wires(2) hware = arithmetics.FullAdder(inputA,out) iohandler = ioManager.StringIO(hware) print iohandler.input('1','1')
import sys sys.path.insert(0, '../utils') import ioManager import new sys.path.insert(0, '../connectors') import transport sys.path.insert(0,'../sequential') import ff inputS = transport.wires(1) inputR = transport.wires(1) out = transport.wires(2) clock = transport.wires(1) hware = ff.SRFlipFlop(inputS,inputR,out,clock) iohandler = ioManager.StringIO(hware) print(iohandler.input('0','1','1'))