def test_pin_range(): eq_(dev.pins.count, 20) eq_(dev.pins.count_analog, 6) eq_(dev.pins.count_digital, 14) eq_(dev.pins.range_all, range(0, 20)) eq_(dev.pins.range_analog, range(14, 20)) eq_(dev.pins.range_digital, range(0, 14)) dev.pin('A5') exc_(ValueError, lambda: dev.pin('A6')) exc_(ValueError, lambda: dev.pin('D14'))
def test_pin_range(): eq_(ArduinoPin.count(), 20) eq_(ArduinoPin.count_analog(), 6) eq_(ArduinoPin.count_digital(), 14) # eq_(ArduinoPin.range_all, range(0, 20)) # eq_(ArduinoPin.range_analog, range(14, 20)) # eq_(ArduinoPin.range_digital, range(0, 14)) ArduinoPin('A5') exc_(ValueError, lambda: ArduinoPin('A6')) exc_(ValueError, lambda: ArduinoPin('D14'))
def test_defs(): # eq_(dev.defines.A0, config.A0) eq_(dev.define('A0'), config.A0) eq_(dev.defines.value('A0'), config.A0) # ok_(dev.define('xx')) exc_(DefineError, lambda: dev.define('xx')) exc_(DefineError, lambda: dev.defines.value('xx')) eq_(dev.defines.exists('A0'), True) eq_(dev.defines.exists('xx'), False) # exc_(DefineError,dev.define('xx')) d = dev.defines.as_dict() eq_(d['A0'], config.A0) ok_(len(d) > 20)
def test_register(): eq_(dev.register('DDRB') is dev.register('DDRB'), True) DDRB = dev.register('DDRB') DDRX = dev.register('DDRX') eq_(DDRB.name, 'DDRB') eq_(DDRB.exists, True) eq_(DDRX.exists, False) eq_(DDRB.read_value(), 0) DDRB.write_value(5) eq_(DDRB.read_value(), 5) eq_(DDRB.value, 5) DDRB.value += 1 eq_(DDRB.value, 6) DDRB.value = 0 eq_(DDRB.address, 0x24) exc_(RegisterError, DDRX.read_value) exc_(RegisterError, DDRX.write_value, 0) exc_(RegisterError, lambda: DDRX.address)
def test_registers(): print (Register.names()) ok_(len(Register.names()) > 77) eq_(Register('DDRB').read_value(), 0) eq_(Register('DDRB').value, 0) exc_(ValueError, lambda x: Register('xxx').value, 0) Register('DDRB').write_value(5) eq_(Register('DDRB').value, 5) Register('DDRB').value = 3 eq_(Register('DDRB').value, 3) Register('DDRB').write_value(0) eq_(Register('DDRB').address, 0x24) eq_(Register('DDRB').name, 'DDRB') eq_(Register('DDRB').size, 1) # 9 bit eq_(Register('EEAR').size, 2) Register('EEAR').value = 511 eq_(Register('EEAR').value, 511)
def test_registers(): eq_(dev.registers is dev.registers, True) eq_(dev.registers.exists('DDRB'), True) eq_(dev.registers.exists('xDDRB'), False) eq_(dev.registers.read_value('DDRB'), 0) dev.registers.write_value('DDRB', 5) eq_(dev.registers.read_value('DDRB'), 5) dev.registers.write_value('DDRB', 0) eq_(dev.registers.address('DDRB'), 0x24) exc_(RegisterError, dev.registers.read_value, ('xx')) exc_(RegisterError, dev.registers.write_value, ('xx'), 0) exc_(RegisterError, dev.registers.address, ('xx'))