示例#1
0
    def add16(cpu, opcode, logger):
        regInd = (opcode & 0x30) >> 4
        value = cpu.Reg16(regInd)

        oldHL = cpu.HL
        cpu.HL = cpu.HL + value

        cpu.NFlag = Bits.reset()
        cpu.CFlag = Bits.carryFlag16(oldHL, cpu.HL)
        cpu.HFlag = Bits.carryFlag16(oldHL, cpu.HL, bits=11)
        cpu.m_cycles, cpu.t_states = 3, 11
        logger.info("ADD HL, {}".format(IndexToReg.translate16Bit(regInd)))
示例#2
0
	def add16(cpu, opcode, logger):
		logger.info("ADD HL, rr")
		regInd = (opcode & 0x30) >> 4
		value = 0
		if regInd == 0:
			value = cpu.BC
		elif regInd == 1:
			value = cpu.DE
		elif regInd == 2:
			value = cpu.HL
		elif regInd == 3:
			value = cpu.SP

		oldHL = cpu.HL
		cpu.HL = cpu.HL + value

		cpu.flags[NF] = False
		cpu.flags[CF] = Bits.carryFlag16(oldHL, cpu.HL)
		cpu.flags[HF] = Bits.carryFlag16(oldHL, cpu.HL, bits=11)