示例#1
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文件: asmgen.py 项目: cpu-3/asm
def jalr(rd, rs, imm):
    rd = check_and_trans_reg(rd)
    rs = check_and_trans_reg(rs)
    v = check_and_trans_imm(imm, 12)
    return pack([
        (0b1100111, 7),
        (rd, 5),
        (0, 3),
        (rs, 5),
        (v, 12),
    ])
示例#2
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文件: asmgen.py 项目: cpu-3/asm
def alui(rd, funct3, rs1, imm):
    imm = check_and_trans_imm(imm, 12)
    rd = check_and_trans_reg(rd)
    rs1 = check_and_trans_reg(rs1)
    return pack([
        (0b0010011, 7),
        (rd, 5),
        (funct3, 3),
        (rs1, 5),
        (imm, 12)
    ])
示例#3
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文件: asmgen.py 项目: cpu-3/asm
def flw(rd, rs1, imm):
    imm = check_and_trans_imm(imm, 12)
    rd = check_and_trans_reg(rd)
    rs1 = check_and_trans_reg(rs1)
    return pack([
        (0b0000111, 7),
        (rd, 5),
        (0b010, 3),
        (rs1, 5),
        (imm, 12)
    ])
示例#4
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文件: asmgen.py 项目: cpu-3/asm
def shift(rd, funct3, rs1, imm1, imm2):
    imm1 = check_and_trans_imm(imm1, 7)
    rd = check_and_trans_reg(rd)
    rs1 = check_and_trans_reg(rs1)
    return pack([
        (0b0010011, 7),
        (rd, 5),
        (funct3, 3),
        (rs1, 5),
        (imm1, 5),
        (imm2, 7)
    ])
示例#5
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文件: asmgen.py 项目: cpu-3/asm
def falu(rd, rm, rs1, rs2, funct7):
    rd = check_and_trans_reg(rd)
    rs1 = check_and_trans_reg(rs1)
    rs2 = check_and_trans_reg(rs2)
    l = [
        (0b1010011, 7),
        (rd, 5),
        (rm, 3),
        (rs1, 5),
        (rs2, 5),
        (funct7, 7)
        ]
    return pack(l)
示例#6
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文件: asmgen.py 项目: cpu-3/asm
def branch(imm, funct3, rs1, rs2):
    imm = check_and_trans_imm(imm, 12)
    rs1 = check_and_trans_reg(rs1)
    rs2 = check_and_trans_reg(rs2)
    val = ((imm & 0b1111) << 1) | ((imm >> 10) & 1)
    val2 = ((imm >> 4) & 0b111111) | (((imm >> 11) & 1) << 6)
    return pack([
        (0b1100011, 7),
        (val, 5),
        (funct3, 3),
        (rs1, 5),
        (rs2, 5),
        (val2, 7)
    ])
示例#7
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文件: asmgen.py 项目: cpu-3/asm
def fsw(rs1, rs2, imm):
    imm = check_and_trans_imm(imm, 12)
    rs1 = check_and_trans_reg(rs1)
    rs2 = check_and_trans_reg(rs2)
    val = (imm & 0b11111)
    val2 = (imm >> 5)
    return pack([
        (0b0100111, 7),
        (val, 5),
        (0b010, 3),
        (rs2, 5),
        (rs1, 5),
        (val2, 7),
    ])
示例#8
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文件: asmgen.py 项目: cpu-3/asm
def lui(rd, imm):
    rd = check_and_trans_reg(rd)
    imm = check_and_trans_imm(imm, 20)
    return pack([
        (0b0110111, 7),
        (rd, 5),
        (imm, 20)
        ])
示例#9
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文件: asmgen.py 项目: cpu-3/asm
def auipc(rd, imm):
    rd = check_and_trans_reg(rd)
    v = check_and_trans_imm(imm, 20)
    return pack([
        (0b0010111, 7),
        (rd, 5),
        (v, 20)
        ])
示例#10
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文件: asmgen.py 项目: cpu-3/asm
def jal(rd, imm):
    rd = check_and_trans_reg(rd)
    imm = check_and_trans_imm(imm, 20)
    # check_alignment(imm, 2)
    return pack([
        (0b1101111, 7),
        (rd, 5),
        (bit_reorder(imm, [19, *range(9, -1, -1), 10, *range(18, 10, -1)]), 20)
    ])
示例#11
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文件: asmgen.py 项目: cpu-3/asm
def and_(rd, rs1, rs2):
    rd = check_and_trans_reg(rd)
    rs1 = check_and_trans_reg(rs1)
    rs2 = check_and_trans_reg(rs2)
    return pack_alu(0b0110011, rd, 0b111, rs1, rs2, 0b0000000)