def set_fsb(self, preset): if preset not in self._presets.keys(): return False preset_data = self._presets[preset] pll_data = self.smbus_read_block(I2cDev.PLL_ADDR, 0) pll_data[1] |= (1<<0) | (1<<4) | (1<<6) if len(pll_data) < 17: log("we didn't get enough pll data!") return False # M is always 24 for simplicity # Adjust N for the new M values pll_data[12] = int(24.0/(pll_data[11] & 0x3f) * pll_data[12]) pll_data[16] = int(24.0/(pll_data[15] & 0x3f) * pll_data[16]) pll_data[11] = 24 pll_data[15] = 24 curr_fsb = pll_data[12] curr_pci = pll_data[16] target_fsb, target_pci, voltage_flag = preset_data if curr_fsb == target_fsb and curr_pci == target_pci: return True log("adjustment from %d/%d to %d/%d" % (curr_fsb, curr_pci, target_fsb, target_pci)) # calculate fsb steps fsb_dir = self._stepwidth pci_dir = self._stepwidth # direction if curr_fsb > target_fsb: fsb_dir = -fsb_dir if curr_pci > target_pci: pci_dir = -pci_dir fsb_steps = range(curr_fsb, target_fsb, fsb_dir) pci_steps = range(curr_pci, target_pci, pci_dir) # add target fsb_steps.append(int(target_fsb)) pci_steps.append(int(target_pci)) # normalize lists to the same length utils.normalize(fsb_steps, pci_steps) log("FSB steps: %s" %fsb_steps) log("PCI steps: %s" %pci_steps) # apply steps # set voltage to high during transition utils.ec_gpio_set(utils.EC_VOLTAGE, 1) for fsb, pci in zip(fsb_steps, pci_steps): log("applying step %d/%d" %(fsb, pci)) time.sleep(0.05) pll_data[12] = fsb self.smbus_write_block(I2cDev.PLL_ADDR, 0, pll_data) pll_data[16] = pci time.sleep(0.05) self.smbus_write_block(I2cDev.PLL_ADDR, 0, pll_data) # restore voltage flag utils.ec_gpio_set(utils.EC_VOLTAGE, voltage_flag) self._callback(preset) return True
def set_fsb(self, preset): SHE.set_fsb(self, preset) if preset == SHE.mapping[1]: utils.ec_gpio_set(utils.EC_VOLTAGE, 0)