def SUB(register): if not validate.validate_reg(register): print "Invalid Register: %s" % register exit(1) a = int(registers.reg["A"], 16) if register == "M": b = extras.getPair('H', 'L') if extras.chkMemory(b): b = int(registers.reg[register], 16) else: print " Invalid Memory:", b exit(1) else: b = int(registers.reg[register], 16) t = a - b a = int(extras.getLowerNibble(format(a, '0x')), 2) b = int(extras.getLowerNibble(format(b, '0x')), 2) if not validate.validate_data(t): print "\n////-----UnderFlow Detected----////\n" t = format(t, "02x") t = set_flags.setCarry(t) set_flags.setFlags(a, b, t, isAbnormalFlow=True) tmp = {"A": t[1:]} else: t = format(t, "02x") set_flags.setFlags(a, b, t) tmp = {"A": t} set_flags.setFlags(a, b, t) registers.reg.update(tmp)
def STAX(register): if validate.validate_reg(register): a = extras.getPair(register, registers.reg_pair[register]) registers.memory[a] = registers.reg['A'] else: print "Invalid Register:", register exit(1)
def LXI(register, data): if validate.validate_reg(register): registers.reg[register] = data[:2] if len(data[2:]) > 1: registers.reg[registers.reg_pair[register]] = data[2:] else: print "Invalid Register", register exit(1)
def MVI(reg, data): if reg == 'M': a = extras.getPair('H', 'L') registers.memory[a] = data elif validate.validate_reg(reg): registers.reg[reg] = data else: print "Invalid Register"
def MOV(reg1, reg2): if not validate.validate_reg(reg1): print "Invalid Register: %s" % reg1 exit(1) if not validate.validate_reg(reg2): print "Invalid Register: %s" % reg2 exit(1) if reg1 == 'M': a = extras.getPair('H', 'L') if extras.chkMemory(a): registers.memory[a] = registers.reg[reg2] else: print " Invalid Memory:", a elif reg2 == 'M': a = extras.getPair('H', 'L') registers.reg[reg1] = registers.memory[a] else: registers.reg[reg1] = registers.reg[reg2]
def prnt(addr): try: if validate.validate_reg(addr): print registers.reg[addr] elif extras.chkMemory(addr): print registers.memory[addr] else: print " Invalid Memory or Register!!" except: print "invalid command type help for list of commands!!"
def INR(register): if validate.validate_reg(register): if register == 'M': a = extras.getPair('H', 'L') if extras.chkMemory(a): b = int(registers.memory[a], 16) + 1 if b > 255: b = 0 registers.memory[a] = format(b, '0x') else: print "invalid memory:", a exit(1) else: b = int(registers.reg[register], 16) + 1 if b > 255: b = 0 registers.reg[register] = format(b, '0x')
def DCX(reg1): if validate.validate_reg(reg1): try: reg2 = registers.reg_pair[reg1] except: print "invalid register pair", reg1 exit(1) a = extras.getPair(reg1, reg2) a = int(a, 16) + 1 if a < 0: a = 65535 a = format(a, '04x') registers.reg[reg1] = a[:2] registers.reg[reg2] = a[2:] else: print "invalid register", reg1 exit(1)
def CMP(register): if validate.validate_reg(register): a_data = int(registers.reg['A'], 16) if register == 'M': a = extras.getPair('H', 'L') if validate.validate_memory(a): a = int(registers.memory[a], 16) else: print "Invalid Memory:", a exit(1) else: a = int(registers.reg[register], 16) if a_data < a: registers.flag['CY'] = 1 elif a_data == a: registers.flag['Z'] = 1 else: registers.flag['CY'] = 0 registers.flag['Z'] = 0 else: print "Invalid Register:", registers exit(1)
def DAD(reg1): if validate.validate_reg(reg1): c = 0 try: reg2 = registers.reg_pair[reg1] except: print "invalid register pair", reg1 exit(1) a = int(registers.reg[reg2], 16) res = int(registers.reg['L'], 16) + a if res > 255: c = 1 res -= 256 registers.reg['L'] = format(res, '02x') a = int(registers.reg[reg1], 16) res = int(registers.reg['H'], 16) + a + c res = format(res, '02x') if not validate.validate_data(int(res, 16)): res = set_flags.setCarry(res) registers.reg['H'] = res else: print 'invalid register pair:', reg1 exit(1)