def _emit(self, *args, **kwargs):
"""Load immediate.
Store ``value`` to the register ``a``.
>>> ldi(a, value)
You can use two destination registers. ``value`` will be stored to
both register ``a`` and ``b``.
>>> ldi(a, b, value)
Available immediate values:
* signed and unsigned integers.
* floating point numbers.
* List of 2-bit signed and unsigned integers. Its maximum length is 16.
The third behaves exceptionally. Values of the list will be stored to
each SIMD element one by one. When the length of the list is shorter
than 16, 0s will are stored for remaining elements.
"""
reg1 = args[0]
if len(args) == 2:
reg2 = REGISTERS['null']
imm = args[1]
else:
reg2 = args[1]
imm = args[2]
sig = kwargs.get('sig', 'load')
if sig != 'load':
raise AssembleError('Conflict of signals')
waddr_add, waddr_mul, write_swap, pack = \
self._encode_write_operands(reg1, reg2)
imm, unpack = self._encode_imm(imm)
cond_add = cond_mul = enc._COND[kwargs.get('cond', 'always')]
set_flags = kwargs.get('set_flags', False)
insn = enc.LoadInsn(sig=0xe,
unpack=unpack,
pm=0,
pack=pack,
cond_add=cond_add,
cond_mul=cond_mul,
sf=set_flags,
ws=write_swap,
waddr_add=waddr_add,
waddr_mul=waddr_mul,
immediate=imm)
if self.asm.sanity_check:
insn.verbose = LoadImmInstr(reg1, reg2, imm)
self.asm._emit(insn)
#============================ Instruction encoding ============================
SAMPLE_ALU_INSN = enc.AluInsn(
sig=0, unpack=1, pm=1, pack=2, cond_add=3, cond_mul=4, sf=1, ws=1,
waddr_add=53, waddr_mul=12, op_mul=4, op_add=2, raddr_a=33, raddr_b=53,
add_a=4, add_b=7, mul_a=6, mul_b=2
)
SAMPLE_BRANCH_INSN = enc.BranchInsn(
sig=0xf, cond_br=13, rel=1, reg=0, raddr_a=27, ws=1, waddr_add=53,
waddr_mul=12, immediate=0x12345678
)
SAMPLE_LOAD_INSN = enc.LoadInsn(
sig=0xe, unpack=1, pm=1, pack=2, cond_add=3, cond_mul=4, sf=1, ws=1,
waddr_add=53, waddr_mul=12, immediate=0x12345678
)
SAMPLE_SEMA_INSN = enc.SemaInsn(
sig=0xe, unpack=4, pm=1, pack=2, cond_add=3, cond_mul=4, sf=1, ws=1,
waddr_add=53, waddr_mul=12, sa=1, semaphore=13
)
def test_equality():
assert SAMPLE_ALU_INSN == SAMPLE_ALU_INSN
assert SAMPLE_ALU_INSN != SAMPLE_BRANCH_INSN
def test_bytes_conversion():
for sample_insn in [SAMPLE_ALU_INSN, SAMPLE_BRANCH_INSN,
SAMPLE_LOAD_INSN, SAMPLE_SEMA_INSN]:
insn = enc.Insn.from_bytes(sample_insn.to_bytes())