def configure_generators(): """ Ensure the generators have started properly """ generator_startup = [Expected(a, "connected to .*: %d" % generators.get_port(a), 15, critical=True) for a in generators.get_all()] yield master.expect(AllOf(generator_startup)) for (name,generator) in generators.get_all().iteritems(): log_info("Configure %s" % name) # Configure a random mix of unicast, multicast and broadcast traffic master.sendLine(name, "c u 1 64 1500") master.sendLine(name, "c m 1 64 1500") master.sendLine(name, "c b 1 64 1500") # Apply the specified config master.sendLine(name, "e") # Apply the specified config master.sendLine(name, "p") yield master.expect(Expected(name, "Current configuration", 5))
def configure_analyzers(): """ Ensure the analyzers have started properly and then configure their channel frequencies as specified in the test configuration file """ analyzer_startup = [Expected(a, "connected to .*: %d" % analyzers.get_port(a), 15, critical=True) for a in analyzers.get_all()] yield master.expect(AllOf(analyzer_startup)) for (name,analyzer) in analyzers.get_all().iteritems(): if analyzer['type'] != 'audio': continue log_info("Configure %s" % name) # Disable all channels master.sendLine(name, "d a") yield master.expect(Expected(name, "Channel 0: disabled", 15)) # Set the base channel index analyzer_base = analyzer['base'] master.sendLine(name, "b %d" % analyzer_base) # Configure all channels for (chan_id,freq) in analyzer['frequencies'].iteritems(): # Need to convert unicode to string before sending as a command chan = int(chan_id) master.sendLine(name, "c %d %d" % (chan, freq)) # The channel ID is offset from the base in the generating message yield master.expect( Expected(name, "Generating sine table for chan %d" % (chan - analyzer_base), 15)) master.sendLine(name, "e a") channel_enables = [Expected(name, "Channel %d: enabled" % (int(c) - analyzer_base), 15) for c in analyzer['frequencies'].keys()] yield master.expect(AllOf(channel_enables))
def runTest(args): master = xmos.test.master.Master() analysis_bin = os.path.join(rootDir, 'sw_audio_analyzer', 'app_audio_analyzer_avb', 'bin', 'audio_analyzer.xe') xrun = xrunProcess(master, args.adapter_id, "xrun", analysis_bin) controller_path = os.path.join(rootDir, 'sw_audio_analyzer', 'host_audio_analyzer') controller_id = 'controller' controller = process.Process(controller_id, master, output_file="controller.log", verbose=True) reactor.spawnProcess(controller, './audio_analyzer', ['./audio_analyzer'], env=os.environ, path=controller_path) # Wait for the controller to have started yield master.expect(Expected(controller_id, "^Starting I2S$", 10)) # Allow time for everything to settle yield base.sleep(5) master.sendLine(controller_id, "d a") yield master.expect(Expected(controller_id, "Channel 0: disabled", 15)) # There needs to be small delays to allow the audio signals to settle, otherwise # spurious glitches are detected. delay = 0.5 test_frequencies = [1000, 2000, 4000, 8000] # Ensure that there is no glitch by default for freq in test_frequencies: master.sendLine(controller_id, "d 0") yield master.expect(Expected(controller_id, "Channel 0: disabled", 15)) yield base.sleep(delay) master.sendLine(controller_id, "c 0 {freq}".format(freq=freq)) yield master.expect(Expected(controller_id, "Generating sine table for chan 0", 15)) yield base.sleep(delay) master.sendLine(controller_id, "e 0") yield master.expect(Sequence([ Expected(controller_id, "Channel 0: enabled", 5), Expected(controller_id, "Channel 0: Signal detected", 10), Expected(controller_id, "Channel 0: Frequency %d" % freq, 5)])) yield master.expect(NoneOf([Expected(controller_id, "ERROR: Channel 0: glitch detected", 30)])) offset = 5000 for freq in test_frequencies: log_info("-----------------") log_info("Test %d Hz" % freq) num_points = int(48000/freq); for period in range(0, num_points): log_info("Test for glitch at %d (%d/%d)" % (freq, period + 1, num_points)) # Disable all channels master.sendLine(controller_id, "d 0") yield master.expect(Expected(controller_id, "Channel 0: disabled", 15)) yield base.sleep(delay) master.sendLine(controller_id, "c 0 {freq} -1 0 {period}".format(freq=freq, period=period+offset)) yield master.expect(Expected(controller_id, "Generating sine table for chan 0", 15)) yield base.sleep(delay) master.sendLine(controller_id, "e 0") yield master.expect(Sequence([ Expected(controller_id, "Channel 0: enabled", 5), Expected(controller_id, "Channel 0: Signal detected", 10), Expected(controller_id, "Channel 0: Frequency %d" % freq, 5)])) yield master.expect(Expected(controller_id, "ERROR: Channel 0: glitch detected", 15)) yield base.sleep(delay) base.testComplete(reactor)