Beispiel #1
0
def setup_memory_controllers(system, ruby, dir_cntrls, options):
    ruby.block_size_bytes = options.cacheline_size
    ruby.memory_size_bits = 48
    block_size_bits = int(math.log(options.cacheline_size, 2))

    if options.numa_high_bit:
        numa_bit = options.numa_high_bit
    else:
        # if the numa_bit is not specified, set the directory bits as the
        # lowest bits above the block offset bits, and the numa_bit as the
        # highest of those directory bits
        dir_bits = int(math.log(options.num_dirs, 2))
        numa_bit = block_size_bits + dir_bits - 1

    index = 0
    mem_ctrls = []
    crossbars = []

    # Sets bits to be used for interleaving.  Creates memory controllers
    # attached to a directory controller.  A separate controller is created
    # for each address range as the abstract memory can handle only one
    # contiguous address range as of now.
    for dir_cntrl in dir_cntrls:
        # Create 1 instance of DRAMCache per directory controller
        if options.dramcache:
            dramcache_ctrl = MemConfig.create_dramcache_ctrl(
                MemConfig.get_cache(options.dramcache_type),
                system.mem_ranges[0], index, options.num_dirs,
                options.dramcache_size, options.dramcache_assoc,
                options.dramcache_block_size, options.num_cpus,
                options.dramcache_timing)

            mem_ctrls.append(dramcache_ctrl)
            dir_cntrl.memory = dramcache_ctrl.port

        dir_cntrl.directory.numa_high_bit = numa_bit

        crossbar = None
        if len(system.mem_ranges) > 1:
            # we dont support this
            fatal("system mem_ranges greater than 1")
            crossbar = IOXBar()
            crossbars.append(crossbar)
            if options.dramcache:
                dramcache_ctrl.dramcache_masterport = crossbar.slave
            else:
                dir_cntrl.memory = crossbar.slave

        for r in system.mem_ranges:
            # if dramcache exists interleave at dramcache_block_size
            if options.dramcache:
                mem_ctrl = MemConfig.create_mem_ctrl(
                    MemConfig.get(options.mem_type),
                    r, index, options.num_dirs,
                    int(math.log(options.num_dirs,
                                 2)), options.dramcache_block_size)
            else:
                mem_ctrl = MemConfig.create_mem_ctrl(
                    MemConfig.get(options.mem_type),
                    r, index, options.num_dirs,
                    int(math.log(options.num_dirs, 2)), options.cacheline_size)

            mem_ctrls.append(mem_ctrl)

            if crossbar != None:
                mem_ctrl.port = crossbar.master
            else:
                if options.dramcache:
                    mem_ctrl.port = dramcache_ctrl.dramcache_masterport
                else:
                    mem_ctrl.port = dir_cntrl.memory

        index += 1

    system.mem_ctrls = mem_ctrls

    if len(crossbars) > 0:
        ruby.crossbars = crossbars