def test_dout_queue_lvl_2_cosim(cosim_cls):
verif(drv(t=Queue[Uint[4], 3],
seq=[[[list(range(2)) for _ in range(2)] for _ in range(2)]]),
f=flatten(sim_cls=cosim_cls),
ref=flatten(name='ref_model'))
sim()
def test_cosim(cosim_cls):
seq = list(range(1, 10))
directed(drv(t=Uint[16], seq=seq) | delay_rng(0, 2),
f=decouple(sim_cls=cosim_cls),
ref=seq,
delays=[delay_rng(0, 2)])
sim()
def test_dout_queue_lvl_2_no_datacosim(cosim_cls):
verif(drv(t=Queue[Unit, 3],
seq=[[[[Unit() for _ in range(2)] for _ in range(2)]
for _ in range(2)]]),
f=flatten(sim_cls=cosim_cls),
ref=flatten(name='ref_model'))
sim()
def test_two_alter_outs_const():
@gear
async def test() -> (Uint[4], Uint[4]):
yield 0, None
yield None, 1
directed(f=test(__sim__='verilator'), ref=[[0, 0], [1, 1]])
sim(timeout=4)
def test_basic(tmpdir, sim_cls):
tin = Tuple['a':Uint[1], 'b':Uint[2], 'c':Uint[3], 'd':Uint[4]]
tout = Tuple['a':Uint[1], 'c':Uint[3]]
directed(drv(t=tin, seq=[(1, 2, 3, 4)] * 3),
f=repack(t=tout, sim_cls=sim_cls),
ref=[(1, 3)] * 3)
sim(tmpdir)
def test_channeling():
@gear
def dut(din):
return din \
| bc_sig(sigmap={'dout_sig': 'sig'}) \
| add_wrap(sigmap={'din_sig': 'sig'})
directed(drv(t=Uint[16], seq=list(range(3))),
f=dut(sim_cls=SimVerilated),
ref=(list(range(0, 6, 2))))
sim()
def test_two_alter_outs():
@gear(hdl={'compile': True})
async def test(din) -> (Uint[4], Uint[4]):
async with din as d:
yield d, None
async with din as d:
yield None, d
directed(drv(t=Uint[4], seq=[0, 1, 0, 1]), f=test(__sim__='verilator'), ref=[[0, 0], [1, 1]])
sim(timeout=4)
def test_name_map(tmpdir, sim_cls):
tin = Tuple['a':Uint[1], 'b':Uint[2], 'c':Uint[3], 'd':Uint[4]]
tout = Tuple['f':Uint[1], 'g':Uint[3]]
directed(drv(t=tin, seq=[(1, 2, 3, 4)] * 3),
f=repack(t=tout, sim_cls=sim_cls, name_map={
'f': 'a',
'g': 'c'
}),
ref=[(1, 3)] * 3)
sim(tmpdir)
def test_basic():
seq = [(0, 0x1), (1, 0x2), (2, 0x4), (3, 0x3), (4, 0x6), (5, 0x5),
(6, 0x7), (7, 0x0)]
ref = [
[0, 3, 5, 6],
[1, 3, 4, 6],
[2, 4, 5, 6],
]
directed(drv(t=Tuple[Uint[8], Uint[3]], seq=seq),
f=dispatch(__sim__='verilator'),
delays=[delay_rng(0, 3) for _ in range(3)],
ref=ref)
sim()
def run_matrix(impl, mat1, mat2, cols_per_row, col_only: bool = False):
reg['trace/level'] = 0
reg['gear/memoize'] = False
# Add one more dimension to the matrix to support input type for design
mat1 = mat1.reshape(1, mat1.shape[0], mat1.shape[1])
mat2 = mat2.reshape(mat2.shape[0], 1, mat2.shape[1])
# configuration driving
cfg = create_valid_cfg(cols_per_row, mat1)
cfg_drv = drv(t=TCfg, seq=[cfg])
row_t = Queue[Array[Int[16], cfg['num_cols']]]
mat1_drv = drv(t=Queue[row_t], seq=[mat1])
res_list = []
if col_only:
# remove the extra dimension that was previously added since colum mult accepts
mat2 = np.squeeze(mat2)
# for columtn multiplication second operand needs to be only one row
mat2_drv = drv(t=row_t, seq=[mat2])
res = column_multiplication(cfg_drv, mat1_drv, mat2_drv)
# column multiplication returns result in a queue so flatening makes it a regular list
collect(res | flatten, result=res_list)
if impl == 'hw':
cosim('/column_multiplication',
'verilator',
outdir='/tmp/column_multiplication',
rebuild=True,
timeout=100)
else:
mat2_drv = drv(t=Queue[row_t], seq=[mat2])
res = matrix_multiplication(cfg_drv,
mat1_drv,
mat2_drv,
cols_per_row=cols_per_row)
collect(res, result=res_list)
if impl == 'hw':
cosim('/matrix_multiplication',
'verilator',
outdir='/tmp/matrix_multiplication',
rebuild=True,
timeout=100)
try:
sim()
# convert PG results into regular 'int'
if col_only:
pg_res = [int(el) for el in res_list]
else:
pg_res = [int(el) for row_chunk in res_list for el in row_chunk]
# calculate reference NumPy resutls
np_res = np.dot(np.squeeze(mat1), np.transpose(mat2.squeeze()))
# reshape PG results into the same format as
pg_res = np.array(pg_res).reshape(np_res.shape)
sim_assert(
np.equal(pg_res, np_res).all(), "Error in compatring results")
log.info("\033[92m //==== PASS ====// \033[90m")
except:
# printing stack trace
traceback.print_exc()
log.info("\033[91m //==== FAILED ====// \033[90m")
def matrix_ops_single():
########################## DESIGN CONTROLS ##########################
num_cols = 8
num_rows = 6 # HINT suppoerted all dimesitions > 1
cols_per_row = 2 # HINT suported values that are divisible with num_colls
########################### TEST CONTROLS ###########################
sv_gen = 1
###########################################################################
# set either random or custom seed
seed = random.randrange(0, 2**32, 1)
# seed = 1379896999
# """Unify all seeds"""
log.info(f"Random SEED: {seed}")
set_seed(seed)
## input randomization
mat1 = np.random.randint(128, size=(num_rows, num_cols))
mat2 = np.random.randint(128, size=(num_rows, num_cols))
mat1 = np.ones((num_rows, num_cols))
mat2 = np.ones((num_rows, num_cols))
# input the constatn value optionally
# mat1 = np.empty((num_rows, num_cols))
# mat2 = np.empty((num_rows, num_cols))
# # fill the matrix with the same value
# mat1.fill(32767)
# mat2.fill(-32768)
print("Inputs: ")
print(type(mat1))
print(mat1)
print(type(mat2))
print(mat2)
reg['trace/level'] = 0
reg['gear/memoize'] = False
reg['debug/trace'] = ['*']
reg['debug/webviewer'] = True
res_list = []
cfg = {
"cols_per_row": cols_per_row,
"num_rows": num_rows,
"num_cols": num_cols,
'cols_per_multiplier': num_rows // cols_per_row
}
cfg_seq = [cfg]
cfg_drv = drv(t=TCfg, seq=cfg_seq)
# Add one more dimenstion to the matrix to support input type for design
mat1 = mat1.reshape(1, mat1.shape[0], mat1.shape[1])
mat2 = mat2.reshape(mat2.shape[0], 1, mat2.shape[1])
mat1_seq = [mat1]
mat2_seq = [mat2]
row_t = Queue[Array[Int[16], cfg['num_cols']]]
mat1_drv = drv(t=Queue[row_t], seq=mat1_seq)
mat2_drv = drv(t=Queue[row_t], seq=mat2_seq)
res = matrix_multiplication(cfg_drv,
mat1_drv,
mat2_drv,
cols_per_row=cols_per_row)
collect(res, result=res_list)
if sv_gen:
cosim('/matrix_multiplication',
'verilator',
outdir='build/matrix_multiplication/rtl',
rebuild=True,
timeout=100)
sim('build/matrix_multiplication')
## Print raw results results
log.info(f'len_res_list: \n{len(res_list)}')
try:
pg_res = [int(el) for row_chunk in res_list for el in row_chunk]
# calc refference data - matrix2 needs to be transposed before doing multiplocation
np_res = np.dot(np.squeeze(mat1), np.transpose(mat2.squeeze()))
pg_res = np.array(pg_res).reshape(np_res.shape)
log.info(f'result: \n{res}')
log.info(f'pg_res: \n{pg_res}, shape: {pg_res.shape}')
log.info(f'np_res: \n{np_res}, shape: {np_res.shape}')
sim_assert(
np.equal(pg_res, np_res).all(), "Error in compatring results")
log.info("\033[92m //==== PASS ====// \033[90m")
except:
# printing stack trace
traceback.print_exc()
log.info("\033[91m //==== FAILED ====// \033[90m")
def test_full_flat_cosim(cosim_cls):
verif(drv(t=Queue[Uint[4], 3], seq=[[[list(range(4))]]]),
f=flatten(lvl=3, sim_cls=cosim_cls),
ref=flatten(lvl=3, name='ref_model'))
sim()