def _makefile_syn_tcl(self):
"""Create a Xilinx synthesis project by TCL"""
syn_properties = self.manifest_dict.get("syn_properties")
project_new = []
project_tcl = self._tcl_controls["project"]
if shell.check_windows():
tmp = 'project set "{0}" "{1}"'
else:
tmp = 'project set \\"{0}\\" \\"{1}\\"'
properties = [
['family', '$(SYN_FAMILY)'],
['device', '$(SYN_DEVICE)'],
['package', '$(SYN_PACKAGE)'],
['speed', '$(SYN_GRADE)'],
['Manual Implementation Compile Order', 'false'],
['Auto Implementation Top', 'false'],
['Create Binary Configuration File', 'true']]
if not syn_properties is None:
properties.extend(syn_properties)
for prop in properties:
project_new.append(tmp.format(prop[0], prop[1]))
project_new.append('set compile_directory .')
self._tcl_controls["project"] = project_tcl.format(
"\n".join(project_new))
super(ToolISE, self)._makefile_syn_tcl()
def _makefile_syn_top(self):
"""Create the top part of the synthesis Makefile"""
if shell.check_windows():
tcl_interpreter = self._tool_info["windows_bin"]
else:
tcl_interpreter = self._tool_info["linux_bin"]
top_parameter = string.Template("""\
TOP_MODULE := ${top_module}
PWD := $$(shell pwd)
PROJECT := ${project_name}
PROJECT_FILE := $$(PROJECT).${project_ext}
TOOL_PATH := ${tool_path}
TCL_INTERPRETER := ${tcl_interpreter}
ifneq ($$(strip $$(TOOL_PATH)),)
TCL_INTERPRETER := $$(TOOL_PATH)/$$(TCL_INTERPRETER)
endif
SYN_FAMILY := ${syn_family}
SYN_DEVICE := ${syn_device}
SYN_PACKAGE := ${syn_package}
SYN_GRADE := ${syn_grade}
""")
self.writeln(top_parameter.substitute(
tcl_interpreter=tcl_interpreter,
project_name=os.path.splitext(
self.manifest_dict["syn_project"])[0],
project_ext=self._tool_info["project_ext"],
syn_family=self.manifest_dict.get("syn_family", ''),
syn_device=self.manifest_dict["syn_device"],
syn_package=self.manifest_dict["syn_package"],
syn_grade=self.manifest_dict["syn_grade"],
tool_path=self.manifest_dict["syn_path"],
top_module=self.manifest_dict["syn_top"]))
def _get_name_bin(self):
"""Get the name and binary values"""
if shell.check_windows():
bin_name = self._tool_info['windows_bin']
else:
bin_name = self._tool_info['linux_bin']
return bin_name
def _makefile_syn_build(self):
"""Generate the synthesis Makefile targets for handling design build"""
stage_previous = "files.tcl"
stage_list = ["project", "synthesize", "translate",
"map", "par", "bitstream"]
for stage in stage_list:
if stage in self._tcl_controls:
echo_command = '\t\techo {0} >> $@'
tcl_command = []
for command in self._tcl_controls[stage].split('\n'):
tcl_command.append(echo_command.format(command))
command_string = "\n".join(tcl_command)
if shell.check_windows():
command_string = command_string.replace(
"'", "")
self.writeln("""\
{0}.tcl:
{3}
{0}: {1} {0}.tcl
\t\t$(SYN_PRE_{2}_CMD)
\t\t$(TCL_INTERPRETER) [email protected]
\t\t$(SYN_POST_{2}_CMD)
\t\t{4} $@
""".format(stage, stage_previous, stage.upper(),
command_string, shell.touch_command()))
stage_previous = stage
def write(self, line=None):
"""Write a string in the manifest, no new line"""
if not self._initialized:
self.initialize()
if shell.check_windows():
self._file.write(line.replace('\\"', '"'))
else:
self._file.write(line)
def makefile_clean(self):
"""Print the Makefile target for cleaning intermediate files"""
self.writeln("CLEAN_TARGETS := $(LIBS) " +
' '.join(self._clean_targets["clean"]) + "\n")
self.writeln("clean:")
tmp = "\t\t" + shell.del_command() + " $(CLEAN_TARGETS)"
self.writeln(tmp)
if shell.check_windows():
tmp = "\t\t@-" + shell.rmdir_command() + \
" $(CLEAN_TARGETS) >nul 2>&1"
self.writeln(tmp)
def _makefile_syn_files(self):
"""Write the files TCL section of the Makefile"""
ret = []
fileset_dict = {}
sources_list = []
fileset_dict.update(self._hdl_files)
fileset_dict.update(self._supported_files)
for filetype in fileset_dict:
file_list = []
for file_aux in self.fileset:
if isinstance(file_aux, filetype):
file_list.append(shell.tclpath(file_aux.rel_path()))
if not file_list == []:
ret.append(
'SOURCES_{0} := \\\n'
'{1}\n'.format(filetype.__name__,
' \\\n'.join(file_list)))
if not fileset_dict[filetype] is None:
sources_list.append(filetype)
self.writeln('\n'.join(ret))
self.writeln('files.tcl:')
if "files" in self._tcl_controls:
echo_command = '\t\t@echo {0} >> $@'
tcl_command = []
for command in self._tcl_controls["files"].split('\n'):
tcl_command.append(echo_command.format(command))
command_string = "\n".join(tcl_command)
if shell.check_windows():
command_string = command_string.replace("'", "")
self.writeln(command_string)
for filetype in sources_list:
filetype_string = ('\t\t@$(foreach sourcefile,'
' $(SOURCES_{0}), echo "{1}" >> $@ &)'.format(
filetype.__name__, fileset_dict[filetype]))
if shell.check_windows():
filetype_string = filetype_string.replace(
'"', '')
self.writeln(filetype_string)
self.writeln()
def set_logging_level(options):
"""Set the log level and config (A.K.A. log verbosity)"""
numeric_level = getattr(logging, options.log.upper(), None)
if not isinstance(numeric_level, int):
sys.exit('Invalid log level: %s' % options.log)
if not shell.check_windows():
logging.basicConfig(
format=colored(
"%(levelname)s",
"yellow") + colored(
"\t%(filename)s:%(lineno)d: %(funcName)s()\t",
"blue") + "%(message)s",
level=numeric_level)
else:
logging.basicConfig(
format="%(levelname)s" +
"\t%(filename)s:%(lineno)d: %(funcName)s()\t" +
"%(message)s",
level=numeric_level)
logging.debug(str(options))
def __get_xilinxsim_ini_dir():
"""Get Xilinx ISim ini simulation file"""
if "sim_path" in self.manifest_dict:
xilinx_dir = str(
os.path.join(self.manifest_dict["sim_path"], "..", ".."))
else:
logging.error("Cannot calculate xilinx tools base directory")
quit()
hdl_language = 'vhdl' # 'verilog'
if shell.check_windows():
os_prefix = 'nt'
else:
os_prefix = 'lin'
if shell.architecture() == 32:
arch_sufix = ''
else:
arch_sufix = '64'
xilinx_ini_path = str(
os.path.join(xilinx_dir, hdl_language, "hdp",
os_prefix + arch_sufix))
# Ensure the path is absolute and normalized
return os.path.abspath(xilinx_ini_path)
class ToolISE(ToolSyn):
"""Class providing the methods to create and build a Xilinx ISE project"""
TOOL_INFO = {
'name': 'ISE',
'id': 'ise',
'windows_bin': 'xtclsh.exe',
'linux_bin': 'xtclsh',
'project_ext': 'xise'}
STANDARD_LIBS = ['ieee', 'ieee_proposed', 'iSE', 'simprims', 'std',
'synopsys', 'unimacro', 'unisim', 'XilinxCoreLib']
SUPPORTED_FILES = {
UCFFile: 'xfile add $(sourcefile)',
CDCFile: 'xfile add $(sourcefile)',
NGCFile: 'xfile add $(sourcefile)'}
HDL_FILES = {
VHDLFile: 'xfile add $(sourcefile)',
VerilogFile: 'xfile add $(sourcefile)',
SVFile: 'xfile add $(sourcefile)'}
CLEAN_TARGETS = {'clean': ["xst", "xlnx_auto_0_xdb", "iseconfig _xmsgs",
"_ngo", "*.b", "*_summary.html",
"*.bld", "*.cmd_log", "*.drc", "*.lso", "*.ncd",
"*.ngc", "*.ngd", "*.ngr", "*.pad", "*.par",
"*.pcf", "*.prj", "*.ptwx", "*.stx", "*.syr",
"*.twr", "*.twx", "*.gise", "*.gise", "*.bgn",
"*.unroutes", "*.ut", "*.xpi", "*.xst",
"*.xise", "*.xwbt",
"*_envsettings.html", "*_guide.ncd",
"*_map.map", "*_map.mrp", "*_map.ncd",
"*_map.ngm", "*_map.xrpt", "*_ngdbuild.xrpt",
"*_pad.csv", "*_pad.txt", "*_par.xrpt",
"*_summary.xml", "*_usage.xml", "*_xst.xrpt",
"usage_statistics_webtalk.html", "webtalk.log",
"par_usage_statistics.html", "webtalk_pn.xml"],
'mrproper': ["*.bit", "*.bin", "*.mcs"]}
_ISE_RUN = '''\
$(TCL_OPEN)
set process {{{0}}}
process run '$$'process
set result [process get '$$'process status]
if {{ '$$'result == \\"errors\\" }} {{
exit 1
}}
$(TCL_SAVE)
$(TCL_CLOSE)'''
TCL_CONTROLS = {
'create': 'project new $(PROJECT_FILE)',
'open': 'project open $(PROJECT_FILE)',
'save': 'project save',
'close': 'project close',
'project': '$(TCL_CREATE)\n'
'source files.tcl\n'
'{0}\n'
'project set top $(TOP_MODULE)\n'
'$(TCL_SAVE)\n'
'$(TCL_CLOSE)',
'synthesize': _ISE_RUN.format("Synthesize - XST"),
'translate': _ISE_RUN.format("Translate"),
'map': _ISE_RUN.format("Map"),
'par': _ISE_RUN.format("Place "
+ ("^&" if shell.check_windows() else "'&'")
+ " Route"),
'bitstream': _ISE_RUN.format("Generate Programming File"),
'install_source': "*.bit *.bin"}
def __init__(self):
super(ToolISE, self).__init__()
self._tool_info.update(ToolISE.TOOL_INFO)
self._hdl_files.update(ToolISE.HDL_FILES)
self._supported_files.update(ToolISE.SUPPORTED_FILES)
self._standard_libs.extend(ToolISE.STANDARD_LIBS)
self._clean_targets.update(ToolISE.CLEAN_TARGETS)
self._tcl_controls.update(ToolISE.TCL_CONTROLS)
def _makefile_syn_top(self):
"""Create the top part of the synthesis Makefile for ISE"""
syn_family = self.manifest_dict.get("syn_family", None)
if syn_family is None:
syn_family = FAMILY_NAMES.get(
self.manifest_dict["syn_device"][0:4].upper())
if syn_family is None:
logging.error(
"syn_family is not defined in Manifest.py"
" and can not be guessed!")
quit(-1)
self.manifest_dict["syn_family"] = syn_family
super(ToolISE, self)._makefile_syn_top()
def _makefile_syn_tcl(self):
"""Create a Xilinx synthesis project by TCL"""
syn_properties = self.manifest_dict.get("syn_properties")
project_new = []
project_tcl = self._tcl_controls["project"]
if shell.check_windows():
tmp = 'project set "{0}" "{1}"'
else:
tmp = 'project set \\"{0}\\" \\"{1}\\"'
properties = [
['family', '$(SYN_FAMILY)'],
['device', '$(SYN_DEVICE)'],
['package', '$(SYN_PACKAGE)'],
['speed', '$(SYN_GRADE)'],
['Manual Implementation Compile Order', 'false'],
['Auto Implementation Top', 'false'],
['Create Binary Configuration File', 'true']]
if not syn_properties is None:
properties.extend(syn_properties)
for prop in properties:
project_new.append(tmp.format(prop[0], prop[1]))
project_new.append('set compile_directory .')
self._tcl_controls["project"] = project_tcl.format(
"\n".join(project_new))
super(ToolISE, self)._makefile_syn_tcl()