def amend_alert(top: OrderedDict, name_to_block: Dict[str, IpBlock]):
"""Check interrupt_module if exists, or just use all modules
"""
ensure_alert_modules(top, name_to_block)
if "alert" not in top or top["alert"] == "":
top["alert"] = []
for m in top["alert_module"]:
ips = list(filter(lambda module: module["name"] == m, top["module"]))
if len(ips) == 0:
log.warning("Cannot find IP %s which is used in the alert_module" %
m)
continue
ip = ips[0]
block = name_to_block[ip['type']]
log.info("Adding alert from module %s" % ip["name"])
# Note: we assume that all alerts are asynchronous in order to make the
# design homogeneous and more amenable to DV automation and synthesis
# constraint scripting.
for alert in block.alerts:
alert_dict = alert.as_nwt_dict('alert')
alert_dict['async'] = '1'
qual_sig = lib.add_module_prefix_to_signal(alert_dict,
module=m.lower())
top["alert"].append(qual_sig)
def amend_alert(top: OrderedDict, name_to_block: Dict[str, IpBlock]):
"""Check interrupt_module if exists, or just use all modules
"""
ensure_alert_modules(top, name_to_block)
if "alert" not in top or top["alert"] == "":
top["alert"] = []
# Find the alert handler and extract the name of its clock
alert_clock = None
for instance in top['module']:
if instance['type'].lower() == 'alert_handler':
alert_clock = instance['clock_srcs']['clk_i']
break
assert alert_clock is not None
for m in top["alert_module"]:
ips = list(filter(lambda module: module["name"] == m, top["module"]))
if len(ips) == 0:
log.warning("Cannot find IP %s which is used in the alert_module" %
m)
continue
ip = ips[0]
block = name_to_block[ip['type']]
log.info("Adding alert from module %s" % ip["name"])
has_async_alerts = ip['clock_srcs']['clk_i'] != alert_clock
for alert in block.alerts:
alert_dict = alert.as_nwt_dict('alert')
alert_dict['async'] = '1' if has_async_alerts else '0'
qual_sig = lib.add_module_prefix_to_signal(alert_dict,
module=m.lower())
top["alert"].append(qual_sig)
def amend_interrupt(top: OrderedDict, name_to_block: Dict[str, IpBlock]):
"""Check interrupt_module if exists, or just use all modules
"""
ensure_interrupt_modules(top, name_to_block)
if "interrupt" not in top or top["interrupt"] == "":
top["interrupt"] = []
for m in top["interrupt_module"]:
ips = list(filter(lambda module: module["name"] == m, top["module"]))
if len(ips) == 0:
log.warning(
"Cannot find IP %s which is used in the interrupt_module" % m)
continue
ip = ips[0]
block = name_to_block[ip['type']]
log.info("Adding interrupts from module %s" % ip["name"])
for signal in block.interrupts:
sig_dict = signal.as_nwt_dict('interrupt')
qual = lib.add_module_prefix_to_signal(sig_dict, module=m.lower())
top["interrupt"].append(qual)
def amend_pinmux_io(top: OrderedDict, name_to_block: Dict[str, IpBlock]):
""" Check dio_modules/ mio_modules. If not exists, add all modules to mio
"""
pinmux = top["pinmux"]
if "dio_modules" not in pinmux:
pinmux['dio_modules'] = []
# list out dedicated IO
pinmux['dio'] = []
for e in pinmux["dio_modules"]:
# Check name if it is module or signal
mname, sname = lib.get_ms_name(e["name"])
# Parse how many signals
m = lib.get_module_by_name(top, mname)
if m is None:
raise SystemExit("Module {} in `dio_modules`"
" is not searchable.".format(mname))
if sname is not None:
signals = deepcopy([lib.get_signal_by_name(m, sname)])
else:
# Get all module signals
block = name_to_block[m['type']]
inouts, inputs, outputs = block.xputs
signals = ([s.as_nwt_dict('input') for s in inputs] +
[s.as_nwt_dict('output') for s in outputs] +
[s.as_nwt_dict('inout') for s in inouts])
sig_width = sum([s["width"] for s in signals])
# convert signal with module name
signals = list(
map(partial(lib.add_module_prefix_to_signal, module=mname),
signals))
# Parse how many pads are assigned
if "pad" not in e:
raise SystemExit("Should catch pad field in validate.py!")
# pads are the list of individual pin, each entry is 1 bit width
pads = []
for p in e["pad"]:
pads += lib.get_pad_list(p)
# check if #sig and #pads are matched
if len(pads) != sig_width:
raise SystemExit("# Pads and # Sig (%s) aren't same: %d" %
(mname, sig_width))
# add info to pads["dio"]
for s in signals:
p = pads[:s["width"]]
pads = pads[s["width"]:]
s["pad"] = p
pinmux["dio"].append(s)
dio_names = [p["name"] for p in pinmux["dio"]]
# Multiplexer IO
if "mio_modules" not in pinmux:
# Add all modules having available io to Multiplexer IO
pinmux["mio_modules"] = []
for m in top["module"]:
num_io = len(m["available_input_list"] +
m["available_output_list"] +
m["available_inout_list"])
if num_io != 0:
# Add if not in dio_modules
pinmux["mio_modules"].append(m["name"])
# List up the dedicated IO to exclude from inputs/outputs
# Add port list to `inputs` and `outputs` fields
if "inputs" not in pinmux:
pinmux["inputs"] = []
if "outputs" not in pinmux:
pinmux["outputs"] = []
for e in pinmux["mio_modules"]:
tokens = e.split('.')
if len(tokens) not in [1, 2]:
raise SystemExit(
"Cannot parse signal/module in mio_modules {}".format(e))
# Add all ports from the module to input/outputs
m = lib.get_module_by_name(top, tokens[0])
if m is None:
raise SystemExit("Module {} doesn't exist".format(tokens[0]))
mod_name = m['name'].lower()
if len(tokens) == 1:
block = name_to_block[m['type']]
inouts, inputs, outputs = block.xputs
for signal in inouts:
rel = signal.as_nwt_dict('inout')
qual = lib.add_module_prefix_to_signal(rel, mod_name)
if qual['name'] not in dio_names:
pinmux['inputs'].append(qual)
pinmux['outputs'].append(qual)
for signal in inputs:
rel = signal.as_nwt_dict('input')
qual = lib.add_module_prefix_to_signal(rel, mod_name)
if qual['name'] not in dio_names:
pinmux['inputs'].append(qual)
for signal in outputs:
rel = signal.as_nwt_dict('output')
qual = lib.add_module_prefix_to_signal(rel, mod_name)
if qual['name'] not in dio_names:
pinmux['outputs'].append(qual)
elif len(tokens) == 2:
# Current version doesn't consider signal in mio_modules
# only in dio_modules
raise SystemExit(
"Curren version doesn't support signal in mio_modules {}".
format(e))
